| /kernel/linux/linux-6.6/arch/microblaze/boot/dts/ |
| D | system.dts | 186 xlnx,twc-ps-mem-0 = <0x2af8>; 187 xlnx,twc-ps-mem-1 = <0x3a98>; 188 xlnx,twc-ps-mem-2 = <0x3a98>; 189 xlnx,twc-ps-mem-3 = <0x3a98>;
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| /kernel/linux/linux-5.10/arch/microblaze/boot/dts/ |
| D | system.dts | 186 xlnx,twc-ps-mem-0 = <0x2af8>; 187 xlnx,twc-ps-mem-1 = <0x3a98>; 188 xlnx,twc-ps-mem-2 = <0x3a98>; 189 xlnx,twc-ps-mem-3 = <0x3a98>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra20-pinmux.yaml | 67 spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | tango_nand.c | 523 u32 Trdy, Textw, Twc, Twpw, Tacc, Thold, Trpw, Textr; in tango_set_timings() local 534 Twc = to_ticks(kHz, sdr->tWC_min); in tango_set_timings() 542 tchip->timing1 = TIMING(Trdy, Textw, Twc, Twpw); in tango_set_timings()
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| D | stm32_fmc2_nand.c | 1441 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings() 1490 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
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| D | denali.c | 859 * tRP, tWP, tRHOH, tRC, tWC -> RDWR_EN_LO_CNT in denali_setup_interface()
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| D | sunxi_nand.c | 1449 /* T15 <=> tWC */ in sunxi_nfc_setup_interface()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra20-pinmux.txt | 114 spi3, spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,
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| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| D | head_8xx.S | 270 /* Insert Guarded and Accessed flags into the TWC from the Linux PTE. 271 * It is bit 27 of both the Linux PTE and the TWC (at least
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | head_8xx.S | 282 /* Insert Guarded and Accessed flags into the TWC from the Linux PTE. 283 * It is bit 27 of both the Linux PTE and the TWC (at least
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| /kernel/linux/linux-5.10/drivers/misc/eeprom/ |
| D | eeprom_93xx46.c | 236 /* have to wait program cycle time Twc ms */ in eeprom_93xx46_write_word()
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| /kernel/linux/linux-6.6/drivers/misc/eeprom/ |
| D | eeprom_93xx46.c | 257 /* have to wait program cycle time Twc ms */ in eeprom_93xx46_write_word()
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| /kernel/linux/linux-5.10/drivers/pinctrl/tegra/ |
| D | pinctrl-tegra20.c | 1953 FUNCTION(twc), 2059 MUX_PG(dap2, DAP2, TWC, RSVD3, GMI, 0x14, 8, 0x88, 22, 0xa0, 12), 2132 MUX_PG(sdc, PWM, TWC, SDIO3, SPI3, 0x18, 1, 0x8c, 12, 0xac, 28),
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| /kernel/linux/linux-6.6/drivers/pinctrl/tegra/ |
| D | pinctrl-tegra20.c | 1950 FUNCTION(twc), 2056 MUX_PG(dap2, DAP2, TWC, RSVD3, GMI, 0x14, 8, 0x88, 22, 0xa0, 12), 2129 MUX_PG(sdc, PWM, TWC, SDIO3, SPI3, 0x18, 1, 0x8c, 12, 0xac, 28),
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | tegra20-paz00.dts | 162 nvidia,function = "twc";
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| /kernel/linux/linux-6.6/drivers/clk/tegra/ |
| D | clk-tegra20.c | 477 { .dev_id = "twc", .dt_id = TEGRA20_CLK_TWC }, 763 …TEGRA_INIT_DATA_MUX("twc", mux_pllpcm_clkm, CLK_SOURCE_TWC, 16, TEGRA_PERIPH_ON_APB, TEGRA20…
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| D | clk-tegra20.c | 475 { .dev_id = "twc", .dt_id = TEGRA20_CLK_TWC }, 768 …TEGRA_INIT_DATA_MUX("twc", mux_pllpcm_clkm, CLK_SOURCE_TWC, 16, TEGRA_PERIPH_ON_APB, TEGRA20…
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/ |
| D | tegra20-paz00.dts | 166 nvidia,function = "twc";
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/atmel/ |
| D | nand-controller.c | 1313 * The write cycle timing is directly matching tWC, but is also in atmel_smc_nand_prepare_smcconf() 1317 * NWE_CYCLE = max(tWC, NWE_SETUP + NWE_PULSE + NWE_HOLD) in atmel_smc_nand_prepare_smcconf() 1381 * The write cycle timing is directly matching tWC, but is also in atmel_smc_nand_prepare_smcconf()
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/atmel/ |
| D | nand-controller.c | 1313 * The write cycle timing is directly matching tWC, but is also in atmel_smc_nand_prepare_smcconf() 1317 * NWE_CYCLE = max(tWC, NWE_SETUP + NWE_PULSE + NWE_HOLD) in atmel_smc_nand_prepare_smcconf() 1381 * The write cycle timing is directly matching tWC, but is also in atmel_smc_nand_prepare_smcconf()
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | stm32_fmc2_nand.c | 1447 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings() 1496 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
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| D | denali.c | 859 * tRP, tWP, tRHOH, tRC, tWC -> RDWR_EN_LO_CNT in denali_setup_interface()
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| D | sunxi_nand.c | 1461 /* T15 <=> tWC */ in sunxi_nfc_setup_interface()
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