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/kernel/linux/linux-6.6/sound/soc/tegra/
Dtegra210_ahub.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_ahub.c - Tegra210 AHUB driver
5 // Copyright (c) 2020-2024, NVIDIA CORPORATION. All rights reserved.
22 struct soc_enum *e = (struct soc_enum *)kctl->private_value; in tegra_ahub_get_value_enum()
29 for (i = 0; i < ahub->soc_data->reg_count; i++) { in tegra_ahub_get_value_enum()
32 reg = e->reg + (TEGRA210_XBAR_PART1_RX * i); in tegra_ahub_get_value_enum()
34 reg_val &= ahub->soc_data->mask[i]; in tegra_ahub_get_value_enum()
38 (8 * cmpnt->val_bytes * i); in tegra_ahub_get_value_enum()
44 for (i = 0; i < e->items; i++) { in tegra_ahub_get_value_enum()
45 if (bit_pos == e->values[i]) { in tegra_ahub_get_value_enum()
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/timers/
Dadjtick.c7 * $ gcc adjtick.c -o adjtick -lrt
40 val = -val; in llabs()
66 return end_ns - start_ns; in diff_timespec()
79 for (i = 0; i < 3; i++) { in get_monotonic_and_raw()
110 eppm = (delta1*MILLION)/delta2 - MILLION; in get_ppm_drift()
118 struct timex tx1; in check_tick_adj() local
120 tx1.modes = ADJ_TICK; in check_tick_adj()
121 tx1.modes |= ADJ_OFFSET; in check_tick_adj()
122 tx1.modes |= ADJ_FREQUENCY; in check_tick_adj()
123 tx1.modes |= ADJ_STATUS; in check_tick_adj()
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Draw_skew.c9 * $ gcc raw_skew.c -o raw_skew -lrt
36 __x < 0 ? -(-__x >> __s) : __x >> __s; \
42 val = -val; in llabs()
66 return end_ns - start_ns; in diff_timespec()
75 for (i = 0; i < 3; i++) { in get_monotonic_and_raw()
96 struct timex tx1, tx2; in main() local
102 return -1; in main()
105 tx1.modes = 0; in main()
106 adjtimex(&tx1); in main()
111 if (tx1.offset) in main()
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/kernel/linux/linux-6.6/tools/testing/selftests/timers/
Dadjtick.c7 * $ gcc adjtick.c -o adjtick -lrt
40 val = -val; in llabs()
66 return end_ns - start_ns; in diff_timespec()
79 for (i = 0; i < 3; i++) { in get_monotonic_and_raw()
110 eppm = (delta1*MILLION)/delta2 - MILLION; in get_ppm_drift()
118 struct timex tx1; in check_tick_adj() local
120 tx1.modes = ADJ_TICK; in check_tick_adj()
121 tx1.modes |= ADJ_OFFSET; in check_tick_adj()
122 tx1.modes |= ADJ_FREQUENCY; in check_tick_adj()
123 tx1.modes |= ADJ_STATUS; in check_tick_adj()
[all …]
Draw_skew.c9 * $ gcc raw_skew.c -o raw_skew -lrt
36 __x < 0 ? -(-__x >> __s) : __x >> __s; \
42 val = -val; in llabs()
66 return end_ns - start_ns; in diff_timespec()
75 for (i = 0; i < 3; i++) { in get_monotonic_and_raw()
96 struct timex tx1, tx2; in main() local
102 return -1; in main()
105 tx1.modes = 0; in main()
106 adjtimex(&tx1); in main()
111 if (tx1.offset) in main()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dti,icssg-prueth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
17 - $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
22 - ti,am654-icssg-prueth # for AM65x SoC family
32 dma-names:
34 - const: tx0-0
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/
Dsja1000.txt5 - compatible : should be one of "nxp,sja1000", "technologic,sja1000".
7 - reg : should specify the chip select, address offset and size required
10 - interrupts: property with a value describing the interrupt source
15 - reg-io-width : Specify the size (in bytes) of the IO accesses that
20 - nxp,external-clock-frequency : Frequency of the external oscillator
25 - nxp,tx-output-mode : operation mode of the TX output control logic:
26 <0x0> : bi-phase output mode
31 - nxp,tx-output-config : TX output pin configuration:
33 <0x02> : TX0 pull-down (default)
34 <0x04> : TX0 pull-up
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/can/
Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/
Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
26 const: fsl,imx-scu
28 clock-controller:
31 $ref: /schemas/clock/fsl,scu-clk.yaml
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Donnn,nb7vpq904m.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ON Semiconductor Type-C DisplayPort ALT Mode Linear Redriver
10 - Neil Armstrong <neil.armstrong@linaro.org>
15 - onnn,nb7vpq904m
20 vcc-supply:
23 enable-gpios: true
25 retimer-switch:
29 orientation-switch:
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dnvidia,tegra210-admaif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^admaif@[0-9a-f]*$"
26 - enum:
27 - nvidia,tegra210-admaif
28 - nvidia,tegra186-admaif
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dnvidia,tegra210-admaif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^admaif@[0-9a-f]*$"
26 - enum:
27 - nvidia,tegra210-admaif
28 - nvidia,tegra186-admaif
[all …]
Dnvidia,tegra-audio-graph-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Sameer Pujar <spujar@nvidia.com>
19 - $ref: audio-graph.yaml#
24 - nvidia,tegra210-audio-graph-card
25 - nvidia,tegra186-audio-graph-card
30 clock-names:
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/kernel/linux/linux-6.6/drivers/phy/qualcomm/
Dphy-qcom-edp.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
22 #include <dt-bindings/phy/phy.h>
24 #include "phy-qcom-qmp.h"
89 void __iomem *tx1; member
176 const struct qcom_edp_cfg *cfg = edp->cfg; in qcom_edp_phy_init()
180 ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies); in qcom_edp_phy_init()
184 ret = clk_bulk_prepare_enable(ARRAY_SIZE(edp->clks), edp->clks); in qcom_edp_phy_init()
190 edp->edp + DP_PHY_PD_CTL); in qcom_edp_phy_init()
193 writel(0x17, edp->pll + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); in qcom_edp_phy_init()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/8390/
Dlib8390.c1 // SPDX-License-Identifier: GPL-1.0+
5 Written 1992-94 by Donald Becker.
16 This is the chip-specific code for many 8390-based ethernet adaptors.
17 This is not a complete driver, it must be combined with board-specific
18 code such as ne.c, wd.c, 3c503.c, etc.
23 you have found something that needs changing. -- PG
39 Paul Gortmaker : add kmod support for auto-loading of the 8390
48 The National Semiconductor LAN Databook, and the 3Com 3c503 databook.
79 /* These are the operational function interfaces to board-specific
88 "page" value uses the 8390's 256-byte pages.
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/8390/
Dlib8390.c3 Written 1992-94 by Donald Becker.
17 This is the chip-specific code for many 8390-based ethernet adaptors.
18 This is not a complete driver, it must be combined with board-specific
19 code such as ne.c, wd.c, 3c503.c, etc.
24 you have found something that needs changing. -- PG
40 Paul Gortmaker : add kmod support for auto-loading of the 8390
49 The National Semiconductor LAN Databook, and the 3Com 3c503 databook.
80 /* These are the operational function interfaces to board-specific
89 "page" value uses the 8390's 256-byte pages.
98 #define ei_reset_8390 (ei_local->reset_8390)
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Damphion,vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ming Qian <ming.qian@nxp.com>
12 - Shijie Qin <shijie.qin@nxp.com>
14 description: |-
20 pattern: "^vpu@[0-9a-f]+$"
24 - enum:
25 - nxp,imx8qm-vpu
26 - nxp,imx8qxp-vpu
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/dmaengine/
Dpxa_dma.rst2 PXA/MMP - DMA Slave controller
21 This implies that even if an irq/tasklet is triggered by end of tx1, but
22 at the time of irq/dma tx2 is already finished, tx1->complete() and
23 tx2->complete() should be called.
36 A driver should be able to request a priority, especially the real-time
46 b) Transfer anatomy for a scatter-gather transfer
50 +------------+-----+---------------+----------------+-----------------+
51 | desc-sg[0] | ... | desc-sg[last] | status updater | finisher/linker |
52 +------------+-----+---------------+----------------+-----------------+
54 This structure is pointed by dma->sg_cpu.
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/dmaengine/
Dpxa_dma.rst2 PXA/MMP - DMA Slave controller
21 This implies that even if an irq/tasklet is triggered by end of tx1, but
22 at the time of irq/dma tx2 is already finished, tx1->complete() and
23 tx2->complete() should be called.
36 A driver should be able to request a priority, especially the real-time
46 b) Transfer anatomy for a scatter-gather transfer
50 +------------+-----+---------------+----------------+-----------------+
51 | desc-sg[0] | ... | desc-sg[last] | status updater | finisher/linker |
52 +------------+-----+---------------+----------------+-----------------+
54 This structure is pointed by dma->sg_cpu.
[all …]
/kernel/linux/linux-5.10/include/sound/
Dak4114.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 #define AK4114_REG_RXCSB3 0x0b /* RX channel status byte 3 */
27 #define AK4114_REG_TXCSB3 0x10 /* TX channel status byte 3 */
33 #define AK4114_REG_QSUB_ADDR 0x16 /* Q-subcode address + control */
34 #define AK4114_REG_QSUB_TRACK 0x17 /* Q-subcode track */
35 #define AK4114_REG_QSUB_INDEX 0x18 /* Q-subcode index */
36 #define AK4114_REG_QSUB_MINUTE 0x19 /* Q-subcode minute */
37 #define AK4114_REG_QSUB_SECOND 0x1a /* Q-subcode second */
38 #define AK4114_REG_QSUB_FRAME 0x1b /* Q-subcode frame */
39 #define AK4114_REG_QSUB_ZERO 0x1c /* Q-subcode zero */
[all …]
/kernel/linux/linux-6.6/include/sound/
Dak4114.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 #define AK4114_REG_RXCSB3 0x0b /* RX channel status byte 3 */
27 #define AK4114_REG_TXCSB3 0x10 /* TX channel status byte 3 */
33 #define AK4114_REG_QSUB_ADDR 0x16 /* Q-subcode address + control */
34 #define AK4114_REG_QSUB_TRACK 0x17 /* Q-subcode track */
35 #define AK4114_REG_QSUB_INDEX 0x18 /* Q-subcode index */
36 #define AK4114_REG_QSUB_MINUTE 0x19 /* Q-subcode minute */
37 #define AK4114_REG_QSUB_SECOND 0x1a /* Q-subcode second */
38 #define AK4114_REG_QSUB_FRAME 0x1b /* Q-subcode frame */
39 #define AK4114_REG_QSUB_ZERO 0x1c /* Q-subcode zero */
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Drk817_codec.c1 // SPDX-License-Identifier: GPL-2.0
33 * I don't have another implementation to compare from the Rockchip sources. Hard-coding for now.
46 if (rk817->mic_in_differential) { in rk817_init()
62 /* Set the PLL pre-divide value (values not documented). */ in rk817_set_component_pll()
74 * 0db~-95db, 0.375db/step, for example:
76 * 0xff: -95dB
79 static const DECLARE_TLV_DB_MINMAX(rk817_vol_tlv, -9500, 0);
83 * 27db~-18db, 3db/step, for example:
84 * 0x0: -18dB
88 static const DECLARE_TLV_DB_MINMAX(rk817_gain_tlv, -1800, 2700);
[all …]
/kernel/linux/linux-5.10/arch/x86/crypto/
Dtwofish-x86_64-asm_64-3way.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Twofish Cipher 3-way parallel algorithm (x86_64)
10 .file "twofish-x86_64-asm-3way.S"
22 3-way twofish
93 #define g1g2_3(ab, cd, Tx0, Tx1, Tx2, Tx3, Ty0, Ty1, Ty2, Ty3, x, y) \ argument
95 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 0, ab ## 0, x ## 0); \
98 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 1, ab ## 1, x ## 1); \
101 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 2, ab ## 2, x ## 2); \
243 encrypt_cycle3(RAB, CD, 3);
291 decrypt_cycle3(RAB, CD, 3);
/kernel/linux/linux-6.6/arch/x86/crypto/
Dtwofish-x86_64-asm_64-3way.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Twofish Cipher 3-way parallel algorithm (x86_64)
10 .file "twofish-x86_64-asm-3way.S"
22 3-way twofish
93 #define g1g2_3(ab, cd, Tx0, Tx1, Tx2, Tx3, Ty0, Ty1, Ty2, Ty3, x, y) \ argument
95 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 0, ab ## 0, x ## 0); \
98 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 1, ab ## 1, x ## 1); \
101 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 2, ab ## 2, x ## 2); \
243 encrypt_cycle3(RAB, CD, 3);
291 decrypt_cycle3(RAB, CD, 3);
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/freescale/
Dfsl,scu.txt2 --------------------------------------------------------------------
4 The System Controller Firmware (SCFW) is a low-level system function
5 which runs on a dedicated Cortex-M core to provide power, clock, and
9 The AP communicates with the SC using a multi-ported MU module found
22 -------------------
23 - compatible: should be "fsl,imx-scu".
24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
36 Channel 1 must be "tx1" or "rx1".
38 Channel 3 must be "tx3" or "rx3".
[all …]

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