| /kernel/linux/linux-5.10/drivers/tty/serial/8250/ |
| D | 8250_ingenic.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Lars-Peter Clausen <lars@metafoo.de>
6 * Ingenic SoC UART support
27 int fifosize; member
47 return readl(port->membase + (offset << 2)); in early_in()
52 writel(value, port->membase + (offset << 2)); in early_out()
69 uart_console_write(&early_device->port, s, count, in ingenic_early_console_write()
83 prop = fdt_getprop(fdt, offset, "clock-frequency", NULL); in ingenic_early_console_setup_clock()
87 dev->port.uartclk = be32_to_cpup(prop); in ingenic_early_console_setup_clock()
93 struct uart_port *port = &dev->port; in ingenic_early_console_setup()
[all …]
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| D | 8250_of.c | 1 // SPDX-License-Identifier: GPL-2.0+
36 struct device_node *np = ofdev->dev.of_node; in of_platform_serial_setup()
37 struct uart_port *port = &up->port; in of_platform_serial_setup()
43 pm_runtime_enable(&ofdev->dev); in of_platform_serial_setup()
44 pm_runtime_get_sync(&ofdev->dev); in of_platform_serial_setup()
46 if (of_property_read_u32(np, "clock-frequency", &clk)) { in of_platform_serial_setup()
49 info->clk = devm_clk_get(&ofdev->dev, NULL); in of_platform_serial_setup()
50 if (IS_ERR(info->clk)) { in of_platform_serial_setup()
51 ret = PTR_ERR(info->clk); in of_platform_serial_setup()
52 if (ret != -EPROBE_DEFER) in of_platform_serial_setup()
[all …]
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| D | 8250_core.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Universal/legacy driver for 8250/16550-type serial ports
9 * Supports: ISA-compatible 8250/16550 ports
12 * userspace-configurable "phantom" ports
48 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
49 * is unsafe when used on edge-triggered interrupts.
63 * SERIAL_PORT_DFNS tells us about built-in ports that have no
104 * line has been de-asserted.
117 spin_lock(&i->lock); in serial8250_interrupt()
119 l = i->head; in serial8250_interrupt()
[all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/8250/ |
| D | 8250_ingenic.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Lars-Peter Clausen <lars@metafoo.de>
6 * Ingenic SoC UART support
26 int fifosize; member
46 return readl(port->membase + (offset << 2)); in early_in()
51 writel(value, port->membase + (offset << 2)); in early_out()
68 uart_console_write(&early_device->port, s, count, in ingenic_early_console_write()
82 prop = fdt_getprop(fdt, offset, "clock-frequency", NULL); in ingenic_early_console_setup_clock()
86 dev->port.uartclk = be32_to_cpup(prop); in ingenic_early_console_setup_clock()
92 struct uart_port *port = &dev->port; in ingenic_earlycon_setup_tail()
[all …]
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| D | 8250_of.c | 1 // SPDX-License-Identifier: GPL-2.0+
36 struct device_node *np = ofdev->dev.of_node; in of_platform_serial_setup()
37 struct uart_port *port = &up->port; in of_platform_serial_setup()
43 pm_runtime_enable(&ofdev->dev); in of_platform_serial_setup()
44 pm_runtime_get_sync(&ofdev->dev); in of_platform_serial_setup()
46 if (of_property_read_u32(np, "clock-frequency", &clk)) { in of_platform_serial_setup()
49 info->clk = devm_clk_get(&ofdev->dev, NULL); in of_platform_serial_setup()
50 if (IS_ERR(info->clk)) { in of_platform_serial_setup()
51 ret = PTR_ERR(info->clk); in of_platform_serial_setup()
52 if (ret != -EPROBE_DEFER) in of_platform_serial_setup()
[all …]
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| D | 8250_core.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Universal/legacy driver for 8250/16550-type serial ports
9 * Supports: ISA-compatible 8250/16550 ports
12 * userspace-configurable "phantom" ports
48 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
49 * is unsafe when used on edge-triggered interrupts.
63 * SERIAL_PORT_DFNS tells us about built-in ports that have no
104 * line has been de-asserted.
117 spin_lock(&i->lock); in serial8250_interrupt()
119 l = i->head; in serial8250_interrupt()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/ |
| D | sirf-uart.txt | 4 - compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart",
5 "sirf,atlas7-uart" or "sirf,atlas7-usp-uart".
6 - reg : Offset and length of the register set for the device
7 - interrupts : Should contain uart interrupt
8 - fifosize : Should define hardware rx/tx fifo size
9 - clocks : Should contain uart clock number
12 - uart-has-rtscts: we have hardware flow controller pins in hardware
13 - rts-gpios: RTS pin for USP-based UART if uart-has-rtscts is true
14 - cts-gpios: CTS pin for USP-based UART if uart-has-rtscts is true
18 uart0: uart@b0050000 {
[all …]
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| D | samsung_uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C, S5P and Exynos SoC UART Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
14 Each Samsung UART should have an alias correctly numbered in the "aliases"
15 node, according to serialN format, where N is the port number (non-negative
21 - enum:
22 - samsung,s3c2410-uart
[all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | sirfsoc_uart.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
16 /* hardware uart specific */
19 /* uart - usp common */
112 full_bit = ilog2(port->fifosize); in uart_usp_ff_full_mask()
120 empty_bit = ilog2(port->fifosize) + 1; in uart_usp_ff_empty_mask()
186 .port_name = "sirfsoc-uart",
260 /* uart io ctrl */
287 /* UART FIFO Register */
330 /* USP-UART Common */
337 #define SIRFUART_FIFO_THD(port) (port->fifosize >> 1)
[all …]
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| D | samsung_tty.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
12 * UERSTAT register in the UART blocks, and keeps marking some of the
21 * BJD, 04-Nov-2004
25 #include <linux/dma-mapping.h>
45 /* UART name and device definitions */
62 unsigned int fifosize; member
74 /* uart port features */
82 unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS]; member
153 #define portaddr(port, reg) ((port)->membase + (reg))
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| D | sccnxp.c | 1 // SPDX-License-Identifier: GPL-2.0+
24 #include <linux/platform_data/serial-sccnxp.h>
27 #define SCCNXP_NAME "uart-sccnxp"
93 #define MCTRL_IBIT(cfg, sig) ((((cfg) >> (sig)) & 0xf) - LINE_IP0)
94 #define MCTRL_OBIT(cfg, sig) ((((cfg) >> (sig)) & 0xf) - LINE_OP0)
106 unsigned int fifosize; member
112 struct uart_driver uart; member
142 .fifosize = 3,
153 .fifosize = 3,
164 .fifosize = 3,
[all …]
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| D | apbuart.c | 1 // SPDX-License-Identifier: GPL-2.0
10 * Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com>
74 unsigned int max_chars = port->fifosize; in apbuart_rx_chars()
78 while (UART_RX_DATA(status) && (max_chars--)) { in apbuart_rx_chars()
83 port->icount.rx++; in apbuart_rx_chars()
91 port->icount.brk++; in apbuart_rx_chars()
95 port->icount.parity++; in apbuart_rx_chars()
97 port->icount.frame++; in apbuart_rx_chars()
100 port->icount.overrun++; in apbuart_rx_chars()
102 rsr &= port->read_status_mask; in apbuart_rx_chars()
[all …]
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| D | msm_serial.c | 1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
171 struct uart_port uart; member
183 #define UART_TO_MSM(uart_port) container_of(uart_port, struct msm_port, uart)
188 writel_relaxed(val, port->membase + off); in msm_write()
194 return readl_relaxed(port->membase + off); in msm_read()
206 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
218 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
229 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
232 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/ |
| D | samsung_uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
14 Each Samsung UART should have an alias correctly numbered in the "aliases"
15 node, according to serialN format, where N is the port number (non-negative
21 - items:
22 - const: samsung,exynosautov9-uart
[all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| D | sccnxp.c | 1 // SPDX-License-Identifier: GPL-2.0+
24 #include <linux/platform_data/serial-sccnxp.h>
27 #define SCCNXP_NAME "uart-sccnxp"
93 #define MCTRL_IBIT(cfg, sig) ((((cfg) >> (sig)) & 0xf) - LINE_IP0)
94 #define MCTRL_OBIT(cfg, sig) ((((cfg) >> (sig)) & 0xf) - LINE_OP0)
106 unsigned int fifosize; member
112 struct uart_driver uart; member
142 .fifosize = 3,
153 .fifosize = 3,
164 .fifosize = 3,
[all …]
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| D | samsung_tty.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
12 * UERSTAT register in the UART blocks, and keeps marking some of the
21 * BJD, 04-Nov-2004
25 #include <linux/dma-mapping.h>
46 /* UART name and device definitions */
76 unsigned int fifosize; member
89 /* uart port features */
97 const unsigned int fifosize[UART_NR]; member
166 #define portaddr(port, reg) ((port)->membase + (reg))
[all …]
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| D | apbuart.c | 1 // SPDX-License-Identifier: GPL-2.0
10 * Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com>
71 unsigned int max_chars = port->fifosize; in apbuart_rx_chars()
76 while (UART_RX_DATA(status) && (max_chars--)) { in apbuart_rx_chars()
81 port->icount.rx++; in apbuart_rx_chars()
89 port->icount.brk++; in apbuart_rx_chars()
93 port->icount.parity++; in apbuart_rx_chars()
95 port->icount.frame++; in apbuart_rx_chars()
98 port->icount.overrun++; in apbuart_rx_chars()
100 rsr &= port->read_status_mask; in apbuart_rx_chars()
[all …]
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| D | bcm63xx_uart.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Serial driver for BCM63xx integrated UART.
37 * - rx fifo full
38 * - rx fifo above threshold
39 * - rx fifo not empty for too long
53 * - tx fifo empty
54 * - tx fifo below threshold
71 * handy uart register accessor
76 return __raw_readl(port->membase + offset); in bcm_uart_readl()
82 __raw_writel(value, port->membase + offset); in bcm_uart_writel()
[all …]
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| D | meson_uart.c | 1 // SPDX-License-Identifier: GPL-2.0
102 val = readl(port->membase + AML_UART_STATUS); in meson_uart_tx_empty()
111 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
113 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
120 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
122 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
130 free_irq(port->irq, port); in meson_uart_shutdown()
132 spin_lock_irqsave(&port->lock, flags); in meson_uart_shutdown()
134 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
137 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
[all …]
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| D | msm_serial.c | 1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
172 struct uart_port uart; member
186 return container_of(up, struct msm_port, uart); in to_msm_port()
192 writel_relaxed(val, port->membase + off); in msm_write()
198 return readl_relaxed(port->membase + off); in msm_read()
210 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
222 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
233 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
236 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/ |
| D | exynosautov9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov9.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,boot-mode.h>
12 #include <dt-bindings/soc/samsung,exynos-usi.h>
16 #address-cells = <2>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a76-pmu";
[all …]
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| D | exynos7885.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/exynos7885.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <1>;
17 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
34 interrupt-affinity = <&cpu0>,
42 arm-a73-pmu {
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | prima2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 d-cache-line-size = <32>;
23 i-cache-line-size = <32>;
24 d-cache-size = <32768>;
[all …]
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| D | atlas6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 d-cache-line-size = <32>;
21 i-cache-line-size = <32>;
22 d-cache-size = <32768>;
23 i-cache-size = <32768>;
[all …]
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| D | atlas7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "arm,cortex-a7";
38 compatible = "arm,cortex-a7";
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
[all …]
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