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/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dmcfuart.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * mcfuart.h -- ColdFire internal UART support defines.
7 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
23 unsigned int uartclk; /* UART clock rate */
27 * Define the ColdFire UART register set addresses.
29 #define MCFUART_UMR 0x00 /* Mode register (r/w) */
31 #define MCFUART_UCSR 0x04 /* Clock Select (w) */
32 #define MCFUART_UCR 0x08 /* Command register (w) */
34 #define MCFUART_UTB 0x0c /* Transmit Buffer (w) */
36 #define MCFUART_UACR 0x10 /* Auxiliary Control (w) */
[all …]
/kernel/linux/linux-6.6/arch/m68k/include/asm/
Dmcfuart.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * mcfuart.h -- ColdFire internal UART support defines.
7 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
23 unsigned int uartclk; /* UART clock rate */
27 * Define the ColdFire UART register set addresses.
29 #define MCFUART_UMR 0x00 /* Mode register (r/w) */
31 #define MCFUART_UCSR 0x04 /* Clock Select (w) */
32 #define MCFUART_UCR 0x08 /* Command register (w) */
34 #define MCFUART_UTB 0x0c /* Transmit Buffer (w) */
36 #define MCFUART_UACR 0x10 /* Auxiliary Control (w) */
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/kernel/linux/linux-6.6/drivers/extcon/
Dextcon-max8997.c1 // SPDX-License-Identifier: GPL-2.0+
3 // extcon-max8997.c - MAX8997 extcon driver to support MAX8997 MUIC
8 #include <linux/devm-helpers.h>
18 #include <linux/mfd/max8997-private.h>
19 #include <linux/extcon-provider.h>
22 #define DEV_NAME "max8997-muic"
39 { MAX8997_MUICIRQ_ADCError, "muic-ADCERROR" },
40 { MAX8997_MUICIRQ_ADCLow, "muic-ADCLOW" },
41 { MAX8997_MUICIRQ_ADC, "muic-ADC" },
42 { MAX8997_MUICIRQ_VBVolt, "muic-VBVOLT" },
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Dextcon-max14577.c1 // SPDX-License-Identifier: GPL-2.0+
3 // extcon-max14577.c - MAX14577/77836 extcon driver to support MUIC
9 #include <linux/devm-helpers.h>
16 #include <linux/mfd/max14577-private.h>
17 #include <linux/extcon-provider.h>
47 { MAX14577_IRQ_INT1_ADC, "muic-ADC" },
48 { MAX14577_IRQ_INT1_ADCLOW, "muic-ADCLOW" },
49 { MAX14577_IRQ_INT1_ADCERR, "muic-ADCError" },
50 { MAX14577_IRQ_INT2_CHGTYP, "muic-CHGTYP" },
51 { MAX14577_IRQ_INT2_CHGDETRUN, "muic-CHGDETRUN" },
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Dextcon-max77693.c1 // SPDX-License-Identifier: GPL-2.0+
3 // extcon-max77693.c - MAX77693 extcon driver to support MAX77693 MUIC
8 #include <linux/devm-helpers.h>
18 #include <linux/mfd/max77693-common.h>
19 #include <linux/mfd/max77693-private.h>
20 #include <linux/extcon-provider.h>
24 #define DEV_NAME "max77693-muic"
30 * extcon-max77693 driver use 'default_init_data' to bring up base operation
35 /* STATUS2 - [3]ChgDetRun */
39 /* INTMASK1 - Unmask [3]ADC1KM,[0]ADCM */
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/kernel/linux/linux-5.10/drivers/extcon/
Dextcon-max8997.c1 // SPDX-License-Identifier: GPL-2.0+
3 // extcon-max8997.c - MAX8997 extcon driver to support MAX8997 MUIC
17 #include <linux/mfd/max8997-private.h>
18 #include <linux/extcon-provider.h>
21 #define DEV_NAME "max8997-muic"
38 { MAX8997_MUICIRQ_ADCError, "muic-ADCERROR" },
39 { MAX8997_MUICIRQ_ADCLow, "muic-ADCLOW" },
40 { MAX8997_MUICIRQ_ADC, "muic-ADC" },
41 { MAX8997_MUICIRQ_VBVolt, "muic-VBVOLT" },
42 { MAX8997_MUICIRQ_DBChg, "muic-DBCHG" },
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Dextcon-max14577.c1 // SPDX-License-Identifier: GPL-2.0+
3 // extcon-max14577.c - MAX14577/77836 extcon driver to support MUIC
15 #include <linux/mfd/max14577-private.h>
16 #include <linux/extcon-provider.h>
46 { MAX14577_IRQ_INT1_ADC, "muic-ADC" },
47 { MAX14577_IRQ_INT1_ADCLOW, "muic-ADCLOW" },
48 { MAX14577_IRQ_INT1_ADCERR, "muic-ADCError" },
49 { MAX14577_IRQ_INT2_CHGTYP, "muic-CHGTYP" },
50 { MAX14577_IRQ_INT2_CHGDETRUN, "muic-CHGDETRUN" },
51 { MAX14577_IRQ_INT2_DCDTMR, "muic-DCDTMR" },
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Dextcon-max77693.c1 // SPDX-License-Identifier: GPL-2.0+
3 // extcon-max77693.c - MAX77693 extcon driver to support MAX77693 MUIC
17 #include <linux/mfd/max77693-common.h>
18 #include <linux/mfd/max77693-private.h>
19 #include <linux/extcon-provider.h>
23 #define DEV_NAME "max77693-muic"
29 * extcon-max77693 driver use 'default_init_data' to bring up base operation
34 /* STATUS2 - [3]ChgDetRun */
38 /* INTMASK1 - Unmask [3]ADC1KM,[0]ADCM */
43 /* INTMASK2 - Unmask [0]ChgTypM */
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/kernel/linux/linux-5.10/arch/powerpc/
DKconfig.debug1 # SPDX-License-Identifier: GPL-2.0
4 bool "Don't build arch/powerpc code with -Werror"
7 arch/powerpc with the -Werror flag (which means warnings
47 emulated by the in-kernel emulator. Counters for the various classes
51 powerpc/emulated_instructions/do_warn in debugfs), rate-limited
56 bool "Run self-tests of the code-patching code"
78 bool "Run self-tests of the feature-fixup code"
82 bool "Run self-tests of the MSI bitmap code"
92 Include in-kernel hooks for the xmon kernel monitor/debugger.
117 to say Y here, unless you're building for a memory-constrained
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/kernel/linux/linux-5.10/drivers/tty/serial/
Dsunsab.c1 // SPDX-License-Identifier: GPL-2.0
11 * rates to be programmed into the UART. Also eliminated a lot of
13 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
15 * Ported to new 2.5.x UART layer.
49 struct uart_port port; /* Generic UART port */
51 unsigned long irqflags; /* IRQ state flags */
52 int dsr; /* Current DSR state */
74 * This assumes you have a 29.4912 MHz clock for your UART.
93 int timeout = up->tec_timeout; in sunsab_tec_wait()
95 while ((readb(&up->regs->r.star) & SAB82532_STAR_TEC) && --timeout) in sunsab_tec_wait()
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Darc_uart.c1 // SPDX-License-Identifier: GPL-2.0
3 * ARC On-Chip(fpga) UART Driver
5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
8 * -Decoupled the driver from arch/arc
10 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
13 * -Is uart_tx_stopped() not done in tty write path as it has already been
17 * -New Serial Core based ARC UART driver
18 * -Derived largely from blackfin driver albiet with some major tweaks
21 * -check if sysreq works
37 * ARC UART Hardware Specs
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/kernel/linux/linux-6.6/drivers/tty/serial/
Dsunsab.c1 // SPDX-License-Identifier: GPL-2.0
11 * rates to be programmed into the UART. Also eliminated a lot of
13 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
15 * Ported to new 2.5.x UART layer.
50 struct uart_port port; /* Generic UART port */
52 unsigned long irqflags; /* IRQ state flags */
53 int dsr; /* Current DSR state */
75 * This assumes you have a 29.4912 MHz clock for your UART.
94 int timeout = up->tec_timeout; in sunsab_tec_wait()
96 while ((readb(&up->regs->r.star) & SAB82532_STAR_TEC) && --timeout) in sunsab_tec_wait()
[all …]
Darc_uart.c1 // SPDX-License-Identifier: GPL-2.0
3 * ARC On-Chip(fpga) UART Driver
5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
8 * -Decoupled the driver from arch/arc
10 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
13 * -Is uart_tx_stopped() not done in tty write path as it has already been
17 * -New Serial Core based ARC UART driver
18 * -Derived largely from blackfin driver albiet with some major tweaks
21 * -check if sysreq works
37 * ARC UART Hardware Specs
[all …]
/kernel/linux/linux-6.6/include/linux/
Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 ((port)->cons && (port)->cons->index == (port)->line)
36 * struct uart_ops -- interface between serial_core and the driver
54 * This function sets the modem control lines for @port to the state
57 * - %TIOCM_RTS RTS signal.
58 * - %TIOCM_DTR DTR signal.
59 * - %TIOCM_OUT1 OUT1 signal.
60 * - %TIOCM_OUT2 OUT2 signal.
61 * - %TIOCM_LOOP Set the port into loopback mode.
67 * Locking: @port->lock taken.
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/kernel/linux/linux-5.10/include/linux/
Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 ((port)->cons && (port)->cons->index == (port)->line)
36 * physical hardware. See Documentation/driver-api/serial/driver.rst for details.
56 void (*pm)(struct uart_port *, unsigned int state,
131 void (*pm)(struct uart_port *, unsigned int state,
140 unsigned int uartclk; /* base uart clock */
149 #define UPIO_MEM (SERIAL_IO_MEM) /* driver-specific */
161 struct uart_state *state; /* pointer to parent state */ member
175 * The remaining bits are serial-core specific and not modifiable by
194 /* Port has hardware-assisted h/w flow control */
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dqcom,ipq5018-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,ipq5018-tlmm
26 interrupt-controller: true
27 "#interrupt-cells": true
28 gpio-controller: true
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Dqcom,sm8450-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8450-tlmm
28 interrupt-controller: true
29 "#interrupt-cells": true
30 gpio-controller: true
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Dqcom,sdx75-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdx75-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rohit Agarwal <quic_rohiagar@quicinc.com>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sdx75-tlmm
26 interrupt-controller: true
27 "#interrupt-cells": true
28 gpio-controller: true
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Dqcom,msm8909-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8909-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,msm8909-tlmm
28 interrupt-controller: true
29 "#interrupt-cells": true
30 gpio-controller: true
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Dqcom,sm7150-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm7150-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Danila Tikhonov <danila@jiaxyga.com>
17 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21 const: qcom,sm7150-tlmm
26 reg-names:
28 - const: west
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Dqcom,sc8180x-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8180x-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sc8180x-tlmm
25 reg-names:
27 - const: west
28 - const: east
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Dqcom,sm8350-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8350-tlmm
28 interrupt-controller: true
29 "#interrupt-cells": true
30 gpio-controller: true
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Dqcom,sc8280xp-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sc8280xp-tlmm
28 interrupt-controller: true
29 "#interrupt-cells": true
30 gpio-controller: true
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/kernel/linux/linux-5.10/drivers/tty/serial/jsm/
Djsm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
49 dev_dbg(pdev->dev, fmt, ##__VA_ARGS__); \
76 /* Board State Definitions */
94 #define JSM_VERSION "jsm: 1.2-1-INKERNEL"
95 #define JSM_PARTNUM "40002438_A-INKERNEL"
124 * Per-board information
128 int boardnum; /* Board number: 0-32 */
151 u32 bd_uart_offset; /* Space between each UART */
173 #define CH_OPENING 0x0080 /* Port in fragile open state */
174 #define CH_CLOSING 0x0100 /* Port in fragile close state */
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/kernel/linux/linux-6.6/drivers/tty/serial/jsm/
Djsm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
49 dev_dbg(pdev->dev, fmt, ##__VA_ARGS__); \
76 /* Board State Definitions */
94 #define JSM_VERSION "jsm: 1.2-1-INKERNEL"
95 #define JSM_PARTNUM "40002438_A-INKERNEL"
124 * Per-board information
128 int boardnum; /* Board number: 0-32 */
151 u32 bd_uart_offset; /* Space between each UART */
173 #define CH_OPENING 0x0080 /* Port in fragile open state */
174 #define CH_CLOSING 0x0100 /* Port in fragile close state */
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