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/kernel/linux/linux-5.10/sound/drivers/
Dserial-u16550.c159 static inline void snd_uart16550_add_timer(struct snd_uart16550 *uart) in snd_uart16550_add_timer() argument
161 if (!uart->timer_running) { in snd_uart16550_add_timer()
163 mod_timer(&uart->buffer_timer, jiffies + (HZ + 255) / 256); in snd_uart16550_add_timer()
164 uart->timer_running = 1; in snd_uart16550_add_timer()
168 static inline void snd_uart16550_del_timer(struct snd_uart16550 *uart) in snd_uart16550_del_timer() argument
170 if (uart->timer_running) { in snd_uart16550_del_timer()
171 del_timer(&uart->buffer_timer); in snd_uart16550_del_timer()
172 uart->timer_running = 0; in snd_uart16550_del_timer()
177 static inline void snd_uart16550_buffer_output(struct snd_uart16550 *uart) in snd_uart16550_buffer_output() argument
179 unsigned short buff_out = uart->buff_out; in snd_uart16550_buffer_output()
[all …]
/kernel/linux/linux-6.6/sound/drivers/
Dserial-u16550.c157 static inline void snd_uart16550_add_timer(struct snd_uart16550 *uart) in snd_uart16550_add_timer() argument
159 if (!uart->timer_running) { in snd_uart16550_add_timer()
161 mod_timer(&uart->buffer_timer, jiffies + (HZ + 255) / 256); in snd_uart16550_add_timer()
162 uart->timer_running = 1; in snd_uart16550_add_timer()
166 static inline void snd_uart16550_del_timer(struct snd_uart16550 *uart) in snd_uart16550_del_timer() argument
168 if (uart->timer_running) { in snd_uart16550_del_timer()
169 del_timer(&uart->buffer_timer); in snd_uart16550_del_timer()
170 uart->timer_running = 0; in snd_uart16550_del_timer()
175 static inline void snd_uart16550_buffer_output(struct snd_uart16550 *uart) in snd_uart16550_buffer_output() argument
177 unsigned short buff_out = uart->buff_out; in snd_uart16550_buffer_output()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/
Dmediatek,uart.yaml4 $id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
7 title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
16 The MediaTek UART is based on the basic 8250 UART and compatible
23 - const: mediatek,mt6577-uart
26 - mediatek,mt2701-uart
27 - mediatek,mt2712-uart
28 - mediatek,mt6580-uart
29 - mediatek,mt6582-uart
30 - mediatek,mt6589-uart
31 - mediatek,mt6755-uart
[all …]
Dmvebu-uart.txt1 * Marvell UART : Non standard UART used in some of Marvell EBU SoCs
6 - "marvell,armada-3700-uart" for the standard variant of the UART
9 - "marvell,armada-3700-uart-ext" for the extended variant of the
10 UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
13 - clocks: UART reference clock used to derive the baudrate. If no clock
14 is provided (possible only with the "marvell,armada-3700-uart"
18 for standard variant of UART and UART2-clk for extended variant
19 of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
23 (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
24 respectively the UART sum interrupt, the UART TX interrupt and
[all …]
Damlogic,meson-uart.yaml5 $id: http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#
8 title: Amlogic Meson SoC UART Serial Interface
14 The Amlogic Meson SoC UART Serial Interface is present on a large range
28 - description: Always-on power domain UART controller
31 - amlogic,meson6-uart
32 - amlogic,meson8-uart
33 - amlogic,meson8b-uart
34 - amlogic,meson-gx-uart
35 - amlogic,meson-s4-uart
36 - amlogic,meson-a1-uart
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Dsnps-dw-apb-uart.yaml4 $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
7 title: Synopsys DesignWare ABP UART
20 - renesas,r9a06g032-uart
21 - renesas,r9a06g033-uart
22 - const: renesas,rzn1-uart
25 - rockchip,px30-uart
26 - rockchip,rk1808-uart
27 - rockchip,rk3036-uart
28 - rockchip,rk3066-uart
29 - rockchip,rk3128-uart
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Dfsl-imx-uart.yaml4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
7 title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
19 - const: fsl,imx1-uart
20 - const: fsl,imx21-uart
23 - fsl,imx25-uart
24 - fsl,imx27-uart
25 - fsl,imx31-uart
26 - fsl,imx35-uart
27 - fsl,imx50-uart
28 - fsl,imx51-uart
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Dsamsung_uart.yaml7 title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
14 Each Samsung UART should have an alias correctly numbered in the "aliases"
22 - const: samsung,exynosautov9-uart
23 - const: samsung,exynos850-uart
25 - apple,s5l-uart
26 - axis,artpec8-uart
27 - samsung,s3c2410-uart
28 - samsung,s3c2412-uart
29 - samsung,s3c2440-uart
30 - samsung,s3c6400-uart
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D8250.yaml7 title: UART (Universal Asynchronous Receiver/Transmitter)
30 const: mrvl,mmp-uart
62 - const: intel,xscale-uart
63 - const: mrvl,pxa-uart
64 - const: nuvoton,wpcm450-uart
65 - const: nuvoton,npcm750-uart
66 - const: nvidia,tegra20-uart
67 - const: nxp,lpc3220-uart
82 - nxp,lpc1850-uart
84 - ti,da830-uart
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Dfsl-imx-uart.yaml4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
7 title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
19 - const: fsl,imx1-uart
20 - const: fsl,imx21-uart
23 - fsl,imx25-uart
24 - fsl,imx27-uart
25 - fsl,imx31-uart
26 - fsl,imx35-uart
27 - fsl,imx50-uart
28 - fsl,imx51-uart
[all …]
Dmvebu-uart.txt1 * Marvell UART : Non standard UART used in some of Marvell EBU SoCs
6 - "marvell,armada-3700-uart" for the standard variant of the UART
9 - "marvell,armada-3700-uart-ext" for the extended variant of the
10 UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
13 - clocks: UART reference clock used to derive the baudrate. If no clock
14 is provided (possible only with the "marvell,armada-3700-uart"
20 (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
21 respectively the UART sum interrupt, the UART TX interrupt and
22 UART RX interrupt. A corresponding interrupt-names property must
25 (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
[all …]
Dmtk-uart.txt1 * MediaTek Universal Asynchronous Receiver/Transmitter (UART)
5 * "mediatek,mt2701-uart" for MT2701 compatible UARTS
6 * "mediatek,mt2712-uart" for MT2712 compatible UARTS
7 * "mediatek,mt6580-uart" for MT6580 compatible UARTS
8 * "mediatek,mt6582-uart" for MT6582 compatible UARTS
9 * "mediatek,mt6589-uart" for MT6589 compatible UARTS
10 * "mediatek,mt6755-uart" for MT6755 compatible UARTS
11 * "mediatek,mt6765-uart" for MT6765 compatible UARTS
12 * "mediatek,mt6779-uart" for MT6779 compatible UARTS
13 * "mediatek,mt6795-uart" for MT6795 compatible UARTS
[all …]
Dsnps-dw-apb-uart.yaml4 $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
7 title: Synopsys DesignWare ABP UART
20 - renesas,r9a06g032-uart
21 - renesas,r9a06g033-uart
22 - const: renesas,rzn1-uart
25 - rockchip,px30-uart
26 - rockchip,rk3036-uart
27 - rockchip,rk3066-uart
28 - rockchip,rk3188-uart
29 - rockchip,rk3288-uart
[all …]
D8250.yaml7 title: UART (Universal Asynchronous Receiver/Transmitter) bindings
24 const: mrvl,mmp-uart
56 - const: intel,xscale-uart
57 - const: mrvl,pxa-uart
58 - const: nuvoton,npcm750-uart
59 - const: nvidia,tegra20-uart
60 - const: nxp,lpc3220-uart
69 - nxp,lpc1850-uart
71 - ti,da830-uart
76 - cavium,octeon-3860-uart
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/
Dmen_z135_uart.c3 * MEN 16z135 High Speed UART
132 * @uart: The UART port
136 static inline void men_z135_reg_set(struct men_z135_port *uart, in men_z135_reg_set() argument
139 struct uart_port *port = &uart->port; in men_z135_reg_set()
143 spin_lock_irqsave(&uart->lock, flags); in men_z135_reg_set()
149 spin_unlock_irqrestore(&uart->lock, flags); in men_z135_reg_set()
154 * @uart: The UART port
158 static void men_z135_reg_clr(struct men_z135_port *uart, in men_z135_reg_clr() argument
161 struct uart_port *port = &uart->port; in men_z135_reg_clr()
165 spin_lock_irqsave(&uart->lock, flags); in men_z135_reg_clr()
[all …]
Dtimbuart.c3 * timbuart.c timberdale FPGA UART driver
8 * Timberdale FPGA UART
55 struct timbuart_port *uart = in timbuart_start_tx() local
59 tasklet_schedule(&uart->tasklet); in timbuart_start_tx()
121 struct timbuart_port *uart = in timbuart_handle_tx_port() local
140 *ier |= uart->last_ier & TXFLAGS; in timbuart_handle_tx_port()
177 struct timbuart_port *uart = from_tasklet(uart, t, tasklet); in timbuart_tasklet() local
180 spin_lock(&uart->port.lock); in timbuart_tasklet()
182 isr = ioread32(uart->port.membase + TIMBUART_ISR); in timbuart_tasklet()
183 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr); in timbuart_tasklet()
[all …]
/kernel/linux/linux-6.6/drivers/tty/serial/
Dmen_z135_uart.c3 * MEN 16z135 High Speed UART
132 * @uart: The UART port
136 static inline void men_z135_reg_set(struct men_z135_port *uart, in men_z135_reg_set() argument
139 struct uart_port *port = &uart->port; in men_z135_reg_set()
143 spin_lock_irqsave(&uart->lock, flags); in men_z135_reg_set()
149 spin_unlock_irqrestore(&uart->lock, flags); in men_z135_reg_set()
154 * @uart: The UART port
158 static void men_z135_reg_clr(struct men_z135_port *uart, in men_z135_reg_clr() argument
161 struct uart_port *port = &uart->port; in men_z135_reg_clr()
165 spin_lock_irqsave(&uart->lock, flags); in men_z135_reg_clr()
[all …]
Dtimbuart.c3 * timbuart.c timberdale FPGA UART driver
8 * Timberdale FPGA UART
55 struct timbuart_port *uart = in timbuart_start_tx() local
59 tasklet_schedule(&uart->tasklet); in timbuart_start_tx()
118 struct timbuart_port *uart = in timbuart_handle_tx_port() local
137 *ier |= uart->last_ier & TXFLAGS; in timbuart_handle_tx_port()
174 struct timbuart_port *uart = from_tasklet(uart, t, tasklet); in timbuart_tasklet() local
177 spin_lock(&uart->port.lock); in timbuart_tasklet()
179 isr = ioread32(uart->port.membase + TIMBUART_ISR); in timbuart_tasklet()
180 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr); in timbuart_tasklet()
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/kernel/linux/linux-6.6/drivers/tty/serial/8250/
D8250_tegra.c46 struct tegra_uart *uart; in tegra_uart_probe() local
51 uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL); in tegra_uart_probe()
52 if (!uart) in tegra_uart_probe()
91 uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL); in tegra_uart_probe()
92 if (IS_ERR(uart->rst)) in tegra_uart_probe()
93 return PTR_ERR(uart->rst); in tegra_uart_probe()
97 uart->clk = devm_clk_get(&pdev->dev, NULL); in tegra_uart_probe()
98 if (IS_ERR(uart->clk)) { in tegra_uart_probe()
103 ret = clk_prepare_enable(uart->clk); in tegra_uart_probe()
107 port->uartclk = clk_get_rate(uart->clk); in tegra_uart_probe()
[all …]
D8250_core.c277 * IIR bits on their UART, but it's specifically designed for in serial8250_backup_timeout()
278 * the "Diva" UART used on the management processor on many HP in serial8250_backup_timeout()
610 * Check whether an invalid uart number has been specified, and in univ8250_console_setup()
654 * console=uart[8250],io|mmio|mmio16|mmio32,<addr>[,<options>]
655 * console=uart[8250],0x<addr>[,<options>]
667 char match[] = "uart"; /* 8250-specific earlycon name */ in univ8250_console_match()
836 struct uart_8250_port uart; in serial8250_probe() local
839 memset(&uart, 0, sizeof(uart)); in serial8250_probe()
845 uart.port.iobase = p->iobase; in serial8250_probe()
846 uart.port.membase = p->membase; in serial8250_probe()
[all …]
D8250_lpc18xx.c3 * Serial port driver for NXP LPC18xx/43xx UART
93 struct uart_8250_port uart; in lpc18xx_serial_probe() local
107 memset(&uart, 0, sizeof(uart)); in lpc18xx_serial_probe()
109 uart.port.membase = devm_ioremap(&pdev->dev, res->start, in lpc18xx_serial_probe()
111 if (!uart.port.membase) in lpc18xx_serial_probe()
120 dev_err(&pdev->dev, "uart clock not found\n"); in lpc18xx_serial_probe()
138 dev_err(&pdev->dev, "unable to enable uart clock\n"); in lpc18xx_serial_probe()
144 uart.port.line = ret; in lpc18xx_serial_probe()
149 spin_lock_init(&uart.port.lock); in lpc18xx_serial_probe()
150 uart.port.dev = &pdev->dev; in lpc18xx_serial_probe()
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/8250/
D8250_tegra.c44 struct tegra_uart *uart; in tegra_uart_probe() local
49 uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL); in tegra_uart_probe()
50 if (!uart) in tegra_uart_probe()
89 uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL); in tegra_uart_probe()
90 if (IS_ERR(uart->rst)) in tegra_uart_probe()
91 return PTR_ERR(uart->rst); in tegra_uart_probe()
95 uart->clk = devm_clk_get(&pdev->dev, NULL); in tegra_uart_probe()
96 if (IS_ERR(uart->clk)) { in tegra_uart_probe()
101 ret = clk_prepare_enable(uart->clk); in tegra_uart_probe()
105 port->uartclk = clk_get_rate(uart->clk); in tegra_uart_probe()
[all …]
/kernel/linux/linux-6.6/include/uapi/linux/
Dserial_core.h33 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
34 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
35 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
36 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
37 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
38 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
39 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
43 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
44 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
45 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
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/kernel/linux/linux-5.10/arch/mips/kernel/
Dcps-vec-ns16550.S32 * _mips_cps_putc() - write a character to the UART
34 * @t9: UART base address
45 * _mips_cps_puts() - write a string to the UART
47 * @t9: UART base address
49 * Write a null-terminated ASCII string to the UART.
65 * _mips_cps_putx4 - write a 4b hex value to the UART
66 * @a0: the 4b value to write to the UART
67 * @t9: UART base address
69 * Write a single hexadecimal character to the UART.
82 * _mips_cps_putx8 - write an 8b hex value to the UART
[all …]
/kernel/linux/linux-6.6/arch/mips/kernel/
Dcps-vec-ns16550.S32 * _mips_cps_putc() - write a character to the UART
34 * @t9: UART base address
45 * _mips_cps_puts() - write a string to the UART
47 * @t9: UART base address
49 * Write a null-terminated ASCII string to the UART.
65 * _mips_cps_putx4 - write a 4b hex value to the UART
66 * @a0: the 4b value to write to the UART
67 * @t9: UART base address
69 * Write a single hexadecimal character to the UART.
82 * _mips_cps_putx8 - write an 8b hex value to the UART
[all …]

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