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12

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Duniphier-efuse.txt1 = UniPhier eFuse device tree bindings =
3 This UniPhier eFuse must be under soc-glue.
6 - compatible: should be "socionext,uniphier-efuse"
7 - reg: should contain the register location and length
10 Are child nodes of efuse, bindings of which as described in
15 soc-glue@5f900000 {
16 compatible = "socionext,uniphier-ld20-soc-glue-debug",
17 "simple-mfd";
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/socionext/
Dsocionext,uniphier-soc-glue-debug.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue-debug.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC-glue logic debug part
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 SoC-glue logic debug part implemented on Socionext UniPhier SoCs is
20 - enum:
21 - socionext,uniphier-ld4-soc-glue-debug
22 - socionext,uniphier-pro4-soc-glue-debug
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/
Dsocionext,uniphier-efuse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier eFuse
10 - Keiji Hayashibara <hayashibara.keiji@socionext.com>
11 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
14 - $ref: nvmem.yaml#
18 const: socionext,uniphier-efuse
24 - compatible
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/socionext/
Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro5 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "socionext,uniphier-pro5";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
[all …]
Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-ld4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
[all …]
Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-pro4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
[all …]
Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier sLD8 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-sld8";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
[all …]
Duniphier-pxs2.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs2 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs2";
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro5 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
9 compatible = "socionext,uniphier-pro5";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 enable-method = "psci";
[all …]
Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
[all …]
Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier sLD8 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
[all …]
Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
[all …]
Duniphier-pxs2.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs2 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/thermal/thermal.h>
12 compatible = "socionext,uniphier-pxs2";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/drivers/nvmem/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_NVMEM) += nvmem_core.o
7 nvmem_core-y := core.o
10 obj-$(CONFIG_NVMEM_BCM_OCOTP) += nvmem-bcm-ocotp.o
11 nvmem-bcm-ocotp-y := bcm-ocotp.o
12 obj-$(CONFIG_NVMEM_IMX_IIM) += nvmem-imx-iim.o
13 nvmem-imx-iim-y := imx-iim.o
14 obj-$(CONFIG_NVMEM_IMX_OCOTP) += nvmem-imx-ocotp.o
15 nvmem-imx-ocotp-y := imx-ocotp.o
16 obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) += nvmem-imx-ocotp-scu.o
[all …]
Duniphier-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * UniPhier eFuse driver
12 #include <linux/nvmem-provider.h>
27 *val++ = readb(priv->base + reg + offs); in uniphier_reg_read()
34 struct device *dev = &pdev->dev; in uniphier_efuse_probe()
42 return -ENOMEM; in uniphier_efuse_probe()
45 priv->base = devm_ioremap_resource(dev, res); in uniphier_efuse_probe()
46 if (IS_ERR(priv->base)) in uniphier_efuse_probe()
47 return PTR_ERR(priv->base); in uniphier_efuse_probe()
62 { .compatible = "socionext,uniphier-efuse",},
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
56 tristate "JZ4780 EFUSE Memory Support"
62 Say Y here to include support for JZ4780 efuse memory found on
[all …]
/kernel/linux/linux-6.6/drivers/nvmem/
Duniphier-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * UniPhier eFuse driver
12 #include <linux/nvmem-provider.h>
27 *val++ = readb(priv->base + reg + offs); in uniphier_reg_read()
34 struct device *dev = &pdev->dev; in uniphier_efuse_probe()
42 return -ENOMEM; in uniphier_efuse_probe()
44 priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in uniphier_efuse_probe()
45 if (IS_ERR(priv->base)) in uniphier_efuse_probe()
46 return PTR_ERR(priv->base); in uniphier_efuse_probe()
62 { .compatible = "socionext,uniphier-efuse",},
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_NVMEM) += nvmem_core.o
7 nvmem_core-y := core.o
8 obj-y += layouts/
11 obj-$(CONFIG_NVMEM_APPLE_EFUSES) += nvmem-apple-efuses.o
12 nvmem-apple-efuses-y := apple-efuses.o
13 obj-$(CONFIG_NVMEM_BCM_OCOTP) += nvmem-bcm-ocotp.o
14 nvmem-bcm-ocotp-y := bcm-ocotp.o
15 obj-$(CONFIG_NVMEM_BRCM_NVRAM) += nvmem_brcm_nvram.o
16 nvmem_brcm_nvram-y := brcm_nvram.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 tristate "Apple eFuse support"
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
52 will be called nvmem-bcm-ocotp.
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
79 This is a driver for the On-Chip OTP Controller (OCOTP) available on
80 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/socionext/
Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD11 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "socionext,uniphier-ld11";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs3 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-pxs3";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
[all …]
Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-ld20";
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/socionext/
Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD11 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
12 compatible = "socionext,uniphier-ld11";
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <0>;
[all …]
Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs3 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs3";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-ld20";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
[all …]

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