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/kernel/linux/linux-5.10/drivers/net/can/usb/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "CAN USB interfaces"
3 depends on USB
12 tristate "EMS CPC-USB/ARM7 CAN/USB interface"
14 This driver is for the one channel CPC-USB/ARM7 CAN/USB interface
15 from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).
18 tristate "ESD USB/2 CAN/USB interface"
20 This driver supports the CAN-USB/2 interface
27 candleLight USB CAN interfaces USB/CAN devices
33 tristate "Kvaser CAN/USB interface"
[all …]
/kernel/linux/linux-6.6/drivers/net/can/usb/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "CAN USB interfaces"
3 depends on USB
12 tristate "EMS CPC-USB/ARM7 CAN/USB interface"
14 This driver is for the one channel CPC-USB/ARM7 CAN/USB interface
15 from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).
18 tristate "esd electronics gmbh CAN/USB interfaces"
20 This driver adds supports for several CAN/USB interfaces
24 - esd CAN-USB/2
25 - esd CAN-USB/Micro
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 Qualcomm High-Speed USB PHY
18 - items:
19 - enum:
20 - qcom,sa8775p-usb-hs-phy
[all …]
Dqcom,usb-hs-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-hs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm's USB HS PHY
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - qcom,usb-hs-phy-apq8064
18 - qcom,usb-hs-phy-msm8960
24 reset-names:
33 reset-names:
[all …]
Dbrcm,stingray-usb-phy.txt1 Broadcom Stingray USB PHY
4 - compatible : should be one of the listed compatibles
5 - "brcm,sr-usb-combo-phy" is combo PHY has two PHYs, one SS and one HS.
6 - "brcm,sr-usb-hs-phy" is a single HS PHY.
7 - reg: offset and length of the PHY blocks registers
8 - #phy-cells:
9 - Must be 1 for brcm,sr-usb-combo-phy as it expects one argument to indicate
10 the PHY number of two PHYs. 0 for HS PHY and 1 for SS PHY.
11 - Must be 0 for brcm,sr-usb-hs-phy.
13 Refer to phy/phy-bindings.txt for the generic PHY binding properties
[all …]
Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 USB HS PHY controller
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
42 "#address-cells":
45 "#size-cells":
[all …]
Dtransmit-amplitude.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Binding describing the peak-to-peak transmit amplitude for common PHYs
14 - Marek Behún <kabel@kernel.org>
17 tx-p2p-microvolt:
19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property
21 'tx-p2p-microvolt-names' property must be provided and contain
24 tx-p2p-microvolt-names:
[all …]
Dqcom,ipq806x-usb-phy-hs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-hs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm ipq806x usb DWC3 HS PHY CONTROLLER
10 - Ansuel Smith <ansuelsmth@gmail.com>
13 DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
19 const: qcom,ipq806x-usb-phy-hs
21 "#phy-cells":
31 clock-names:
[all …]
Dqcom-usb-ipq4019-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom-usb-ipq4019-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcom IPQ40xx Dakota HS/SS USB PHY
10 - Robert Marko <robert.marko@sartura.hr>
15 - qcom,usb-ss-ipq4019-phy
16 - qcom,usb-hs-ipq4019-phy
24 reset-names:
26 - const: por_rst
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dbrcm,stingray-usb-phy.txt1 Broadcom Stingray USB PHY
4 - compatible : should be one of the listed compatibles
5 - "brcm,sr-usb-combo-phy" is combo PHY has two PHYs, one SS and one HS.
6 - "brcm,sr-usb-hs-phy" is a single HS PHY.
7 - reg: offset and length of the PHY blocks registers
8 - #phy-cells:
9 - Must be 1 for brcm,sr-usb-combo-phy as it expects one argument to indicate
10 the PHY number of two PHYs. 0 for HS PHY and 1 for SS PHY.
11 - Must be 0 for brcm,sr-usb-hs-phy.
13 Refer to phy/phy-bindings.txt for the generic PHY binding properties
[all …]
Dqcom,usb-hs-phy.txt1 Qualcomm's USB HS PHY
5 - compatible:
8 Definition: Should contain "qcom,usb-hs-phy" and more specifically one of the
11 "qcom,usb-hs-phy-apq8064"
12 "qcom,usb-hs-phy-msm8916"
13 "qcom,usb-hs-phy-msm8974"
15 - #phy-cells:
20 - clocks:
22 Value type: <prop-encoded-array>
26 - clock-names:
[all …]
Dqcom,ipq806x-usb-phy-hs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-hs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm ipq806x usb DWC3 HS PHY CONTROLLER
10 - Ansuel Smith <ansuelsmth@gmail.com>
13 DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
19 const: qcom,ipq806x-usb-phy-hs
21 "#phy-cells":
31 clock-names:
[all …]
Dqcom-usb-ipq4019-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/qcom-usb-ipq4019-phy.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Qualcom IPQ40xx Dakota HS/SS USB PHY
10 - Robert Marko <robert.marko@sartura.hr>
15 - qcom,usb-ss-ipq4019-phy
16 - qcom,usb-hs-ipq4019-phy
24 reset-names:
26 - const: por_rst
[all …]
Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <wcheng@codeaurora.org>
13 Qualcomm High-Speed USB PHY
18 - qcom,usb-snps-hs-7nm-phy
19 - qcom,sm8150-usb-hs-phy
20 - qcom,usb-snps-femto-v2-phy
[all …]
Dnvidia,tegra20-usb-phy.txt1 Tegra SOC USB PHY
3 The device node for Tegra SOC USB PHY:
6 - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy".
7 For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain
8 "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is
10 - reg : Defines the following set of registers, in the order listed:
11 - The PHY's own register set.
13 - The register set of the PHY containing the UTMI pad control registers.
14 Present if-and-only-if phy_type == utmi.
15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Drenesas,rcar-usb2-clock-sel.txt1 * Renesas R-Car USB 2.0 clock selector
3 This file provides information on what the device node for the R-Car USB 2.0
12 Case 1: An external clock connects to R-Car SoC
13 +----------+ +--- R-Car ---------------------+
14 |External |---|USB_EXTAL ---> all usb channels|
16 +----------+ +-------------------------------+
19 Case 2: An oscillator connects to R-Car SoC
20 +----------+ +--- R-Car ---------------------+
21 |Oscillator|---|USB_EXTAL -+-> all usb channels|
22 | |---|USB_XTAL --+ |
[all …]
/kernel/linux/linux-5.10/drivers/phy/st/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 tristate "ST SPEAR1310-MIPHY driver"
21 tristate "ST SPEAR1340-MIPHY driver"
37 tristate "STMicroelectronics STM32 USB HS PHY Controller driver"
41 Enable this to support the High-Speed USB transceivers that are part
44 This driver controls the entire USB PHY block: the USB PHY controller
45 (USBPHYC) and the two 8-bit wide UTMI+ interfaces. First interface is
46 used by an HS USB Host controller, and the second one is shared
47 between an HS USB OTG controller and an HS USB Host controller,
48 selected by a USB switch.
/kernel/linux/linux-6.6/drivers/phy/st/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 tristate "ST SPEAR1310-MIPHY driver"
21 tristate "ST SPEAR1340-MIPHY driver"
37 tristate "STMicroelectronics STM32 USB HS PHY Controller driver"
42 Enable this to support the High-Speed USB transceivers that are part
45 This driver controls the entire USB PHY block: the USB PHY controller
46 (USBPHYC) and the two 8-bit wide UTMI+ interfaces. First interface is
47 used by an HS USB Host controller, and the second one is shared
48 between an HS USB OTG controller and an HS USB Host controller,
49 selected by a USB switch.
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "Atheros AR71XX/9XXX USB PHY driver"
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
32 tristate "Qualcomm IPQ4019 USB PHY driver"
36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
98 tristate "Qualcomm QMP USB PHY Driver"
102 Enable this to support the QMP USB PHY transceiver that is used
106 tristate "Qualcomm QMP legacy USB PHY Driver"
110 Enable this legacy driver to support the QMP USB+DisplayPort Combo
123 Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/connector/
Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB Connector
10 - Rob Herring <robh@kernel.org>
13 A USB connector node represents a physical USB connector. It should be a child
14 of a USB interface controller or a separate node when it is attached to both
15 MUX and USB interface controller.
20 - enum:
[all …]
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "Atheros AR71XX/9XXX USB PHY driver"
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
22 tristate "Qualcomm IPQ4019 USB PHY driver"
26 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
49 with controllers such as PCIe, UFS, and USB on Qualcomm chips.
57 Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
58 controllers on Qualcomm chips. This driver supports the high-speed
60 USB IPs on MSM SOCs.
63 tristate "Qualcomm USB HS PHY module"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Drenesas,rcar-usb2-clock-sel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car USB 2.0 clock selector
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
19 Case 1: An external clock connects to R-Car SoC
20 +----------+ +--- R-Car ---------------------+
21 |External |---|USB_EXTAL ---> all usb channels|
23 +----------+ +-------------------------------+
[all …]
/kernel/linux/linux-6.6/drivers/usb/cdns3/
Dcdns3-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
14 #include <linux/usb/gadget.h>
15 #include <linux/dma-direction.h>
18 * USBSS-DEV register interface.
23 * struct cdns3_usb_regs - device controller registers.
29 * @usb_ien: USB Interrupt Enable.
30 * @usb_ists: USB Interrupt Status.
53 * @buf_addr: Address for On-chip Buffer operations.
[all …]
/kernel/linux/linux-5.10/drivers/usb/cdns3/
Dgadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
14 #include <linux/usb/gadget.h>
17 * USBSS-DEV register interface.
22 * struct cdns3_usb_regs - device controller registers.
28 * @usb_ien: USB Interrupt Enable.
29 * @usb_ists: USB Interrupt Status.
52 * @buf_addr: Address for On-chip Buffer operations.
53 * @buf_data: Data for On-chip Buffer operations.
[all …]

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