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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt1 Device tree binding for NVIDIA Tegra XUSB pad controller
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
21 device tree node. Each lane exposed by the pad will be represented by its
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
[all …]
Dphy-hisi-inno-usb2.txt1 Device tree bindings for HiSilicon INNO USB2 PHY
4 - compatible: Should be one of the following strings:
5 "hisilicon,inno-usb2-phy",
6 "hisilicon,hi3798cv200-usb2-phy".
7 - reg: Should be the address space for PHY configuration register in peripheral
9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device
11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset
13 - #address-cells: Must be 1.
14 - #size-cells: Must be 0.
16 The INNO USB2 PHY device should be a child node of peripheral controller that
[all …]
Dphy-lantiq-rcu-usb2.txt9 -------------------------------------------------------------------------------
11 - compatible : Should be one of
12 "lantiq,ase-usb2-phy"
13 "lantiq,danube-usb2-phy"
14 "lantiq,xrx100-usb2-phy"
15 "lantiq,xrx200-usb2-phy"
16 "lantiq,xrx300-usb2-phy"
17 - reg : Defines the following sets of registers in the parent
18 syscon device
19 - Offset of the USB PHY configuration register
[all …]
/kernel/linux/linux-5.10/drivers/usb/host/
Dfsl-mph-dr-of.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Setup platform devices needed by the Freescale multi-port host
4 * and/or dual-role USB controller modules based on the description
5 * in flat device tree.
16 #include <linux/dma-mapping.h>
27 .drivers = { "fsl-ehci", NULL, NULL, },
32 .drivers = { "fsl-usb2-otg", "fsl-ehci", "fsl-usb2-udc", },
37 .drivers = { "fsl-usb2-udc", NULL, NULL, },
83 const struct resource *res = ofdev->resource; in fsl_usb2_device_register()
84 unsigned int num = ofdev->num_resources; in fsl_usb2_device_register()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dphy-hisi-inno-usb2.txt1 Device tree bindings for HiSilicon INNO USB2 PHY
4 - compatible: Should be one of the following strings:
5 "hisilicon,inno-usb2-phy",
6 "hisilicon,hi3798cv200-usb2-phy".
7 - reg: Should be the address space for PHY configuration register in peripheral
9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device
11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset
13 - #address-cells: Must be 1.
14 - #size-cells: Must be 0.
16 The INNO USB2 PHY device should be a child node of peripheral controller that
[all …]
Dphy-lantiq-rcu-usb2.txt9 -------------------------------------------------------------------------------
11 - compatible : Should be one of
12 "lantiq,ase-usb2-phy"
13 "lantiq,danube-usb2-phy"
14 "lantiq,xrx100-usb2-phy"
15 "lantiq,xrx200-usb2-phy"
16 "lantiq,xrx300-usb2-phy"
17 - reg : Defines the following sets of registers in the parent
18 syscon device
19 - Offset of the USB PHY configuration register
[all …]
/kernel/linux/linux-6.6/drivers/usb/host/
Dfsl-mph-dr-of.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Setup platform devices needed by the Freescale multi-port host
4 * and/or dual-role USB controller modules based on the description
5 * in flat device tree.
17 #include <linux/dma-mapping.h>
28 .drivers = { "fsl-ehci", NULL, NULL, },
33 .drivers = { "fsl-usb2-otg", "fsl-ehci", "fsl-usb2-udc", },
38 .drivers = { "fsl-usb2-udc", NULL, NULL, },
84 const struct resource *res = ofdev->resource; in fsl_usb2_device_register()
85 unsigned int num = ofdev->num_resources; in fsl_usb2_device_register()
[all …]
/kernel/linux/linux-6.6/drivers/phy/tegra/
Dxusb-tegra186.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
42 #define PORTX_CAP_SHIFT(x) ((x) * 4)
67 #define PORTX_SPEED_SUPPORT_SHIFT(x) ((x) * 4)
101 #define HSIC_PD_RX_DATA0 BIT(4)
123 #define UHSIC_LINE_DEB_CNT(x) (((x) & 0xf) << 4)
126 #define XUSB_AO_UTMIP_TRIGGERS(x) (0x40 + (x) * 4)
131 #define XUSB_AO_UHSIC_TRIGGERS(x) (0x60 + (x) * 4)
134 #define HSIC_CAP_CFG BIT(4)
[all …]
/kernel/linux/linux-5.10/drivers/phy/tegra/
Dxusb-tegra186.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
42 #define PORTX_CAP_SHIFT(x) ((x) * 4)
67 #define PORTX_SPEED_SUPPORT_SHIFT(x) ((x) * 4)
96 #define HSIC_PD_RX_DATA0 BIT(4)
154 struct tegra_xusb_usb2_lane *usb2; in tegra186_usb2_lane_probe() local
157 usb2 = kzalloc(sizeof(*usb2), GFP_KERNEL); in tegra186_usb2_lane_probe()
158 if (!usb2) in tegra186_usb2_lane_probe()
159 return ERR_PTR(-ENOMEM); in tegra186_usb2_lane_probe()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra194-p2972-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p2888.dtsi"
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
17 dma-controller@2930000 {
21 interrupt-controller@2a40000 {
32 vcc-supply = <&vdd_1v8ls>;
33 address-width = <8>;
[all …]
Dtegra194-p3509-0000+p3668-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p3668-0000.dtsi"
11 compatible = "nvidia,p3509-0000+p3668-0000", "nvidia,tegra194";
17 dma-controller@2930000 {
21 interrupt-controller@2a40000 {
36 vcc-supply = <&vdd_1v8>;
37 address-width = <8>;
[all …]
Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
22 stdout-path = "serial0:115200n8";
33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
34 hvddio-pex-supply = <&vdd_1v8>;
35 dvddio-pex-supply = <&vdd_pex_1v05>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mips/lantiq/
Drcu.txt4 This binding describes the RCU (reset controller unit) multifunction device,
5 where each sub-device has its own set of registers.
7 The RCU register range is used for multiple purposes. Mostly one device
14 -------------------------------------------------------------------------------
16 - compatible : The first and second values must be:
17 "lantiq,xrx200-rcu", "simple-mfd", "syscon"
18 - reg : The address and length of the system control registers
21 -------------------------------------------------------------------------------
24 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
27 big-endian;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mips/lantiq/
Drcu.txt4 This binding describes the RCU (reset controller unit) multifunction device,
5 where each sub-device has it's own set of registers.
7 The RCU register range is used for multiple purposes. Mostly one device
14 -------------------------------------------------------------------------------
16 - compatible : The first and second values must be:
17 "lantiq,xrx200-rcu", "simple-mfd", "syscon"
18 - reg : The address and length of the system control registers
21 -------------------------------------------------------------------------------
24 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
27 big-endian;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dnvidia,tegra-xudc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC)
14 - Nagarjuna Kristam <nkristam@nvidia.com>
15 - JC Kuo <jckuo@nvidia.com>
16 - Thierry Reding <treding@nvidia.com>
21 - enum:
22 - nvidia,tegra210-xudc # For Tegra210
[all …]
Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
[all …]
/kernel/linux/linux-5.10/Documentation/firmware-guide/acpi/
Dintel-pmc-mux.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Intel North Mux-Agent
10 North Mux-Agent is a function of the Intel PMC firmware that is supported on
13 platforms that allow the mux-agent to be configured from the operating system
14 have an ACPI device object (node) with HID "INTC105C" that represents it.
16 The North Mux-Agent (aka. Intel PMC Mux Control, or just mux-agent) driver
18 (drivers/platform/x86/intel_scu_ipc.c). The driver registers with the USB Type-C
19 Mux Class which allows the USB Type-C Controller and Interface drivers to
22 Device modes. The driver is located here: drivers/usb/typec/mux/intel_pmc_mux.c.
28 -------
[all …]
/kernel/linux/linux-6.6/Documentation/firmware-guide/acpi/
Dintel-pmc-mux.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Intel North Mux-Agent
10 North Mux-Agent is a function of the Intel PMC firmware that is supported on
13 platforms that allow the mux-agent to be configured from the operating system
14 have an ACPI device object (node) with HID "INTC105C" that represents it.
16 The North Mux-Agent (aka. Intel PMC Mux Control, or just mux-agent) driver
18 (drivers/platform/x86/intel_scu_ipc.c). The driver registers with the USB Type-C
19 Mux Class which allows the USB Type-C Controller and Interface drivers to
22 Device modes. The driver is located here: drivers/usb/typec/mux/intel_pmc_mux.c.
28 -------
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra234-p3737-0000+p3701-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p3701-0000.dtsi"
8 #include "tegra234-p3737-0000.dtsi"
12 compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234";
22 stdout-path = "serial0:115200n8";
27 compatible = "nvidia,tegra194-hsuart";
28 reset-names = "serial";
[all …]
/kernel/linux/linux-5.10/drivers/usb/gadget/udc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
22 # - integrated/SOC controllers first
23 # - licensed IP used in both SOC and discrete versions
24 # - discrete ones (including all PCI-only controllers)
[all …]
/kernel/linux/linux-6.6/drivers/usb/gadget/udc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
22 # - integrated/SOC controllers first
23 # - licensed IP used in both SOC and discrete versions
24 # - discrete ones (including all PCI-only controllers)
[all …]
/kernel/linux/linux-5.10/drivers/usb/dwc3/
Ddwc3-meson-g12a.c1 // SPDX-License-Identifier: GPL-2.0
11 * - Control registers for each USB2 Ports
12 * - Control registers for the USB PHY layer
13 * - SuperSpeed PHY can be enabled only if port is used
14 * - Dynamic OTG switching with ID change interrupt
33 /* USB2 Ports Control Registers, offsets are per-port */
42 #define U2P_R0_ID_PULLUP BIT(4)
65 #define USB_R1_U3H_HUB_PORT_OVERCURRENT_MASK GENMASK(4, 2)
81 #define USB_R3_P30_SSC_REF_CLK_SEL_MASK GENMASK(12, 4)
88 #define USB_R4_P21_ONLY BIT(4)
[all …]
/kernel/linux/linux-6.6/drivers/usb/dwc3/
Ddwc3-meson-g12a.c1 // SPDX-License-Identifier: GPL-2.0
11 * - Control registers for each USB2 Ports
12 * - Control registers for the USB PHY layer
13 * - SuperSpeed PHY can be enabled only if port is used
14 * - Dynamic OTG switching with ID change interrupt
33 /* USB2 Ports Control Registers, offsets are per-port */
42 #define U2P_R0_ID_PULLUP BIT(4)
65 #define USB_R1_U3H_HUB_PORT_OVERCURRENT_MASK GENMASK(4, 2)
81 #define USB_R3_P30_SSC_REF_CLK_SEL_MASK GENMASK(12, 4)
88 #define USB_R4_P21_ONLY BIT(4)
[all …]
/kernel/linux/linux-6.6/drivers/phy/marvell/
Dphy-mvebu-a3700-utmi.c1 // SPDX-License-Identifier: GPL-2.0
38 #define PHY_PU_OTG BIT(4)
42 #define PHY_PD_EN BIT(4)
59 * struct mvebu_a3700_utmi_caps - PHY capabilities
62 * - The UTMI PHY wired to the USB3/USB2 controller (otg)
63 * - The UTMI PHY wired to the USB2 controller (host only)
72 * struct mvebu_a3700_utmi - PHY driver data
89 struct device *dev = &phy->dev; in mvebu_a3700_utmi_phy_power_on()
90 int usb32 = utmi->caps->usb32; in mvebu_a3700_utmi_phy_power_on()
98 reg = readl(utmi->regs + USB2_PHY_PLL_CTRL_REG0); in mvebu_a3700_utmi_phy_power_on()
[all …]
/kernel/linux/linux-5.10/drivers/phy/marvell/
Dphy-mvebu-a3700-utmi.c1 // SPDX-License-Identifier: GPL-2.0
38 #define PHY_PU_OTG BIT(4)
42 #define PHY_PD_EN BIT(4)
59 * struct mvebu_a3700_utmi_caps - PHY capabilities
62 * - The UTMI PHY wired to the USB3/USB2 controller (otg)
63 * - The UTMI PHY wired to the USB2 controller (host only)
72 * struct mvebu_a3700_utmi - PHY driver data
89 struct device *dev = &phy->dev; in mvebu_a3700_utmi_phy_power_on()
90 int usb32 = utmi->caps->usb32; in mvebu_a3700_utmi_phy_power_on()
98 reg = readl(utmi->regs + USB2_PHY_PLL_CTRL_REG0); in mvebu_a3700_utmi_phy_power_on()
[all …]

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