Searched +full:usb2 +full:- +full:phy1 (Results 1 – 25 of 75) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Neil Armstrong <narmstrong@baylibre.com> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | p1020utm-pc.dtsi | 2 * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 64 /* 512KB for u-boot Bootloader Image */ 65 /* 512KB for u-boot Environment Variables */ 67 label = "NOR U-Boot Image"; 68 read-only; [all …]
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| D | p1020mbg-pc.dtsi | 2 * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 66 label = "NOR Vitesse-7385 Firmware"; 67 read-only; 72 /* 512KB for u-boot Bootloader Image */ 73 /* 512KB for u-boot Environment Variables */ [all …]
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| D | p1020rdb-pc.dtsi | 2 * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 48 label = "NOR Vitesse-7385 Firmware"; 49 read-only; 72 /* 512KB for u-boot Bootloader Image */ 73 /* 512KB for u-boot Environment Variables */ [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | p1020utm-pc.dtsi | 2 * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 64 /* 512KB for u-boot Bootloader Image */ 65 /* 512KB for u-boot Environment Variables */ 67 label = "NOR U-Boot Image"; 68 read-only; [all …]
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| D | p1020mbg-pc.dtsi | 2 * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 66 label = "NOR Vitesse-7385 Firmware"; 67 read-only; 72 /* 512KB for u-boot Bootloader Image */ 73 /* 512KB for u-boot Environment Variables */ [all …]
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| D | p1020rdb-pc.dtsi | 2 * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 41 bank-width = <2>; 42 device-width = <1>; 48 label = "NOR Vitesse-7385 Firmware"; 49 read-only; 72 /* 512KB for u-boot Bootloader Image */ 73 /* 512KB for u-boot Environment Variables */ [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b-a311d-khadas-vim3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b-a311d.dtsi" 11 #include "meson-khadas-vim3.dtsi" 12 #include "meson-g12b-khadas-vim3.dtsi" 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential 39 phy-names = "usb2-phy0", "usb2-phy1";
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| D | meson-g12b-s922x-khadas-vim3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b-s922x.dtsi" 11 #include "meson-khadas-vim3.dtsi" 12 #include "meson-g12b-khadas-vim3.dtsi" 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential 39 phy-names = "usb2-phy0", "usb2-phy1";
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| D | meson-sm1-odroid-hc4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-sm1-odroid.dtsi" 11 compatible = "hardkernel,odroid-hc4", "amlogic,sm1"; 12 model = "Hardkernel ODROID-HC4"; 19 fan0: pwm-fan { 20 compatible = "pwm-fan"; 21 #cooling-cells = <2>; 22 cooling-levels = <0 120 170 220>; 27 compatible = "gpio-leds"; [all …]
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| D | meson-sm1-khadas-vim3l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "meson-sm1.dtsi" 10 #include "meson-khadas-vim3.dtsi" 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 17 vddcpu: regulator-vddcpu { 21 compatible = "pwm-regulator"; 23 regulator-name = "VDDCPU"; 24 regulator-min-microvolt = <690000>; 25 regulator-max-microvolt = <1050000>; [all …]
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| D | meson-gxm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gxl.dtsi" 10 compatible = "amlogic,meson-gxm"; 13 cpu-map { 46 capacity-dmips-mhz = <1024>; 50 capacity-dmips-mhz = <1024>; 54 capacity-dmips-mhz = <1024>; 58 capacity-dmips-mhz = <1024>; 63 compatible = "arm,cortex-a53"; 65 enable-method = "psci"; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b-a311d-khadas-vim3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b-a311d.dtsi" 11 #include "meson-khadas-vim3.dtsi" 12 #include "meson-g12b-khadas-vim3.dtsi" 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential 39 phy-names = "usb2-phy0", "usb2-phy1";
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| D | meson-g12b-s922x-khadas-vim3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b-s922x.dtsi" 11 #include "meson-khadas-vim3.dtsi" 12 #include "meson-g12b-khadas-vim3.dtsi" 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential 39 phy-names = "usb2-phy0", "usb2-phy1";
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| D | meson-sm1-khadas-vim3l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "meson-sm1.dtsi" 10 #include "meson-khadas-vim3.dtsi" 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 17 vddcpu: regulator-vddcpu { 21 compatible = "pwm-regulator"; 23 regulator-name = "VDDCPU"; 24 regulator-min-microvolt = <690000>; 25 regulator-max-microvolt = <1050000>; [all …]
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| D | meson-gxm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gxl.dtsi" 10 compatible = "amlogic,meson-gxm"; 13 cpu-map { 47 compatible = "arm,cortex-a53"; 49 enable-method = "psci"; 50 next-level-cache = <&l2>; 52 #cooling-cells = <2>; 57 compatible = "arm,cortex-a53"; 59 enable-method = "psci"; [all …]
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| /kernel/linux/linux-5.10/drivers/usb/dwc3/ |
| D | dwc3-meson-g12a.c | 1 // SPDX-License-Identifier: GPL-2.0 11 * - Control registers for each USB2 Ports 12 * - Control registers for the USB PHY layer 13 * - SuperSpeed PHY can be enabled only if port is used 14 * - Dynamic OTG switching with ID change interrupt 33 /* USB2 Ports Control Registers, offsets are per-port */ 120 "usb2-phy0", "usb2-phy1", "usb2-phy2", 124 "usb2-phy0", "usb2-phy1", "usb3-phy0", 133 * correctly when only the "usb2-phy1" phy is specified on-par with the 137 "usb2-phy0", "usb2-phy1" [all …]
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| /kernel/linux/linux-6.6/drivers/usb/dwc3/ |
| D | dwc3-meson-g12a.c | 1 // SPDX-License-Identifier: GPL-2.0 11 * - Control registers for each USB2 Ports 12 * - Control registers for the USB PHY layer 13 * - SuperSpeed PHY can be enabled only if port is used 14 * - Dynamic OTG switching with ID change interrupt 33 /* USB2 Ports Control Registers, offsets are per-port */ 120 "usb2-phy0", "usb2-phy1", "usb2-phy2", 124 "usb2-phy0", "usb2-phy1", "usb3-phy0", 133 * correctly when only the "usb2-phy1" phy is specified on-par with the 137 "usb2-phy0", "usb2-phy1" [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/imx/ |
| D | fsl,imx8mp-hsio-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MP HSIO blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to 14 the NoC and ensuring proper power sequencing of the high-speed IO 20 - const: fsl,imx8mp-hsio-blk-ctrl 21 - const: syscon [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/ |
| D | sun4i-a10-pcduino.dts | 5 * This file is dual-licensed: you can use it either under the terms 44 /dts-v1/; 45 #include "sun4i-a10.dtsi" 46 #include "sunxi-common-regulators.dtsi" 48 #include <dt-bindings/gpio/gpio.h> 49 #include <dt-bindings/input/input.h> 53 compatible = "linksprite,a10-pcduino", "allwinner,sun4i-a10"; 60 stdout-path = "serial0:115200n8"; 64 compatible = "gpio-leds"; 66 led-0 { [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | sun4i-a10-pcduino.dts | 5 * This file is dual-licensed: you can use it either under the terms 44 /dts-v1/; 45 #include "sun4i-a10.dtsi" 46 #include "sunxi-common-regulators.dtsi" 48 #include <dt-bindings/gpio/gpio.h> 49 #include <dt-bindings/input/input.h> 53 compatible = "linksprite,a10-pcduino", "allwinner,sun4i-a10"; 60 stdout-path = "serial0:115200n8"; 64 compatible = "gpio-leds"; 77 gpio-keys { [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | asp834x-redboot.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 12 compatible = "analogue-and-micro,asp8347e"; 13 #address-cells = <1>; 14 #size-cells = <1>; 24 #address-cells = <1>; 25 #size-cells = <0>; 30 d-cache-line-size = <32>; 31 i-cache-line-size = <32>; 32 d-cache-size = <32768>; [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/ |
| D | asp834x-redboot.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 12 compatible = "analogue-and-micro,asp8347e"; 13 #address-cells = <1>; 14 #size-cells = <1>; 24 #address-cells = <1>; 25 #size-cells = <0>; 30 d-cache-line-size = <32>; 31 i-cache-line-size = <32>; 32 d-cache-size = <32768>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/marvell/ |
| D | armada-3720-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F3720-DDR3) 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 14 /dts-v1/; 16 #include <dt-bindings/gpio/gpio.h> 17 #include "armada-372x.dtsi" 20 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3"; 21 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3700"; 24 stdout-path = "serial0:115200n8"; 32 exp_usb3_vbus: usb3-vbus { [all …]
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