| /kernel/linux/linux-6.6/drivers/usb/gadget/udc/ |
| D | renesas_usb3.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas USB3.0 Peripheral driver (USB gadget)
5 * Copyright (C) 2015-2017 Renesas Electronics Corporation
11 #include <linux/dma-mapping.h>
13 #include <linux/extcon-provider.h>
33 #define USB3_AXI_INT_STA 0x008
34 #define USB3_AXI_INT_ENA 0x00c
35 #define USB3_DMA_INT_STA 0x010
36 #define USB3_DMA_INT_ENA 0x014
37 #define USB3_DMA_CH0_CON(n) (0x030 + ((n) - 1) * 0x10) /* n = 1 to 4 */
[all …]
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| D | rzv2m_usb3drd.c | 1 // SPDX-License-Identifier: GPL-2.0
15 #define USB_PERI_DRD_CON 0x000
21 static void rzv2m_usb3drd_set_bit(struct rzv2m_usb3drd *usb3, u32 bits, in rzv2m_usb3drd_set_bit() argument
24 u32 val = readl(usb3->reg + offs); in rzv2m_usb3drd_set_bit()
27 writel(val, usb3->reg + offs); in rzv2m_usb3drd_set_bit()
30 static void rzv2m_usb3drd_clear_bit(struct rzv2m_usb3drd *usb3, u32 bits, in rzv2m_usb3drd_clear_bit() argument
33 u32 val = readl(usb3->reg + offs); in rzv2m_usb3drd_clear_bit()
36 writel(val, usb3->reg + offs); in rzv2m_usb3drd_clear_bit()
41 struct rzv2m_usb3drd *usb3 = dev_get_drvdata(dev); in rzv2m_usb3drd_reset() local
44 rzv2m_usb3drd_clear_bit(usb3, USB_PERI_DRD_CON_PERI_CON, in rzv2m_usb3drd_reset()
[all …]
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| /kernel/linux/linux-5.10/drivers/usb/gadget/udc/ |
| D | renesas_usb3.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas USB3.0 Peripheral driver (USB gadget)
5 * Copyright (C) 2015-2017 Renesas Electronics Corporation
10 #include <linux/dma-mapping.h>
12 #include <linux/extcon-provider.h>
31 #define USB3_AXI_INT_STA 0x008
32 #define USB3_AXI_INT_ENA 0x00c
33 #define USB3_DMA_INT_STA 0x010
34 #define USB3_DMA_INT_ENA 0x014
35 #define USB3_DMA_CH0_CON(n) (0x030 + ((n) - 1) * 0x10) /* n = 1 to 4 */
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/broadcom/ |
| D | phy-bcm-ns-usb3.c | 1 // SPDX-License-Identifier: GPL-2.0-only
27 #define BCM_NS_USB3_PHY_BASE_ADDR_REG 0x1f
28 #define BCM_NS_USB3_PHY_PLL30_BLOCK 0x8000
29 #define BCM_NS_USB3_PHY_TX_PMD_BLOCK 0x8040
30 #define BCM_NS_USB3_PHY_PIPE_BLOCK 0x8060
33 #define BCM_NS_USB3_PLL_CONTROL 0x01
34 #define BCM_NS_USB3_PLLA_CONTROL0 0x0a
35 #define BCM_NS_USB3_PLLA_CONTROL1 0x0b
38 #define BCM_NS_USB3_TX_PMD_CONTROL1 0x01
41 #define BCM_NS_USB3_LFPS_CMP 0x02
[all …]
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| /kernel/linux/linux-6.6/drivers/phy/broadcom/ |
| D | phy-bcm-ns-usb3.c | 1 // SPDX-License-Identifier: GPL-2.0-only
25 #define BCM_NS_USB3_PHY_BASE_ADDR_REG 0x1f
26 #define BCM_NS_USB3_PHY_PLL30_BLOCK 0x8000
27 #define BCM_NS_USB3_PHY_TX_PMD_BLOCK 0x8040
28 #define BCM_NS_USB3_PHY_PIPE_BLOCK 0x8060
31 #define BCM_NS_USB3_PLL_CONTROL 0x01
32 #define BCM_NS_USB3_PLLA_CONTROL0 0x0a
33 #define BCM_NS_USB3_PLLA_CONTROL1 0x0b
36 #define BCM_NS_USB3_TX_PMD_CONTROL1 0x01
39 #define BCM_NS_USB3_LFPS_CMP 0x02
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | qcom,msm8996-qmp-usb3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
17 qcom,sc8280xp-qmp-usb3-uni-phy.yaml.
22 - qcom,ipq6018-qmp-usb3-phy
23 - qcom,ipq8074-qmp-usb3-phy
24 - qcom,msm8996-qmp-usb3-phy
25 - qcom,msm8998-qmp-usb3-phy
[all …]
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| D | renesas,usb3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 3.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-phy # RZ/G2M
17 - renesas,r8a774b1-usb3-phy # RZ/G2N
18 - renesas,r8a774e1-usb3-phy # RZ/G2H
[all …]
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| D | socionext,uniphier-usb3ss-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 Super-Speed (SS) PHY
11 USB3 controller implemented on Socionext UniPhier SoCs.
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about Super-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-ssphy
[all …]
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| D | qcom,sc8280xp-qmp-usb43dp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sc7180-qmp-usb3-dp-phy
20 - qcom,sc7280-qmp-usb3-dp-phy
21 - qcom,sc8180x-qmp-usb3-dp-phy
22 - qcom,sc8280xp-qmp-usb43dp-phy
[all …]
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| D | qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,ipq9574-qmp-usb3-phy
20 - qcom,qcm2290-qmp-usb3-phy
21 - qcom,sa8775p-qmp-usb3-uni-phy
22 - qcom,sc8280xp-qmp-usb3-uni-phy
23 - qcom,sm6115-qmp-usb3-phy
[all …]
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| D | socionext,uniphier-usb3hs-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 High-Speed (HS) PHY
11 USB3 controller implemented on Socionext UniPhier SoCs.
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about High-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro5-usb3-hsphy
[all …]
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| D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
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| D | bcm-ns-usb3-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/bcm-ns-usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 Known A0: BCM4707 rev 0
15 Known C0: BCM47094 rev 0
18 - Rafał Miłecki <rafal@milecki.pl>
23 - brcm,ns-ax-usb3-phy
24 - brcm,ns-bx-usb3-phy
30 usb3-dmp-syscon:
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/ |
| D | tegra234-p3740-0002.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/sound/rt5640.h>
6 compatible = "nvidia,p3740-0002";
8 bus@0 {
15 dai-format = "i2s";
16 remote-endpoint = <&rt5640_ep>;
26 bitclock-master;
27 frame-master;
36 rt5640: audio-codec@1c {
38 reg = <0x1c>;
[all …]
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| D | tegra234-p3768-0000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 compatible = "nvidia,p3768-0000";
11 stdout-path = "serial0:115200n8";
14 bus@0 {
20 reg = <0x57>;
23 vcc-supply = <&vdd_1v8_sys>;
24 address-width = <8>;
27 read-only;
36 assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>;
37 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | renesas,usb3-peri.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/usb/renesas,usb3-peri.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - enum:
17 - renesas,r8a774a1-usb3-peri # RZ/G2M
18 - renesas,r8a774b1-usb3-peri # RZ/G2N
19 - renesas,r8a774c0-usb3-peri # RZ/G2E
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | renesas,usb3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 3.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-phy # RZ/G2M
17 - renesas,r8a774b1-usb3-phy # RZ/G2N
18 - renesas,r8a774e1-usb3-phy # RZ/G2H
[all …]
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| D | nvidia,tegra124-xusb-padctl.txt | 11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
34 --------------------
35 - compatible: Must be:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | nvidia,tegra124-xusb.txt | 4 The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
8 --------------------
9 - compatible: Must be:
10 - Tegra124: "nvidia,tegra124-xusb"
11 - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12 - Tegra210: "nvidia,tegra210-xusb"
13 - Tegra186: "nvidia,tegra186-xusb"
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
16 - reg-names: Must contain the following entries:
17 - "hcd"
[all …]
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| D | renesas,usb3-peri.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/usb/renesas,usb3-peri.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-peri # RZ/G2M
17 - renesas,r8a774b1-usb3-peri # RZ/G2N
18 - renesas,r8a774c0-usb3-peri # RZ/G2E
19 - renesas,r8a774e1-usb3-peri # RZ/G2H
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/ |
| D | uniphier-reset.txt | 5 -----------------------------------
12 - compatible: Should be
13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3
15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
16 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
17 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
18 "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI
19 "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI
20 "socionext,uniphier-pxs3-ahci-reset" - for PXs3 SoC AHCI
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | uniphier-regulator.txt | 6 USB3 Controller
7 ---------------
9 This regulator controls VBUS and belongs to USB3 glue layer. Before using
14 - compatible: Should be
15 "socionext,uniphier-pro4-usb3-regulator" - for Pro4 SoC
16 "socionext,uniphier-pro5-usb3-regulator" - for Pro5 SoC
17 "socionext,uniphier-pxs2-usb3-regulator" - for PXs2 SoC
18 "socionext,uniphier-ld20-usb3-regulator" - for LD20 SoC
19 "socionext,uniphier-pxs3-usb3-regulator" - for PXs3 SoC
20 - reg: Specifies offset and length of the register set for the device.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/ |
| D | socionext,uniphier-regulator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/socionext,uniphier-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This regulator controls VBUS and belongs to USB3 glue layer. Before using
15 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
17 # USB3 Controller
22 - socionext,uniphier-pro4-usb3-regulator
23 - socionext,uniphier-pro5-usb3-regulator
24 - socionext,uniphier-pxs2-usb3-regulator
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/tegra/ |
| D | xusb-tegra186.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
22 #define HS_CURR_LEVEL_PAD_MASK 0x3f
24 #define HS_TERM_RANGE_ADJ_MASK 0xf
26 #define HS_SQUELCH_MASK 0x7
28 #define RPD_CTRL_SHIFT 0
29 #define RPD_CTRL_MASK 0x1f
32 #define XUSB_PADCTL_USB2_PAD_MUX 0x4
34 #define USB2_PORT_MASK 0x3
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/ |
| D | socionext,uniphier-glue-reset.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-glue-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-reset
22 - socionext,uniphier-pro5-usb3-reset
23 - socionext,uniphier-pxs2-usb3-reset
24 - socionext,uniphier-ld20-usb3-reset
25 - socionext,uniphier-pxs3-usb3-reset
[all …]
|