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/kernel/linux/linux-6.6/arch/powerpc/include/asm/
Dcpm2.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * All CPM control and status is available through the CPM2 internal
27 /* Device sub-block and page codes.
72 /* CPM2-specific opcodes (see cpm.h for common opcodes)
113 * oversampled clock.
157 * get some microcode patches :-).
158 * The parameter ram space for the SMCs is fifty-some bytes, and
165 /* Define enough so I can at least use the serial port as a UART.
173 uint smc_rstate; /* Internal */
174 uint smc_idp; /* Internal */
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dcpm2.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * All CPM control and status is available through the CPM2 internal
27 /* Device sub-block and page codes.
72 /* CPM2-specific opcodes (see cpm.h for common opcodes)
113 * oversampled clock.
157 * get some microcode patches :-).
158 * The parameter ram space for the SMCs is fifty-some bytes, and
165 /* Define enough so I can at least use the serial port as a UART.
173 uint smc_rstate; /* Internal */
174 uint smc_idp; /* Internal */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Sae <frank.sae@motor-comm.com>
13 - $ref: ethernet-phy.yaml#
18 - ethernet-phy-id4f51.e91a
19 - ethernet-phy-id4f51.e91b
21 rx-internal-delay-ps:
23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
[all …]
Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
20 - amlogic,meson6-dwmac
21 - amlogic,meson8b-dwmac
22 - amlogic,meson8m2-dwmac
23 - amlogic,meson-gxbb-dwmac
[all …]
Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-controller.yaml#
14 - Andrew Davis <afd@ti.com>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
34 nvmem-cells:
40 nvmem-cell-names:
42 - const: io_impedance_ctrl
[all …]
/kernel/linux/linux-6.6/Documentation/sound/cards/
Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
24 use for a lower number of channels is only resource allocation,
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
[all …]
/kernel/linux/linux-5.10/Documentation/sound/cards/
Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
24 use for a lower number of channels is only resource allocation,
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
[all …]
/kernel/linux/linux-5.10/Documentation/core-api/
Dkernel-api.rst9 .. kernel-doc:: include/linux/list.h
10 :internal:
15 When writing drivers, you cannot in general use routines which are from
22 ------------------
24 .. kernel-doc:: lib/vsprintf.c
27 .. kernel-doc:: include/linux/kstrtox.h
30 .. kernel-doc:: lib/kstrtox.c
33 .. kernel-doc:: lib/string_helpers.c
37 -------------------
39 .. kernel-doc:: lib/string.c
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Domap_hwmod.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
13 * These headers and macros are used to define OMAP on-chip module
16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * - add interconnect error log structures
21 * - init_conn_id_bit (CONNID_BIT_VECTOR)
22 * - implement default hwmod SMS/SDRC flags?
23 * - move Linux-specific data ("non-ROM data") out
155 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Domap_hwmod.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
13 * These headers and macros are used to define OMAP on-chip module
16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * - add interconnect error log structures
21 * - init_conn_id_bit (CONNID_BIT_VECTOR)
22 * - implement default hwmod SMS/SDRC flags?
23 * - move Linux-specific data ("non-ROM data") out
155 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/
Dingenic,adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019-2020 Artur Rojek
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Artur Rojek <contact@artur-rojek.eu>
17 ADC clients must use the format described in
18 https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml,
19 giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
24 - ingenic,jz4725b-adc
25 - ingenic,jz4740-adc
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Drenesas,fsi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas FIFO-buffered Serial Interface (FSI)
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
13 - $ref: dai-common.yaml#
22 - items:
23 - enum:
24 - renesas,fsi2-sh73a0 # SH-Mobile AG5
25 - renesas,fsi2-r8a7740 # R-Mobile A1
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Drenesas,fsi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas FIFO-buffered Serial Interface (FSI)
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
19 - items:
20 - enum:
21 - renesas,fsi2-sh73a0 # SH-Mobile AG5
22 - renesas,fsi2-r8a7740 # R-Mobile A1
23 - enum:
[all …]
/kernel/linux/linux-6.6/Documentation/core-api/
Dkernel-api.rst9 .. kernel-doc:: include/linux/list.h
10 :internal:
15 When writing drivers, you cannot in general use routines which are from
22 ------------------
24 .. kernel-doc:: lib/vsprintf.c
27 .. kernel-doc:: include/linux/kstrtox.h
30 .. kernel-doc:: lib/kstrtox.c
33 .. kernel-doc:: lib/string_helpers.c
37 -------------------
39 .. kernel-doc:: include/linux/fortify-string.h
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-controller.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
34 ti,min-output-impedance:
40 ti,max-output-impedance:
45 Note: ti,min-output-impedance and ti,max-output-impedance are mutually
[all …]
/kernel/linux/linux-5.10/include/linux/
Dscmi_protocol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * struct scmi_revision_info - version information structure
28 * @impl_ver: A vendor-specific implementation version.
30 * @sub_vendor_id: A sub-vendor identifier(Null terminated ASCII string)
61 * struct scmi_clk_ops - represents the various operations provided
62 * by SCMI Clock Protocol
65 * @info_get: get the information of the specified clock
66 * @rate_get: request the current clock rate of a clock
67 * @rate_set: set the clock rate of a clock
68 * @enable: enables the specified clock
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/media/
Dcamera-sensor.rst1 .. SPDX-License-Identifier: GPL-2.0
6 CSI-2 and parallel (BT.601 and BT.656) busses
7 ---------------------------------------------
9 Please see :ref:`transmitter-receiver`.
12 ---------------
14 Camera sensors have an internal clock tree including a PLL and a number of
15 divisors. The clock tree is generally configured by the driver based on a few
16 input parameters that are specific to the hardware:: the external clock frequency
20 The reason why the clock frequencies are so important is that the clock signals
23 elsewhere. Therefore only the pre-determined frequencies are configurable by the
[all …]
/kernel/linux/linux-6.6/include/linux/platform_data/
Dad7793.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * enum ad7793_clock_source - AD7793 clock source selection
12 * @AD7793_CLK_SRC_INT: Internal 64 kHz clock, not available at the CLK pin.
13 * @AD7793_CLK_SRC_INT_CO: Internal 64 kHz clock, available at the CLK pin.
14 * @AD7793_CLK_SRC_EXT: Use external clock.
15 * @AD7793_CLK_SRC_EXT_DIV2: Use external clock divided by 2.
25 * enum ad7793_bias_voltage - AD7793 bias voltage selection
27 * @AD7793_BIAS_VOLTAGE_AIN1: Bias voltage connected to AIN1(-).
28 * @AD7793_BIAS_VOLTAGE_AIN2: Bias voltage connected to AIN2(-).
29 * @AD7793_BIAS_VOLTAGE_AIN3: Bias voltage connected to AIN3(-).
[all …]
/kernel/linux/linux-5.10/include/linux/platform_data/
Dad7793.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * enum ad7793_clock_source - AD7793 clock source selection
12 * @AD7793_CLK_SRC_INT: Internal 64 kHz clock, not available at the CLK pin.
13 * @AD7793_CLK_SRC_INT_CO: Internal 64 kHz clock, available at the CLK pin.
14 * @AD7793_CLK_SRC_EXT: Use external clock.
15 * @AD7793_CLK_SRC_EXT_DIV2: Use external clock divided by 2.
25 * enum ad7793_bias_voltage - AD7793 bias voltage selection
27 * @AD7793_BIAS_VOLTAGE_AIN1: Bias voltage connected to AIN1(-).
28 * @AD7793_BIAS_VOLTAGE_AIN2: Bias voltage connected to AIN2(-).
29 * @AD7793_BIAS_VOLTAGE_AIN3: Bias voltage connected to AIN3(-).
[all …]
/kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/
Djh7110-starfive-visionfive-2-v1.3b.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include "jh7110-starfive-visionfive-2.dtsi"
12 compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
16 starfive,tx-use-rgmii-clk;
17 assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
18 assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
22 starfive,tx-use-rgmii-clk;
23 assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
24 assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/kernel/linux/linux-6.6/drivers/clk/sunxi/
Dclk-a20-gmac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2013 Chen-Yu Tsai
7 * Chen-Yu Tsai <wens@csie.org>
10 #include <linux/clk-provider.h>
19 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
21 * This clock looks something like this
23 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core
24 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY
25 * Ext. 125MHz RGMII TX clk >--|__divider__/ |
28 * The external 125 MHz reference is optional, i.e. GMAC can use its
[all …]
/kernel/linux/linux-5.10/drivers/clk/sunxi/
Dclk-a20-gmac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2013 Chen-Yu Tsai
7 * Chen-Yu Tsai <wens@csie.org>
10 #include <linux/clk-provider.h>
19 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
21 * This clock looks something like this
23 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core
24 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY
25 * Ext. 125MHz RGMII TX clk >--|__divider__/ |
28 * The external 125 MHz reference is optional, i.e. GMAC can use its
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/media/
Dcamera-sensor.rst1 .. SPDX-License-Identifier: GPL-2.0
6 CSI-2
7 -----
12 ---------------
14 Camera sensors have an internal clock tree including a PLL and a number of
15 divisors. The clock tree is generally configured by the driver based on a few
16 input parameters that are specific to the hardware:: the external clock frequency
20 The reason why the clock frequencies are so important is that the clock signals
23 elsewhere. Therefore only the pre-determined frequencies are configurable by the
27 ----------
[all …]
/kernel/linux/linux-6.6/include/linux/
Dtimekeeper_internal.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * handling code or timekeeping internal code!
15 * struct tk_read_base - base structure for timekeeping readout
16 * @clock: Current clocksource used for timekeeping.
18 * @cycle_last: @clock cycle value at last update
23 * @base_real: Nanoseconds base value for clock REALTIME readout
31 * @base_real is for the fast NMI safe accessor to allow reading clock
35 struct clocksource *clock; member
46 * struct timekeeper - Structure holding internal timekeeping values.
52 * @offs_real: Offset clock monotonic -> clock realtime
[all …]

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