| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,vic.txt | 5 nested or have the outputs wire-OR'd together.
9 - compatible : should be one of
10 "arm,pl190-vic"
11 "arm,pl192-vic"
12 - interrupt-controller : Identifies the node as an interrupt controller
13 - #interrupt-cells : The number of cells to define the interrupts. Must be 1 as
16 - reg : The register bank for the VIC.
20 - interrupts : Interrupt source for parent controllers if the VIC is nested.
21 - valid-mask : A one cell big bit mask of valid interrupt sources. Each bit
24 clear means otherwise. If unspecified, defaults to all valid.
[all …]
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| D | arm,versatile-fpga-irq.txt | 9 - compatible: "arm,versatile-fpga-irq" or "oxsemi,ox810se-rps-irq"
10 - interrupt-controller: Identifies the node as an interrupt controller
11 - #interrupt-cells: The number of cells to define the interrupts. Must be 1
14 - reg: The register bank for the FPGA interrupt controller.
15 - clear-mask: a u32 number representing the mask written to clear all IRQs
17 - valid-mask: a u32 number representing a bit mask determining which of
18 the interrupts are valid. Unconnected/unused lines are set to 0, and
25 compatible = "arm,versatile-fpga-irq";
26 #interrupt-cells = <1>;
27 interrupt-controller;
[all …]
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| /kernel/linux/linux-5.10/net/netlabel/ |
| D | netlabel_addrlist.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * Author: Paul Moore <paul@paul-moore.com>
14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2008
27 * struct netlbl_af4list - NetLabel IPv4 address list
29 * @mask: IPv4 address mask
30 * @valid: valid flag
35 __be32 mask; member
37 u32 valid; member
42 * struct netlbl_af6list - NetLabel IPv6 address list
44 * @mask: IPv6 address mask
[all …]
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| D | netlabel_addrlist.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Author: Paul Moore <paul@paul-moore.com>
14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2008
36 * netlbl_af4list_search - Search for a matching IPv4 address entry
52 if (iter->valid && (addr & iter->mask) == iter->addr) in netlbl_af4list_search()
59 * netlbl_af4list_search_exact - Search for an exact IPv4 address entry
61 * @mask: IPv4 address mask
71 __be32 mask, in netlbl_af4list_search_exact() argument
77 if (iter->valid && iter->addr == addr && iter->mask == mask) in netlbl_af4list_search_exact()
86 * netlbl_af6list_search - Search for a matching IPv6 address entry
[all …]
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| /kernel/linux/linux-6.6/net/netlabel/ |
| D | netlabel_addrlist.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * Author: Paul Moore <paul@paul-moore.com>
14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2008
27 * struct netlbl_af4list - NetLabel IPv4 address list
29 * @mask: IPv4 address mask
30 * @valid: valid flag
35 __be32 mask; member
37 u32 valid; member
42 * struct netlbl_af6list - NetLabel IPv6 address list
44 * @mask: IPv6 address mask
[all …]
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| D | netlabel_addrlist.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Author: Paul Moore <paul@paul-moore.com>
14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2008
36 * netlbl_af4list_search - Search for a matching IPv4 address entry
52 if (iter->valid && (addr & iter->mask) == iter->addr) in netlbl_af4list_search()
59 * netlbl_af4list_search_exact - Search for an exact IPv4 address entry
61 * @mask: IPv4 address mask
71 __be32 mask, in netlbl_af4list_search_exact() argument
77 if (iter->valid && iter->addr == addr && iter->mask == mask) in netlbl_af4list_search_exact()
86 * netlbl_af6list_search - Search for a matching IPv6 address entry
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,vic.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,vic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 be nested or have the outputs wire-OR'd together.
18 - $ref: /schemas/interrupt-controller.yaml#
23 - arm,pl190-vic
24 - arm,pl192-vic
25 - arm,versatile-vic
[all …]
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| D | arm,versatile-fpga-irq.txt | 9 - compatible: "arm,versatile-fpga-irq"
10 - interrupt-controller: Identifies the node as an interrupt controller
11 - #interrupt-cells: The number of cells to define the interrupts. Must be 1
14 - reg: The register bank for the FPGA interrupt controller.
15 - clear-mask: a u32 number representing the mask written to clear all IRQs
17 - valid-mask: a u32 number representing a bit mask determining which of
18 the interrupts are valid. Unconnected/unused lines are set to 0, and
22 The "oxsemi,ox810se-rps-irq" compatible is deprecated.
27 compatible = "arm,versatile-fpga-irq";
28 #interrupt-cells = <1>;
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_cle.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Applied Micro X-Gene SoC Ethernet Classifier structures
27 if (pdata->enet_id == XGENE_ENET1) { in xgene_cle_idt_to_hw()
41 buf[0] = SET_VAL(CLE_DROP, dbptr->drop); in xgene_cle_dbptr_to_hw()
42 buf[4] = SET_VAL(CLE_FPSEL, dbptr->fpsel) | in xgene_cle_dbptr_to_hw()
43 SET_VAL(CLE_NFPSEL, dbptr->nxtfpsel) | in xgene_cle_dbptr_to_hw()
44 SET_VAL(CLE_DSTQIDL, dbptr->dstqid); in xgene_cle_dbptr_to_hw()
46 buf[5] = SET_VAL(CLE_DSTQIDH, (u32)dbptr->dstqid >> CLE_DSTQIDL_LEN) | in xgene_cle_dbptr_to_hw()
47 SET_VAL(CLE_PRIORITY, dbptr->cle_priority); in xgene_cle_dbptr_to_hw()
55 buf[j++] = SET_VAL(CLE_TYPE, kn->node_type); in xgene_cle_kn_to_hw()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_cle.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Applied Micro X-Gene SoC Ethernet Classifier structures
27 if (pdata->enet_id == XGENE_ENET1) { in xgene_cle_idt_to_hw()
41 buf[0] = SET_VAL(CLE_DROP, dbptr->drop); in xgene_cle_dbptr_to_hw()
42 buf[4] = SET_VAL(CLE_FPSEL, dbptr->fpsel) | in xgene_cle_dbptr_to_hw()
43 SET_VAL(CLE_NFPSEL, dbptr->nxtfpsel) | in xgene_cle_dbptr_to_hw()
44 SET_VAL(CLE_DSTQIDL, dbptr->dstqid); in xgene_cle_dbptr_to_hw()
46 buf[5] = SET_VAL(CLE_DSTQIDH, (u32)dbptr->dstqid >> CLE_DSTQIDL_LEN) | in xgene_cle_dbptr_to_hw()
47 SET_VAL(CLE_PRIORITY, dbptr->cle_priority); in xgene_cle_dbptr_to_hw()
55 buf[j++] = SET_VAL(CLE_TYPE, kn->node_type); in xgene_cle_kn_to_hw()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/prestera/ |
| D | prestera_flower.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
19 prestera_acl_ruleset_put(template->ruleset); in prestera_flower_template_free()
20 list_del(&template->list); in prestera_flower_template_free()
29 list_for_each_entry_safe(template, tmp, &block->template_list, list) in prestera_flower_template_cleanup()
41 if (act->chain_index <= chain_index) in prestera_flower_parse_goto_action()
43 return -EINVAL; in prestera_flower_parse_goto_action()
45 if (rule->re_arg.jump.valid) in prestera_flower_parse_goto_action()
46 return -EEXIST; in prestera_flower_parse_goto_action()
48 ruleset = prestera_acl_ruleset_get(block->sw->acl, block, in prestera_flower_parse_goto_action()
49 act->chain_index); in prestera_flower_parse_goto_action()
[all …]
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-versatile-fpga.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Versatile FPGA-based IRQ controllers
10 #include <linux/irqchip/versatile-fpga.h>
35 * struct fpga_irq_data - irq data container for the FPGA IRQ controller
39 * @valid: mask for valid IRQs on this controller
45 u32 valid; member
57 u32 mask = 1 << d->hwirq; in fpga_irq_mask() local
59 writel(mask, f->base + IRQ_ENABLE_CLEAR); in fpga_irq_mask()
65 u32 mask = 1 << d->hwirq; in fpga_irq_unmask() local
67 writel(mask, f->base + IRQ_ENABLE_SET); in fpga_irq_unmask()
[all …]
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| /kernel/linux/linux-6.6/drivers/irqchip/ |
| D | irq-versatile-fpga.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Versatile FPGA-based IRQ controllers
35 * struct fpga_irq_data - irq data container for the FPGA IRQ controller
38 * @valid: mask for valid IRQs on this controller
43 u32 valid; member
55 u32 mask = 1 << d->hwirq; in fpga_irq_mask() local
57 writel(mask, f->base + IRQ_ENABLE_CLEAR); in fpga_irq_mask()
63 u32 mask = 1 << d->hwirq; in fpga_irq_unmask() local
65 writel(mask, f->base + IRQ_ENABLE_SET); in fpga_irq_unmask()
72 seq_printf(p, irq_domain_get_of_node(f->domain)->name); in fpga_irq_print_chip()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| D | macsec_struct.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
21 /*! The match mask is per-nibble. 0 means don't care, i.e. every value
68 /*! This is to specify the 40bit SNAP header if the SNAP header's mask
72 /*! This is to specify the 24bit LLC header if the LLC header's mask is
122 /*! Mask is per-byte.
132 * 1: enable comparison of extracted VLAN Valid field.
135 /*! This is bit mask to enable comparison the 8 bit TCI field,
142 /*! Mask is per-byte.
151 /*! Mask is per-byte.
156 /*! Mask is per-byte.
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| D | macsec_struct.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
21 /*! The match mask is per-nibble. 0 means don't care, i.e. every value
68 /*! This is to specify the 40bit SNAP header if the SNAP header's mask
72 /*! This is to specify the 24bit LLC header if the LLC header's mask is
122 /*! Mask is per-byte.
132 * 1: enable comparison of extracted VLAN Valid field.
135 /*! This is bit mask to enable comparison the 8 bit TCI field,
142 /*! Mask is per-byte.
151 /*! Mask is per-byte.
156 /*! Mask is per-byte.
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/pensando/ionic/ |
| D | ionic_regs.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) OR BSD-2-Clause */
2 /* Copyright (c) 2018-2019 Pensando Systems, Inc. All rights reserved. */
9 /** struct ionic_intr - interrupt control register set.
11 * @mask: interrupt mask value.
13 * @mask_assert: interrupt mask value on assert.
18 u32 mask; member
28 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
30 * @IONIC_INTR_MASK_SET: mask interrupt.
37 /** enum ionic_intr_credits_bits - bitwise composition of credits values.
38 * @IONIC_INTR_CRED_COUNT: bit mask of credit count, no shift needed.
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/pensando/ionic/ |
| D | ionic_regs.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) OR BSD-2-Clause */
2 /* Copyright (c) 2018-2019 Pensando Systems, Inc. All rights reserved. */
9 /** struct ionic_intr - interrupt control register set.
11 * @mask: interrupt mask value.
13 * @mask_assert: interrupt mask value on assert.
18 u32 mask; member
28 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
30 * @IONIC_INTR_MASK_SET: mask interrupt.
37 /** enum ionic_intr_credits_bits - bitwise composition of credits values.
38 * @IONIC_INTR_CRED_COUNT: bit mask of credit count, no shift needed.
[all …]
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| /kernel/linux/linux-6.6/arch/x86/events/amd/ |
| D | lbr.c | 1 // SPDX-License-Identifier: GPL-2.0
7 /* LBR Branch Select valid bits */
33 #define LBR_NOT_SUPP -1 /* unsupported filter */
56 u64 valid:1; member
92 u32 shift = 64 - boot_cpu_data.x86_virt_bits; in sign_ext_branch_ip()
100 int br_sel = cpuc->br_sel, offset, type, i, j; in amd_pmu_lbr_filter()
110 for (i = 0; i < cpuc->lbr_stack.nr; i++) { in amd_pmu_lbr_filter()
111 from = cpuc->lbr_entries[i].from; in amd_pmu_lbr_filter()
112 to = cpuc->lbr_entries[i].to; in amd_pmu_lbr_filter()
121 cpuc->lbr_entries[i].from += offset; in amd_pmu_lbr_filter()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | s3c6400.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
23 valid-mask = <0xfffffe1f>;
24 valid-wakeup-mask = <0x00200004>;
28 valid-mask = <0xffffffff>;
29 valid-wakeup-mask = <0x53020000>;
33 clocks: clock-controller@7e00f000 {
34 compatible = "samsung,s3c6400-clock";
36 #clock-cells = <1>;
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| D | s3c6410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
27 valid-mask = <0xffffff7f>;
28 valid-wakeup-mask = <0x00200004>;
32 valid-mask = <0xffffffff>;
33 valid-wakeup-mask = <0x53020000>;
37 clocks: clock-controller@7e00f000 {
38 compatible = "samsung,s3c6410-clock";
40 #clock-cells = <1>;
44 compatible = "samsung,s3c2440-i2c";
46 interrupt-parent = <&vic0>;
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | s3c6400.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
23 valid-mask = <0xfffffe1f>;
24 valid-wakeup-mask = <0x00200004>;
28 valid-mask = <0xffffffff>;
29 valid-wakeup-mask = <0x53020000>;
33 clocks: clock-controller@7e00f000 {
34 compatible = "samsung,s3c6400-clock";
36 #clock-cells = <1>;
|
| D | s3c6410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
27 valid-mask = <0xffffff7f>;
28 valid-wakeup-mask = <0x00200004>;
32 valid-mask = <0xffffffff>;
33 valid-wakeup-mask = <0x53020000>;
37 clocks: clock-controller@7e00f000 {
38 compatible = "samsung,s3c6410-clock";
40 #clock-cells = <1>;
44 compatible = "samsung,s3c2440-i2c";
46 interrupt-parent = <&vic0>;
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ipa/ |
| D | ipa_smp2p.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2020 Linaro Ltd.
34 * whether the clock is enabled using two SMP2P state bits--one to
36 * clock state bit is valid. The modem will poll the valid bit until it
44 * struct ipa_smp2p - IPA SMP2P information
46 * @valid_state: SMEM state indicating enabled state is valid
48 * @valid_bit: Valid bit in 32-bit SMEM state mask
49 * @enabled_bit: Enabled bit in 32-bit SMEM state mask
50 * @enabled_bit: Enabled bit in 32-bit SMEM state mask
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ipa/ |
| D | ipa_smp2p.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2022 Linaro Ltd.
35 * whether power is enabled using two SMP2P state bits--one to indicate
37 * bit is valid. The modem will poll the valid bit until it is set, and
45 * struct ipa_smp2p - IPA SMP2P information
47 * @valid_state: SMEM state indicating enabled state is valid
49 * @valid_bit: Valid bit in 32-bit SMEM state mask
50 * @enabled_bit: Enabled bit in 32-bit SMEM state mask
51 * @enabled_bit: Enabled bit in 32-bit SMEM state mask
[all …]
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| /kernel/liteos_m/kernel/include/ |
| D | los_event.h | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
68 * Bit 25 of the event mask cannot be set to an event because it is set to an error code.
72 * Solution: Set bits excluding bit 25 of the event mask to events.
81 …* Solution: Increase the waiting time for event reading, or make another task write a mask for the…
87 …* Event reading error code: The EVENTMASK input parameter value is valid. The input parameter valu…
91 * Solution: Pass in a valid EVENTMASK value.
114 * Solution: Pass in a valid uwFlags value.
160 * Event reading error code: The event is being read in a system-level task.
163 * Solution: Read the event in a valid task.
[all …]
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