| /kernel/linux/linux-5.10/drivers/clk/versatile/ |
| D | clk-icst.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the ICST307 VCO clock found in the ARM Reference designs.
7 * Copyright (C) 2012-2015 Linus Walleij
17 #include <linux/clk-provider.h>
23 #include "clk-icst.h"
37 * struct clk_icst - ICST VCO clock wrapper
39 * @vcoreg: VCO register address
40 * @lockreg: VCO lock register address
58 * vco_get() - get ICST VCO settings from a certain ICST
60 * @vco: the VCO struct to return the value in
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| D | clk-icst.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * enum icst_control_type - the type of ICST control register
18 * struct clk_icst_desc - descriptor for the ICST VCO
20 * @vco_offset: offset to the ICST VCO from the provided memory base
21 * @lock_offset: offset to the ICST VCO locking register from the provided
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| /kernel/linux/linux-6.6/drivers/clk/versatile/ |
| D | clk-icst.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the ICST307 VCO clock found in the ARM Reference designs.
7 * Copyright (C) 2012-2015 Linus Walleij
17 #include <linux/clk-provider.h>
23 #include "clk-icst.h"
37 * struct clk_icst - ICST VCO clock wrapper
40 * @vcoreg_off: VCO register address
41 * @lockreg_off: VCO lock register address
59 * vco_get() - get ICST VCO settings from a certain ICST
61 * @vco: the VCO struct to return the value in
[all …]
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| D | clk-icst.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * enum icst_control_type - the type of ICST control register
18 * struct clk_icst_desc - descriptor for the ICST VCO
20 * @vco_offset: offset to the ICST VCO from the provided memory base
21 * @lock_offset: offset to the ICST VCO locking register from the provided
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | arm,syscon-icst.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linusw@kernel.org>
19 an ICST clock request after a write to the 32 bit register at an offset
22 writing a special token to another offset in the system controller.
25 connects the low 8 bits of the VDW (missing one bit), hard-wires RDW to
26 different values and sometimes also hard-wires the output divider. They
38 integratorap-cm
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/bcm/ |
| D | clk-iproc-pll.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
13 #include "clk-iproc.h"
19 * PLL MACRO_SELECT modes 0 to 5 choose pre-calculated PLL output frequencies
20 * from a look-up table. Mode 7 allows user to manipulate PLL clock dividers
27 /* number of VCO frequency bands */
90 return -EINVAL; in pll_calc_param()
92 residual = target_rate - (ndiv_int * parent_rate); in pll_calc_param()
102 vco_out->ndiv_int = ndiv_int; in pll_calc_param()
103 vco_out->ndiv_frac = ndiv_frac; in pll_calc_param()
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| D | clk-iproc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <linux/clk-provider.h>
17 #define bit_mask(width) ((1 << (width)) - 1)
62 * auto calculates VCO frequency parameters based on the provided leaf
79 * Parameters for VCO frequency configuration
81 * VCO frequency =
92 unsigned int offset; member
101 unsigned int offset; member
111 unsigned int offset; member
121 unsigned int offset; member
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| /kernel/linux/linux-5.10/drivers/clk/bcm/ |
| D | clk-iproc-pll.c | 16 #include <linux/clk-provider.h>
23 #include "clk-iproc.h"
29 * PLL MACRO_SELECT modes 0 to 5 choose pre-calculated PLL output frequencies
30 * from a look-up table. Mode 7 allows user to manipulate PLL clock dividers
37 /* number of VCO frequency bands */
100 return -EINVAL; in pll_calc_param()
102 residual = target_rate - (ndiv_int * parent_rate); in pll_calc_param()
112 vco_out->ndiv_int = ndiv_int; in pll_calc_param()
113 vco_out->ndiv_frac = ndiv_frac; in pll_calc_param()
114 vco_out->pdiv = 1; in pll_calc_param()
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| D | clk-iproc.h | 23 #include <linux/clk-provider.h>
27 #define bit_mask(width) ((1 << (width)) - 1)
72 * auto calculates VCO frequency parameters based on the provided leaf
89 * Parameters for VCO frequency configuration
91 * VCO frequency =
102 unsigned int offset; member
111 unsigned int offset; member
121 unsigned int offset; member
131 unsigned int offset; member
140 unsigned int offset; member
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | arm,syscon-icst.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linusw@kernel.org>
19 an ICST clock request after a write to the 32 bit register at an offset
22 writing a special token to another offset in the system controller.
25 connects the low 8 bits of the VDW (missing one bit), hard-wires RDW to
26 different values and sometimes also hard-wires the output divider. They
38 integratorap-cm
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ingenic/ |
| D | cgu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 2013-2015 Imagination Technologies
13 #include <linux/clk-provider.h>
18 * struct ingenic_cgu_pll_info - information about a PLL
19 * @reg: the offset of the PLL's control register within the CGU
33 * @od_shift: the number of bits to shift the post-VCO divider value by (ie.
34 * the index of the lowest bit of the post-VCO divider value in
36 * @od_bits: the size of the post-VCO divider field in bits
37 * @od_max: the maximum post-VCO divider value
38 * @od_encoding: a pointer to an array mapping post-VCO divider values to
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ingenic/ |
| D | cgu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 2013-2015 Imagination Technologies
13 #include <linux/clk-provider.h>
18 * struct ingenic_cgu_pll_info - information about a PLL
19 * @reg: the offset of the PLL's control register within the CGU
33 * @od_shift: the number of bits to shift the post-VCO divider value by (ie.
34 * the index of the lowest bit of the post-VCO divider value in
36 * @od_bits: the size of the post-VCO divider field in bits, or 0 if no
38 * @od_max: the maximum post-VCO divider value
39 * @od_encoding: a pointer to an array mapping post-VCO divider values to
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | arm-realview-pb11mp.dts | 23 /dts-v1/;
24 #include <dt-bindings/interrupt-controller/irq.h>
25 #include <dt-bindings/gpio/gpio.h>
28 #address-cells = <1>;
29 #size-cells = <1>;
31 compatible = "arm,realview-pb11mp";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 enable-method = "arm,realview-smp";
60 next-level-cache = <&L2>;
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| D | arm-realview-eb.dtsi | 23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "arm,realview-eb";
49 compatible = "regulator-fixed";
50 regulator-name = "vmmc";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-boot-on;
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| D | integratorap.dts | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "arm,integrator-ap";
16 #address-cells = <1>;
17 #size-cells = <0>;
27 /* compatible = "arm,arm926ej-s"; */
30 * The documentation in ARM DUI 0138E page 3-12 states
32 * but painful trial-and-error has proved to me that it
[all …]
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| D | arm-realview-pbx.dtsi | 23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "arm,realview-pbx";
49 vmmc: regulator-vmmc {
50 compatible = "regulator-fixed";
51 regulator-name = "vmmc";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
[all …]
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| D | arm-realview-pb1176.dts | 23 /dts-v1/;
24 #include <dt-bindings/interrupt-controller/irq.h>
25 #include <dt-bindings/gpio/gpio.h>
28 #address-cells = <1>;
29 #size-cells = <1>;
31 compatible = "arm,realview-pb1176";
50 vmmc: regulator-vmmc {
51 compatible = "regulator-fixed";
52 regulator-name = "vmmc";
53 regulator-min-microvolt = <3300000>;
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/arm/ |
| D | arm-realview-eb.dtsi | 23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "arm,realview-eb";
49 compatible = "regulator-fixed";
50 regulator-name = "vmmc";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-boot-on;
[all …]
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| D | integratorap.dts | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "arm,integrator-ap";
16 #address-cells = <1>;
17 #size-cells = <0>;
27 /* compatible = "arm,arm926ej-s"; */
30 * The documentation in ARM DUI 0138E page 3-12 states
32 * but painful trial-and-error has proved to me that it
[all …]
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| D | arm-realview-pb11mp.dts | 23 /dts-v1/;
24 #include <dt-bindings/interrupt-controller/irq.h>
25 #include <dt-bindings/gpio/gpio.h>
28 #address-cells = <1>;
29 #size-cells = <1>;
31 compatible = "arm,realview-pb11mp";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 enable-method = "arm,realview-smp";
60 next-level-cache = <&L2>;
[all …]
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| D | arm-realview-pbx.dtsi | 23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "arm,realview-pbx";
49 vmmc: regulator-vmmc {
50 compatible = "regulator-fixed";
51 regulator-name = "vmmc";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | clk-alpha-pll.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/clk-provider.h>
8 #include "clk-regmap.h"
50 #define VCO(a, b, c) { \ macro
57 * struct clk_alpha_pll - phase locked loop (PLL)
58 * @offset: base address of registers
59 * @vco_table: array of VCO settings
64 u32 offset; member
78 * struct clk_alpha_pll_postdiv - phase locked loop (PLL) post-divider
79 * @offset: base address of registers
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| /kernel/linux/linux-6.6/drivers/media/tuners/ |
| D | max2165.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include "tuner-i2c.h"
38 msg.addr = priv->config->i2c_address; in max2165_write_reg()
43 ret = i2c_transfer(priv->i2c, &msg, 1); in max2165_write_reg()
49 return (ret != 1) ? -EIO : 0; in max2165_write_reg()
55 u8 dev_addr = priv->config->i2c_address; in max2165_read_reg()
64 ret = i2c_transfer(priv->i2c, msg, 2); in max2165_read_reg()
67 return -EIO; in max2165_read_reg()
104 priv->tf_ntch_low_cfg = dat[0] >> 4; in max2165_read_rom_table()
105 priv->tf_ntch_hi_cfg = dat[0] & 0x0F; in max2165_read_rom_table()
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| /kernel/linux/linux-5.10/drivers/media/tuners/ |
| D | max2165.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include "tuner-i2c.h"
38 msg.addr = priv->config->i2c_address; in max2165_write_reg()
43 ret = i2c_transfer(priv->i2c, &msg, 1); in max2165_write_reg()
49 return (ret != 1) ? -EIO : 0; in max2165_write_reg()
55 u8 dev_addr = priv->config->i2c_address; in max2165_read_reg()
64 ret = i2c_transfer(priv->i2c, msg, 2); in max2165_read_reg()
67 return -EIO; in max2165_read_reg()
104 priv->tf_ntch_low_cfg = dat[0] >> 4; in max2165_read_rom_table()
105 priv->tf_ntch_hi_cfg = dat[0] & 0x0F; in max2165_read_rom_table()
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| D | clk.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <linux/clk-provider.h>
73 * struct tegra_clk_sync_source - external clock source from codec
75 * @hw: handle between common and hardware-specific interfaces
95 * struct tegra_clk_frac_div - fractional divider clock
97 * @hw: handle between common and hardware-specific interfaces
99 * @flags: hardware-specific flags
106 * TEGRA_DIVIDER_ROUND_UP - This flags indicates to round up the divider value.
107 * TEGRA_DIVIDER_FIXED - Fixed rate PLL dividers has addition override bit, this
109 * TEGRA_DIVIDER_INT - Some modules can not cope with the duty cycle when
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