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Searched +full:vcu +full:- +full:settings (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/xilinx/
Dxlnx,vcu-settings.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/xilinx/xlnx,vcu-settings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx VCU Settings
10 - Michael Tretter <kernel@pengutronix.de>
13 The Xilinx VCU Settings provides information about the configuration of the
19 - const: xlnx,vcu-settings
20 - const: syscon
26 - compatible
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/kernel/linux/linux-6.6/drivers/clk/xilinx/
Dxlnx_vcu.c1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx VCU Init
5 * Copyright (C) 2016 - 2017 Xilinx, Inc.
11 #include <linux/clk-provider.h>
16 #include <linux/mfd/syscon/xlnx-vcu.h>
22 #include <dt-bindings/clock/xlnx-vcu.h>
50 * struct xvcu_device - Xilinx VCU init device structure
56 * @pll: handle for the VCU PLL
57 * @pll_post: handle for the VCU PLL post divider
58 * @clk_data: clocks provided by the vcu clock provider
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/kernel/linux/linux-5.10/drivers/soc/xilinx/
Dxlnx_vcu.c1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx VCU Init
5 * Copyright (C) 2016 - 2017 Xilinx, Inc.
17 /* Address map for different registers implemented in the VCU LogiCORE IP. */
47 /* vcu slcr registers, bitmask and shift */
97 * struct xvcu_device - Xilinx VCU init device structure
115 * struct xvcu_pll_cfg - Helper data
120 * @lock_dly: Lock circuit configuration settings for lock windowsize
237 * xvcu_read - Read from the VCU register space
238 * @iomem: vcu reg space base address
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/kernel/linux/linux-6.6/drivers/media/platform/allegro-dvt/
Dallegro-core.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/xlnx-vcu.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-event.h>
29 #include <media/v4l2-ioctl.h>
30 #include <media/v4l2-mem2mem.h>
31 #include <media/videobuf2-dma-contig.h>
32 #include <media/videobuf2-v4l2.h>
34 #include "allegro-mail.h"
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/kernel/linux/linux-5.10/drivers/infiniband/hw/hfi1/
Dchip.c2 * Copyright(c) 2015 - 2020 Intel Corporation.
24 * - Redistributions of source code must retain the above copyright
26 * - Redistributions in binary form must reproduce the above copyright
30 * - Neither the name of Intel Corporation nor the names of its
73 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
119 #define SEC_SC_HALTED 0x4 /* per-context only */
120 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
128 * 0 - User Fecn Handling
129 * 1 - Vnic
130 * 2 - AIP
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Dhfi.h5 * Copyright(c) 2015-2020 Intel Corporation.
27 * - Redistributions of source code must retain the above copyright
29 * - Redistributions in binary form must reproduce the above copyright
33 * - Neither the name of Intel Corporation nor the names of its
53 #include <linux/dma-mapping.h>
67 #include <linux/i2c-algo-bit.h>
115 /* Offline Disabled Reason is 4-bits */
139 * per driver stats, either not device nor port-specific, or
149 __u64 sps_txerrs; /* tx-related packet errors */
150 __u64 sps_rcverrs; /* non-crc rcv packet errors */
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/kernel/linux/linux-6.6/drivers/infiniband/hw/hfi1/
Dchip.c1 // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
3 * Copyright(c) 2015 - 2020 Intel Corporation.
32 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
78 #define SEC_SC_HALTED 0x4 /* per-context only */
79 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
87 * 0 - User Fecn Handling
88 * 1 - Vnic
89 * 2 - AIP
90 * 3 - Verbs
101 #define emulator_rev(dd) ((dd)->irev >> 8)
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Dhfi.h1 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
3 * Copyright(c) 2020-2023 Cornelis Networks, Inc.
4 * Copyright(c) 2015-2020 Intel Corporation.
13 #include <linux/dma-mapping.h>
27 #include <linux/i2c-algo-bit.h>
74 /* Offline Disabled Reason is 4-bits */
98 * per driver stats, either not device nor port-specific, or
108 __u64 sps_txerrs; /* tx-related packet errors */
109 __u64 sps_rcverrs; /* non-crc rcv packet errors */
124 * First-cut criterion for "device is active" is
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