| /kernel/linux/linux-6.6/arch/mips/ath25/ |
| D | ar2315_regs.h | 79 #define AR2315_RESET_WARM_WLAN0_MAC 0x00000001 /* warm reset WLAN0 MAC */
80 #define AR2315_RESET_WARM_WLAN0_BB 0x00000002 /* warm reset WLAN0 BB */
81 #define AR2315_RESET_MPEGTS_RSVD 0x00000004 /* warm reset MPEG-TS */
82 #define AR2315_RESET_PCIDMA 0x00000008 /* warm reset PCI ahb/dma */
83 #define AR2315_RESET_MEMCTL 0x00000010 /* warm reset mem control */
84 #define AR2315_RESET_LOCAL 0x00000020 /* warm reset local bus */
85 #define AR2315_RESET_I2C_RSVD 0x00000040 /* warm reset I2C bus */
86 #define AR2315_RESET_SPI 0x00000080 /* warm reset SPI iface */
87 #define AR2315_RESET_UART0 0x00000100 /* warm reset UART0 */
88 #define AR2315_RESET_IR_RSVD 0x00000200 /* warm reset IR iface */
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| D | ar5312_regs.h | 110 #define AR5312_RESET_WARM_PROC 0x00001000 /* warm reset MIPS core */
111 #define AR5312_RESET_WARM_WLAN0_MAC 0x00002000 /* warm reset WLAN0 MAC */
112 #define AR5312_RESET_WARM_WLAN0_BB 0x00004000 /* warm reset WLAN0 BB */
114 #define AR5312_RESET_WARM_WLAN1_MAC 0x00020000 /* warm reset WLAN1 MAC */
115 #define AR5312_RESET_WARM_WLAN1_BB 0x00040000 /* warm reset WLAN1 BB */
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| /kernel/linux/linux-5.10/arch/mips/ath25/ |
| D | ar2315_regs.h | 79 #define AR2315_RESET_WARM_WLAN0_MAC 0x00000001 /* warm reset WLAN0 MAC */
80 #define AR2315_RESET_WARM_WLAN0_BB 0x00000002 /* warm reset WLAN0 BB */
81 #define AR2315_RESET_MPEGTS_RSVD 0x00000004 /* warm reset MPEG-TS */
82 #define AR2315_RESET_PCIDMA 0x00000008 /* warm reset PCI ahb/dma */
83 #define AR2315_RESET_MEMCTL 0x00000010 /* warm reset mem control */
84 #define AR2315_RESET_LOCAL 0x00000020 /* warm reset local bus */
85 #define AR2315_RESET_I2C_RSVD 0x00000040 /* warm reset I2C bus */
86 #define AR2315_RESET_SPI 0x00000080 /* warm reset SPI iface */
87 #define AR2315_RESET_UART0 0x00000100 /* warm reset UART0 */
88 #define AR2315_RESET_IR_RSVD 0x00000200 /* warm reset IR iface */
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| D | ar5312_regs.h | 110 #define AR5312_RESET_WARM_PROC 0x00001000 /* warm reset MIPS core */
111 #define AR5312_RESET_WARM_WLAN0_MAC 0x00002000 /* warm reset WLAN0 MAC */
112 #define AR5312_RESET_WARM_WLAN0_BB 0x00004000 /* warm reset WLAN0 BB */
114 #define AR5312_RESET_WARM_WLAN1_MAC 0x00020000 /* warm reset WLAN1 MAC */
115 #define AR5312_RESET_WARM_WLAN1_BB 0x00040000 /* warm reset WLAN1 BB */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | soc-ac97link.txt | 10 "ac97-warm-reset": AC97-link warm reset state
20 pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | soc-ac97link.txt | 10 "ac97-warm-reset": AC97-link warm reset state
20 pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
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| /kernel/linux/linux-6.6/sound/ |
| D | ac97_bus.c | 44 * @try_warm: Try a warm reset first
49 * first performs a warm reset. If the warm reset is successful the function
51 * followed by a warm reset. If this is successful the function returns 0,
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| /kernel/linux/linux-5.10/sound/ |
| D | ac97_bus.c | 44 * @try_warm: Try a warm reset first
49 * first performs a warm reset. If the warm reset is successful the function
51 * followed by a warm reset. If this is successful the function returns 0,
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 30 - st,warm-reset : If present reset type will be 'warm' - if not it will be cold
40 st,warm-reset;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 30 - st,warm-reset : If present reset type will be 'warm' - if not it will be cold
40 st,warm-reset;
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| /kernel/linux/linux-6.6/arch/arm/mach-tegra/ |
| D | platsmp.c | 80 * The power up sequence of cold boot CPU and warm boot CPU in tegra30_boot_secondary()
83 * For warm boot CPU that was resumed from CPU hotplug, the in tegra30_boot_secondary()
85 * flow controller of the warm boot CPU. We need to wait for in tegra30_boot_secondary()
137 * Warm boot flow in tegra114_boot_secondary()
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| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| D | platsmp.c | 80 * The power up sequence of cold boot CPU and warm boot CPU in tegra30_boot_secondary()
83 * For warm boot CPU that was resumed from CPU hotplug, the in tegra30_boot_secondary()
85 * flow controller of the warm boot CPU. We need to wait for in tegra30_boot_secondary()
137 * Warm boot flow in tegra114_boot_secondary()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/ |
| D | palmas-pmic.txt | 40 ti,warm-reset - maintain voltage during warm reset(boolean)
77 ti,warm-reset;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | palmas-pmic.txt | 40 ti,warm-reset - maintain voltage during warm reset(boolean)
77 ti,warm-reset;
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| /kernel/linux/linux-5.10/arch/ia64/include/asm/ |
| D | mca.h | 119 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
126 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
177 #define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
182 #define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
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| /kernel/linux/linux-6.6/arch/ia64/include/asm/ |
| D | mca.h | 116 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
123 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
174 #define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
179 #define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
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| /kernel/linux/linux-5.10/Documentation/ide/ |
| D | warm-plug-howto.rst | 2 IDE warm-plug HOWTO
5 To warm-plug devices on a port 'idex'::
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| /kernel/linux/linux-6.6/drivers/usb/host/ |
| D | xhci-port.h | 74 /* true: warm reset for a USB 3.0 device is done. A "hot" reset puts the port
75 * into an enabled state, and the device into the default state. A "warm" reset
77 * SW can also look at the Port Reset register to see when warm reset is done.
105 * Sx state. Warm port reset should be perfomed to clear this bit and move port
118 /* Initiate a warm port reset - complete when PORT_WRC is '1' */
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| /kernel/linux/linux-6.6/drivers/media/dvb-frontends/ |
| D | tda10071.c | 46 if (!dev->warm) { in tda10071_cmd_execute()
97 if (!dev->warm) { in tda10071_set_tone()
142 if (!dev->warm) { in tda10071_set_voltage()
188 if (!dev->warm) { in tda10071_diseqc_send_master_cmd()
248 if (!dev->warm) { in tda10071_diseqc_recv_slave_reply()
309 if (!dev->warm) { in tda10071_diseqc_send_burst()
375 if (!dev->warm) { in tda10071_read_status()
564 if (!dev->warm) { in tda10071_set_frontend()
700 if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) { in tda10071_get_frontend()
819 if (dev->warm) { in tda10071_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | tda10071.c | 46 if (!dev->warm) { in tda10071_cmd_execute()
97 if (!dev->warm) { in tda10071_set_tone()
142 if (!dev->warm) { in tda10071_set_voltage()
188 if (!dev->warm) { in tda10071_diseqc_send_master_cmd()
248 if (!dev->warm) { in tda10071_diseqc_recv_slave_reply()
309 if (!dev->warm) { in tda10071_diseqc_send_burst()
375 if (!dev->warm) { in tda10071_read_status()
564 if (!dev->warm) { in tda10071_set_frontend()
700 if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) { in tda10071_get_frontend()
819 if (dev->warm) { in tda10071_init()
[all …]
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| /kernel/linux/linux-6.6/drivers/staging/blackbox/ |
| D | Kconfig | 31 panic occurs. It depends on supporting warm reset and disabling erase
32 ddr when warm reset.
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| /kernel/linux/linux-5.10/drivers/staging/blackbox/ |
| D | Kconfig | 31 panic occurs. It depends on supporting warm reset and disabling erase
32 ddr when warm reset.
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | altera-a10sr.h | 60 #define ALTR_A10SR_WARM_RST_REG 0x1A /* HPS Warm Reset */
61 #define ALTR_A10SR_WR_KEY_REG 0x1C /* HPS Warm Reset Key */
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| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | altera-a10sr.h | 60 #define ALTR_A10SR_WARM_RST_REG 0x1A /* HPS Warm Reset */
61 #define ALTR_A10SR_WR_KEY_REG 0x1C /* HPS Warm Reset Key */
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| /kernel/linux/linux-5.10/net/wimax/ |
| D | op-reset.c | 11 * Resets aim at being warm, keeping the device handles active;
34 * %0 if ok and a warm reset was done (the device still exists in
|