| /kernel/linux/linux-5.10/arch/nios2/mm/ |
| D | tlb.c | 47 unsigned int way; in replace_tlb_one_pid() local 50 /* remember pid/way until we return. */ in replace_tlb_one_pid() 55 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in replace_tlb_one_pid() 60 tlbmisc = TLBMISC_RD | (way << TLBMISC_WAY_SHIFT); in replace_tlb_one_pid() 73 (way << TLBMISC_WAY_SHIFT); in replace_tlb_one_pid() 126 unsigned int way; in flush_tlb_one() local 131 /* remember pid/way until we return. */ in flush_tlb_one() 136 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one() 140 tlbmisc = TLBMISC_RD | (way << TLBMISC_WAY_SHIFT); in flush_tlb_one() 147 pr_debug("Flush entry by writing way=%dl pid=%ld\n", in flush_tlb_one() [all …]
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| /kernel/linux/linux-6.6/arch/nios2/mm/ |
| D | tlb.c | 47 unsigned int way; in replace_tlb_one_pid() local 50 /* remember pid/way until we return. */ in replace_tlb_one_pid() 55 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in replace_tlb_one_pid() 60 tlbmisc = TLBMISC_RD | (way << TLBMISC_WAY_SHIFT); in replace_tlb_one_pid() 73 (way << TLBMISC_WAY_SHIFT); in replace_tlb_one_pid() 126 unsigned int way; in flush_tlb_one() local 131 /* remember pid/way until we return. */ in flush_tlb_one() 136 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one() 140 tlbmisc = TLBMISC_RD | (way << TLBMISC_WAY_SHIFT); in flush_tlb_one() 147 pr_debug("Flush entry by writing way=%dl pid=%ld\n", in flush_tlb_one() [all …]
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| /kernel/linux/linux-5.10/arch/x86/kernel/cpu/ |
| D | cacheinfo.c | 45 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */ 46 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */ 47 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */ 48 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */ 49 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */ 50 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */ 51 { 0x0e, LVL_1_DATA, 24 }, /* 6-way set assoc, 64 byte line size */ 52 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */ 53 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */ 54 { 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */ [all …]
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| /kernel/linux/linux-6.6/arch/x86/kernel/cpu/ |
| D | cacheinfo.c | 60 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */ 61 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */ 62 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */ 63 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */ 64 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */ 65 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */ 66 { 0x0e, LVL_1_DATA, 24 }, /* 6-way set assoc, 64 byte line size */ 67 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */ 68 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */ 69 { 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */ [all …]
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| /kernel/linux/linux-6.6/arch/sh/mm/ |
| D | cache-sh2a.c | 26 static void sh2a_flush_oc_line(unsigned long v, int way) in sh2a_flush_oc_line() argument 28 unsigned long addr = (v & 0x000007f0) | (way << 11); in sh2a_flush_oc_line() 76 int way; in sh2a__flush_wback_region() local 77 for (way = 0; way < nr_ways; way++) { in sh2a__flush_wback_region() 79 sh2a_flush_oc_line(v, way); in sh2a__flush_wback_region() 106 int way; in sh2a__flush_purge_region() local 108 for (way = 0; way < nr_ways; way++) in sh2a__flush_purge_region() 109 sh2a_flush_oc_line(v, way); in sh2a__flush_purge_region()
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| D | cache-sh2.c | 28 int way; in sh2__flush_wback_region() local 29 for (way = 0; way < 4; way++) { in sh2__flush_wback_region() 30 unsigned long data = __raw_readl(addr | (way << 12)); in sh2__flush_wback_region() 33 __raw_writel(data, addr | (way << 12)); in sh2__flush_wback_region()
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| /kernel/linux/linux-5.10/arch/sh/mm/ |
| D | cache-sh2a.c | 26 static void sh2a_flush_oc_line(unsigned long v, int way) in sh2a_flush_oc_line() argument 28 unsigned long addr = (v & 0x000007f0) | (way << 11); in sh2a_flush_oc_line() 76 int way; in sh2a__flush_wback_region() local 77 for (way = 0; way < nr_ways; way++) { in sh2a__flush_wback_region() 79 sh2a_flush_oc_line(v, way); in sh2a__flush_wback_region() 106 int way; in sh2a__flush_purge_region() local 108 for (way = 0; way < nr_ways; way++) in sh2a__flush_purge_region() 109 sh2a_flush_oc_line(v, way); in sh2a__flush_purge_region()
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| D | cache-sh2.c | 28 int way; in sh2__flush_wback_region() local 29 for (way = 0; way < 4; way++) { in sh2__flush_wback_region() 30 unsigned long data = __raw_readl(addr | (way << 12)); in sh2__flush_wback_region() 33 __raw_writel(data, addr | (way << 12)); in sh2__flush_wback_region()
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| D | cache-debugfs.c | 29 unsigned int waysize, way; in cache_seq_show() local 66 for (way = 0; way < cache->ways; way++) { in cache_seq_show() 71 seq_printf(file, "Way %d\n", way); in cache_seq_show()
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| /kernel/linux/linux-5.10/arch/xtensa/include/asm/ |
| D | tlbflush.h | 130 static inline void write_dtlb_entry (pte_t entry, int way) in write_dtlb_entry() argument 133 : : "r" (way), "r" (entry) ); in write_dtlb_entry() 136 static inline void write_itlb_entry (pte_t entry, int way) in write_itlb_entry() argument 139 : : "r" (way), "r" (entry) ); in write_itlb_entry() 176 static inline unsigned long read_dtlb_virtual (int way) in read_dtlb_virtual() argument 179 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_dtlb_virtual() 183 static inline unsigned long read_dtlb_translation (int way) in read_dtlb_translation() argument 186 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_dtlb_translation() 190 static inline unsigned long read_itlb_virtual (int way) in read_itlb_virtual() argument 193 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_itlb_virtual() [all …]
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| /kernel/linux/linux-6.6/arch/xtensa/include/asm/ |
| D | tlbflush.h | 130 static inline void write_dtlb_entry (pte_t entry, int way) in write_dtlb_entry() argument 133 : : "r" (way), "r" (entry) ); in write_dtlb_entry() 136 static inline void write_itlb_entry (pte_t entry, int way) in write_itlb_entry() argument 139 : : "r" (way), "r" (entry) ); in write_itlb_entry() 176 static inline unsigned long read_dtlb_virtual (int way) in read_dtlb_virtual() argument 179 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_dtlb_virtual() 183 static inline unsigned long read_dtlb_translation (int way) in read_dtlb_translation() argument 186 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_dtlb_translation() 190 static inline unsigned long read_itlb_virtual (int way) in read_itlb_virtual() argument 193 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_itlb_virtual() [all …]
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | cache-xsc3l2.c | 44 int set, way; in xsc3_l2_inv_all() local 49 for (way = 0; way < CACHE_WAY_PER_SET; way++) { in xsc3_l2_inv_all() 50 set_way = (way << 29) | (set << 5); in xsc3_l2_inv_all() 149 * optimize L2 flush all operation by set/way format 154 int set, way; in xsc3_l2_flush_all() local 159 for (way = 0; way < CACHE_WAY_PER_SET; way++) { in xsc3_l2_flush_all() 160 set_way = (way << 29) | (set << 5); in xsc3_l2_flush_all()
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| /kernel/linux/linux-6.6/arch/arm/mm/ |
| D | cache-xsc3l2.c | 44 int set, way; in xsc3_l2_inv_all() local 49 for (way = 0; way < CACHE_WAY_PER_SET; way++) { in xsc3_l2_inv_all() 50 set_way = (way << 29) | (set << 5); in xsc3_l2_inv_all() 149 * optimize L2 flush all operation by set/way format 154 int set, way; in xsc3_l2_flush_all() local 159 for (way = 0; way < CACHE_WAY_PER_SET; way++) { in xsc3_l2_flush_all() 160 set_way = (way << 29) | (set << 5); in xsc3_l2_flush_all()
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| /kernel/linux/linux-5.10/scripts/tracing/ |
| D | ftrace-bisect.sh | 25 # The old (slow) way, for kernels before v5.1. 27 # [old-way] # cat available_filter_functions > ~/full-file 29 # [old-way] *** Note *** this process will take several minutes to update the 30 # [old-way] filters. Setting multiple functions is an O(n^2) operation, and we 31 # [old-way] are dealing with thousands of functions. So go have coffee, talk 32 # [old-way] with your coworkers, read facebook. And eventually, this operation 33 # [old-way] will end. 35 # The new way (using numbers) is an O(n) operation, and usually takes less than a second. 45 # For either the new or old way, the rest of the operations remain the same. 78 # The way to figure out if the problem function is bad, just do:
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| /kernel/linux/linux-6.6/scripts/tracing/ |
| D | ftrace-bisect.sh | 25 # The old (slow) way, for kernels before v5.1. 27 # [old-way] # cat available_filter_functions > ~/full-file 29 # [old-way] *** Note *** this process will take several minutes to update the 30 # [old-way] filters. Setting multiple functions is an O(n^2) operation, and we 31 # [old-way] are dealing with thousands of functions. So go have coffee, talk 32 # [old-way] with your coworkers, read facebook. And eventually, this operation 33 # [old-way] will end. 35 # The new way (using numbers) is an O(n) operation, and usually takes less than a second. 45 # For either the new or old way, the rest of the operations remain the same. 78 # The way to figure out if the problem function is bad, just do:
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| /kernel/linux/linux-6.6/arch/x86/crypto/ |
| D | twofish_glue_3way.c | 3 * Glue Code for 3-way parallel assembler optimized version of Twofish 79 .base.cra_driver_name = "ecb-twofish-3way", 91 .base.cra_driver_name = "cbc-twofish-3way", 115 * On Atom, twofish-3way is slower than original assembler in is_blacklisted_cpu() 116 * implementation. Twofish-3way trades off some performance in in is_blacklisted_cpu() 128 * On Pentium 4, twofish-3way is slower than original assembler in is_blacklisted_cpu() 147 "twofish-x86_64-3way: performance on this CPU " in twofish_3way_init() 149 "twofish-x86_64-3way.\n"); in twofish_3way_init() 166 MODULE_DESCRIPTION("Twofish Cipher Algorithm, 3-way parallel asm optimized");
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| /kernel/linux/linux-6.6/arch/openrisc/include/asm/ |
| D | spr_defs.h | 72 #define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) argument 73 #define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) argument 74 #define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) argument 75 #define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) argument 80 #define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) argument 81 #define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) argument 82 #define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) argument 83 #define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) argument 92 #define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) argument 93 #define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) argument [all …]
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| /kernel/linux/linux-5.10/arch/openrisc/include/asm/ |
| D | spr_defs.h | 72 #define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) argument 73 #define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) argument 74 #define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) argument 75 #define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) argument 80 #define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) argument 81 #define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) argument 82 #define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) argument 83 #define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) argument 92 #define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) argument 93 #define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) argument [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/ |
| D | bcm2836.dtsi | 58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 61 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 75 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 86 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 89 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 100 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 103 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 118 cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
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| D | bcm2837.dtsi | 57 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 60 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 75 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 87 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 90 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 102 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 105 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 120 cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | bcm2837.dtsi | 58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 61 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 73 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 76 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 88 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 91 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 103 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 106 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 120 cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
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| /kernel/linux/linux-6.6/arch/arc/mm/ |
| D | tlb.c | 175 * Flush the entire MM for userland. The fastest way is to move to Next ASID 204 * -Here the fastest way (if range is too large) is to move to next ASID 688 #define SET_WAY_TO_IDX(mmu, set, way) ((set) * mmu->ways + (way)) argument 715 int is_valid, way; in do_tlb_overlap_fault() local 719 for (way = 0, is_valid = 0; way < n_ways; way++) { in do_tlb_overlap_fault() 721 SET_WAY_TO_IDX(mmu, set, way)); in do_tlb_overlap_fault() 723 pd0[way] = read_aux_reg(ARC_REG_TLBPD0); in do_tlb_overlap_fault() 724 is_valid |= pd0[way] & _PAGE_PRESENT; in do_tlb_overlap_fault() 725 pd0[way] &= PAGE_MASK; in do_tlb_overlap_fault() 733 for (way = 0; way < n_ways - 1; way++) { in do_tlb_overlap_fault() [all …]
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| /kernel/linux/linux-5.10/arch/x86/crypto/ |
| D | twofish_glue_3way.c | 3 * Glue Code for 3-way parallel assembler optimized version of Twofish 175 .base.cra_driver_name = "ecb-twofish-3way", 187 .base.cra_driver_name = "cbc-twofish-3way", 200 .base.cra_driver_name = "ctr-twofish-3way", 225 * On Atom, twofish-3way is slower than original assembler in is_blacklisted_cpu() 226 * implementation. Twofish-3way trades off some performance in in is_blacklisted_cpu() 238 * On Pentium 4, twofish-3way is slower than original assembler in is_blacklisted_cpu() 257 "twofish-x86_64-3way: performance on this CPU " in init() 259 "twofish-x86_64-3way.\n"); in init() 276 MODULE_DESCRIPTION("Twofish Cipher Algorithm, 3-way parallel asm optimized");
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| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | entry_64.rst | 28 either way. 36 magically-generated functions that make their way to do_IRQ with 64 Now, there's a secondary complication: there's a cheap way to test 65 which mode the CPU is in and an expensive way. 67 The cheap way is to pick this info off the entry frame on the kernel 75 The expensive (paranoid) way is to read back the MSR_GS_BASE value 96 stack but before we executed SWAPGS, then the only safe way to check
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| /kernel/linux/linux-6.6/Documentation/arch/x86/ |
| D | entry_64.rst | 28 either way. 36 magically-generated functions that make their way to common_interrupt() 64 Now, there's a secondary complication: there's a cheap way to test 65 which mode the CPU is in and an expensive way. 67 The cheap way is to pick this info off the entry frame on the kernel 75 The expensive (paranoid) way is to read back the MSR_GS_BASE value 96 stack but before we executed SWAPGS, then the only safe way to check
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