Searched +full:write +full:- +full:back (Results 1 – 25 of 1161) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/driver-api/md/ |
| D | raid5-cache.rst | 7 caches data to the RAID disks. The cache can be in write-through (supported 8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since 9 3.4) has a new option '--write-journal' to create array with cache. Please 11 in write-through mode. A user can switch it to write-back mode by:: 13 echo "write-back" > /sys/block/md0/md/journal_mode 15 And switch it back to write-through mode by:: 17 echo "write-through" > /sys/block/md0/md/journal_mode 22 write-through mode 25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean 27 and parity don't match. The reason is that a stripe write involves several RAID [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/md/ |
| D | raid5-cache.rst | 7 caches data to the RAID disks. The cache can be in write-through (supported 8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since 9 3.4) has a new option '--write-journal' to create array with cache. Please 11 in write-through mode. A user can switch it to write-back mode by:: 13 echo "write-back" > /sys/block/md0/md/journal_mode 15 And switch it back to write-through mode by:: 17 echo "write-through" > /sys/block/md0/md/journal_mode 22 write-through mode 25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean 27 and parity don't match. The reason is that a stripe write involves several RAID [all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-class-bdi | 14 non-block filesystems which provide their own BDI, such as NFS 17 MAJOR:MINOR-fuseblk 23 The default backing dev, used for non-block device backed 30 Size of the read-ahead window in kilobytes 32 (read-write) 38 total write-back cache that relates to its current average 42 percentage of the write-back cache to a particular device. 45 (read-write) 52 total write-back cache that relates to its current average 56 of the write-back cache to a particular device. The value is [all …]
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| D | debugfs-scmi-raw | 5 Description: SCMI Raw synchronous message injection/snooping facility; write 7 in little-endian binary format to have it sent to the configured 11 Each write to the entry causes one command request to be built 12 and sent while the replies are read back one message at time 20 Description: SCMI Raw asynchronous message injection/snooping facility; write 22 in little-endian binary format to have it sent to the configured 29 Each write to the entry causes one command request to be built 30 and sent while the replies are read back one message at time 38 Description: SCMI Raw message errors facility; any kind of timed-out or 41 Each read gives back one message at time (receiving an EOF at [all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ |
| D | armv8-recommended.json | 9 "PublicDescription": "Attributable Level 1 data cache access, write", 12 "BriefDescription": "L1D cache access, write" 21 "PublicDescription": "Attributable Level 1 data cache refill, write", 24 "BriefDescription": "L1D cache refill, write" 39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim", 42 "BriefDescription": "L1D cache Write-Back, victim" 45 "PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency", 48 "BriefDescription": "L1D cache Write-Back, cleaning and coherency" 63 "PublicDescription": "Attributable Level 1 data TLB refill, write", 66 "BriefDescription": "L1D tlb refill, write" [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/ |
| D | recommended.json | 9 "PublicDescription": "Attributable Level 1 data cache access, write", 12 "BriefDescription": "L1D cache access, write" 21 "PublicDescription": "Attributable Level 1 data cache refill, write", 24 "BriefDescription": "L1D cache refill, write" 39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim", 42 "BriefDescription": "L1D cache Write-Back, victim" 45 "PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency", 48 "BriefDescription": "L1D cache Write-Back, cleaning and coherency" 63 "PublicDescription": "Attributable Level 1 data TLB refill, write", 66 "BriefDescription": "L1D tlb refill, write" [all …]
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| /kernel/linux/linux-5.10/Documentation/scsi/ |
| D | sd-parameters.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 --------------- 9 Enable/disable drive write & read cache. 12 cache_type string WCE RCD Write cache Read cache 14 write through 0 0 off on 16 write back 1 0 on on 17 write back, no read (daft) 1 1 on off 20 To set cache type to "write back" and save this setting to the drive:: 22 # echo "write back" > cache_type 27 # echo "temporary write back" > cache_type
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| /kernel/linux/linux-6.6/Documentation/scsi/ |
| D | sd-parameters.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 --------------- 9 Enable/disable drive write & read cache. 12 cache_type string WCE RCD Write cache Read cache 14 write through 0 0 off on 16 write back 1 0 on on 17 write back, no read (daft) 1 1 on off 20 To set cache type to "write back" and save this setting to the drive:: 22 # echo "write back" > cache_type 27 # echo "temporary write back" > cache_type
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| /kernel/linux/linux-6.6/include/linux/ |
| D | counter.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 39 * struct counter_comp - Counter component node 41 * @name: device-specific component name 42 * @priv: component-relevant data 44 * respective Synapse action mode should be passed back via 47 * respective Device u8 component should be passed back via 50 * respective Count u8 component should be passed back via 53 * respective Signal u8 component should be passed back via 57 * back via the val parameter. 59 * respective Count u32 component should be passed back via [all …]
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-class-bdi | 14 non-block filesystems which provide their own BDI, such as NFS 17 MAJOR:MINOR-fuseblk 23 The default backing dev, used for non-block device backed 28 read_ahead_kb (read-write) 30 Size of the read-ahead window in kilobytes 32 min_ratio (read-write) 35 total write-back cache that relates to its current average 39 percentage of the write-back cache to a particular device. 42 max_ratio (read-write) 45 given percentage of the write-back cache. This is useful in [all …]
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| /kernel/linux/linux-6.6/arch/sh/include/asm/ |
| D | watchdog.h | 1 /* SPDX-License-Identifier: GPL-2.0+ 3 * include/asm-sh/watchdog.h 25 * See cpu-sh2/watchdog.h for explanation of this stupidity.. 36 * CKS0-2 supports a number of clock division ratios. At the time the watchdog 39 * lower than WTCSR_CKS_1024, else we drop back into the usec range. 42 * -------------------------------------------- 63 * sh_wdt_read_cnt - Read from Counter 64 * Reads back the WTCNT value. 72 * sh_wdt_write_cnt - Write to Counter 73 * @val: Value to write [all …]
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| /kernel/linux/linux-5.10/arch/sh/include/asm/ |
| D | watchdog.h | 1 /* SPDX-License-Identifier: GPL-2.0+ 3 * include/asm-sh/watchdog.h 25 * See cpu-sh2/watchdog.h for explanation of this stupidity.. 36 * CKS0-2 supports a number of clock division ratios. At the time the watchdog 39 * lower than WTCSR_CKS_1024, else we drop back into the usec range. 42 * -------------------------------------------- 63 * sh_wdt_read_cnt - Read from Counter 64 * Reads back the WTCNT value. 72 * sh_wdt_write_cnt - Write to Counter 73 * @val: Value to write [all …]
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | traps.h | 122 #define MMU_WP (0x0800) /* write-protected */ 142 /* bits for 68040 write back status word */ 173 #define MMU060_RW (0x01800000) /* read/write */ 174 # define MMU060_RW_W (0x00800000) /* write */ 176 # define MMU060_RW_RMW (0x01800000) /* read/modify/write */ 177 # define MMU060_W (0x00800000) /* general write, includes rmw */ 189 #define MMU060_WP (0x00000080) /* write protection */ 192 #define MMU060_WE (0x00000010) /* bus error on write */ 222 unsigned short wb3s; /* write back 3 status */ 223 unsigned short wb2s; /* write back 2 status */ [all …]
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| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | traps.h | 122 #define MMU_WP (0x0800) /* write-protected */ 142 /* bits for 68040 write back status word */ 173 #define MMU060_RW (0x01800000) /* read/write */ 174 # define MMU060_RW_W (0x00800000) /* write */ 176 # define MMU060_RW_RMW (0x01800000) /* read/modify/write */ 177 # define MMU060_W (0x00800000) /* general write, includes rmw */ 189 #define MMU060_WP (0x00000080) /* write protection */ 192 #define MMU060_WE (0x00000010) /* bus error on write */ 222 unsigned short wb3s; /* write back 3 status */ 223 unsigned short wb2s; /* write back 2 status */ [all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/ |
| D | cache.json | 33 …cess or Level 0 Macro-op cache access. This event counts any instruction fetch which accesses the … 39 …"PublicDescription": "L1 data cache Write-Back. This event counts any write-back of data from the … 42 "BriefDescription": "L1 data cache Write-Back" 45 …counts any transaction from L1 which looks up in the L2 cache, and any write-back from the L1 to t… 57 …write-back. This event counts any write-back of data from the L2 cache to outside the core. This i… 60 "BriefDescription": "L2 data cache write-back" 63 …unts any full cache line write into the L2 cache which does not cause a linefill, including write-… 81 …unts any full cache line write into the L3 cache which does not cause a linefill, including write-… 93 …any cacheable read transaction returning datafrom the SCU, or for any cacheable write to the SCU.",
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| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac4_descs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 46 /* TDES3 (write back format) */ 83 /* TDS3 use for both format (read and write back) */ 89 /* RDES0 (write back format) */ 92 /* RDES1 (write back format) */ 107 /* RDES2 (write back format) */ 121 /* RDES3 (write back format) */ 144 /* TDS3 use for both format (read and write back) */
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| /kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac4_descs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 46 /* TDES3 (write back format) */ 83 /* TDS3 use for both format (read and write back) */ 89 /* RDES0 (write back format) */ 92 /* RDES1 (write back format) */ 107 /* RDES2 (write back format) */ 121 /* RDES3 (write back format) */ 144 /* TDS3 use for both format (read and write back) */
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| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| D | pcl730.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Driver for Advantech PCL-730 and clones 10 * Description: Advantech PCL-730 (& compatibles) 11 * Devices: [Advantech] PCL-730 (pcl730), PCM-3730 (pcm3730), PCL-725 (pcl725), 12 * PCL-733 (pcl733), PCL-734 (pcl734), 13 * [ADLink] ACL-7130 (acl7130), ACL-7225b (acl7225b), 14 * [ICP] ISO-730 (iso730), P8R8-DIO (p8r8dio), P16R16-DIO (p16r16dio), 15 * [Diamond Systems] OPMM-1616-XT (opmm-1616-xt), PEARL-MM-P (pearl-mm-p), 16 * IR104-PBF (ir104-pbf), 21 * [0] - I/O port base [all …]
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| /kernel/linux/linux-6.6/drivers/comedi/drivers/ |
| D | pcl730.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Driver for Advantech PCL-730 and clones 10 * Description: Advantech PCL-730 (& compatibles) 11 * Devices: [Advantech] PCL-730 (pcl730), PCM-3730 (pcm3730), PCL-725 (pcl725), 12 * PCL-733 (pcl733), PCL-734 (pcl734), 13 * [ADLink] ACL-7130 (acl7130), ACL-7225b (acl7225b), 14 * [ICP] ISO-730 (iso730), P8R8-DIO (p8r8dio), P16R16-DIO (p16r16dio), 15 * [Diamond Systems] OPMM-1616-XT (opmm-1616-xt), PEARL-MM-P (pearl-mm-p), 16 * IR104-PBF (ir104-pbf), 21 * [0] - I/O port base [all …]
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| /kernel/linux/linux-5.10/arch/sh/include/cpu-sh2/cpu/ |
| D | cache.h | 1 /* SPDX-License-Identifier: GPL-2.0 3 * include/asm-sh/cpu-sh2/cache.h 22 /* 0x00000000-0x7fffffff: Write-through */ 23 /* 0x80000000-0x9fffffff: Write-back */ 24 /* 0xc0000000-0xdfffffff: Write-through */ 26 /* 0x00000000-0x7fffffff: Write-back */ 27 /* 0x80000000-0x9fffffff: Write-through */ 28 /* 0xc0000000-0xdfffffff: Write-back */
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| /kernel/linux/linux-6.6/arch/sh/include/cpu-sh2/cpu/ |
| D | cache.h | 1 /* SPDX-License-Identifier: GPL-2.0 3 * include/asm-sh/cpu-sh2/cache.h 22 /* 0x00000000-0x7fffffff: Write-through */ 23 /* 0x80000000-0x9fffffff: Write-back */ 24 /* 0xc0000000-0xdfffffff: Write-through */ 26 /* 0x00000000-0x7fffffff: Write-back */ 27 /* 0x80000000-0x9fffffff: Write-through */ 28 /* 0xc0000000-0xdfffffff: Write-back */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | qcom_hidma_mgmt.txt | 14 instance can use like maximum read/write request and number of bytes to 15 read/write in a single burst. 18 - compatible: "qcom,hidma-mgmt-1.0"; 19 - reg: Address range for DMA device 20 - dma-channels: Number of channels supported by this DMA controller. 21 - max-write-burst-bytes: Maximum write burst in bytes that HIDMA can 26 - max-read-burst-bytes: Maximum read burst in bytes that HIDMA can 31 - max-write-transactions: This value is how many times a write burst is 32 applied back to back while writing to the destination before yielding 34 - max-read-transactions: This value is how many times a read burst is [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | qcom_hidma_mgmt.txt | 14 instance can use like maximum read/write request and number of bytes to 15 read/write in a single burst. 18 - compatible: "qcom,hidma-mgmt-1.0"; 19 - reg: Address range for DMA device 20 - dma-channels: Number of channels supported by this DMA controller. 21 - max-write-burst-bytes: Maximum write burst in bytes that HIDMA can 26 - max-read-burst-bytes: Maximum read burst in bytes that HIDMA can 31 - max-write-transactions: This value is how many times a write burst is 32 applied back to back while writing to the destination before yielding 34 - max-read-transactions: This value is how many times a read burst is [all …]
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| /kernel/linux/linux-6.6/Documentation/arch/x86/ |
| D | mtrr.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 :Authors: - Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999 8 - Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015 17 non-PAT systems while a no-op but equally effective on PAT enabled systems. 37 a video (VGA) card on a PCI or AGP bus. Enabling write-combining 38 allows bus write transfers to be combined into a larger transfer 40 of image write operations 2.5 times or more. 46 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 50 The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These 62 which allows you to read and write. The other is an ioctl() [all …]
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| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | mtrr.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 :Authors: - Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999 8 - Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015 17 non-PAT systems while a no-op but equally effective on PAT enabled systems. 37 a video (VGA) card on a PCI or AGP bus. Enabling write-combining 38 allows bus write transfers to be combined into a larger transfer 40 of image write operations 2.5 times or more. 46 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 50 The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These 62 which allows you to read and write. The other is an ioctl() [all …]
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