| /kernel/linux/linux-6.6/Documentation/driver-api/md/ |
| D | raid5-cache.rst | 5 Raid 4/5/6 could include an extra disk for data cache besides normal RAID
7 caches data to the RAID disks. The cache can be in write-through (supported
8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
9 3.4) has a new option '--write-journal' to create array with cache. Please
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean
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| D | raid5-ppl.rst | 7 may become inconsistent with data on other member disks. If the array is also
9 disks is missing. This can lead to silent data corruption when rebuilding the
10 array or using it is as degraded - data calculated from parity for array blocks
11 that have not been touched by a write request during the unclean shutdown can
12 be incorrect. Such condition is known as the RAID5 Write Hole. Because of
15 Partial parity for a write operation is the XOR of stripe data chunks not
16 modified by this write. It is just enough data needed for recovering from the
17 write hole. XORing partial parity with the modified chunks produces parity for
18 the stripe, consistent with its state before the write operation, regardless of
19 which chunk writes have completed. If one of the not modified data disks of
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| /kernel/linux/linux-5.10/Documentation/driver-api/md/ |
| D | raid5-cache.rst | 5 Raid 4/5/6 could include an extra disk for data cache besides normal RAID
7 caches data to the RAID disks. The cache can be in write-through (supported
8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
9 3.4) has a new option '--write-journal' to create array with cache. Please
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean
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| D | raid5-ppl.rst | 7 may become inconsistent with data on other member disks. If the array is also
9 disks is missing. This can lead to silent data corruption when rebuilding the
10 array or using it is as degraded - data calculated from parity for array blocks
11 that have not been touched by a write request during the unclean shutdown can
12 be incorrect. Such condition is known as the RAID5 Write Hole. Because of
15 Partial parity for a write operation is the XOR of stripe data chunks not
16 modified by this write. It is just enough data needed for recovering from the
17 write hole. XORing partial parity with the modified chunks produces parity for
18 the stripe, consistent with its state before the write operation, regardless of
19 which chunk writes have completed. If one of the not modified data disks of
[all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ |
| D | armv8-recommended.json | 3 "PublicDescription": "Attributable Level 1 data cache access, read",
9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
15 "PublicDescription": "Attributable Level 1 data cache refill, read",
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
24 "BriefDescription": "L1D cache refill, write"
27 "PublicDescription": "Attributable Level 1 data cache refill, inner",
33 "PublicDescription": "Attributable Level 1 data cache refill, outer",
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
42 "BriefDescription": "L1D cache Write-Back, victim"
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/ |
| D | recommended.json | 3 "PublicDescription": "Attributable Level 1 data cache access, read",
9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
15 "PublicDescription": "Attributable Level 1 data cache refill, read",
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
24 "BriefDescription": "L1D cache refill, write"
27 "PublicDescription": "Attributable Level 1 data cache refill, inner",
33 "PublicDescription": "Attributable Level 1 data cache refill, outer",
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
42 "BriefDescription": "L1D cache Write-Back, victim"
[all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z16/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
14 …anslation Lookaside Buffer 2 (TLB2) and the request was made by the Level-1 Data cache. This is a …
17 "Unit": "CPU-M-CF",
21 …s for a request made by the Level-1 Data cache. Incremented by one for every TLB2 miss in progress…
24 "Unit": "CPU-M-CF",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| D | macsec_api.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
48 /*! Read the raw table data from the specified row of the Egress CTL
50 * rec - [OUT] The raw table row data will be unpacked into the fields of rec.
51 * table_index - The table row to read (max 23).
57 /*! Pack the fields of rec, and write the packed data into the
59 * rec - [IN] The bitfield values to write to the table row.
60 * table_index - The table row to write(max 23).
66 /*! Read the raw table data from the specified row of the Egress
68 * rec - [OUT] The raw table row data will be unpacked into the fields of rec.
69 * table_index - The table row to read (max 47).
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| /kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| D | macsec_api.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
48 /*! Read the raw table data from the specified row of the Egress CTL
50 * rec - [OUT] The raw table row data will be unpacked into the fields of rec.
51 * table_index - The table row to read (max 23).
57 /*! Pack the fields of rec, and write the packed data into the
59 * rec - [IN] The bitfield values to write to the table row.
60 * table_index - The table row to write(max 23).
66 /*! Read the raw table data from the specified row of the Egress
68 * rec - [OUT] The raw table row data will be unpacked into the fields of rec.
69 * table_index - The table row to read (max 47).
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| /kernel/linux/linux-6.6/kernel/ |
| D | sysctl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * Added kernel/java-{interpreter,appletviewer}, 96/5/10, Mike Shaver.
11 * Added kswapd-interval, ctrl-alt-del, printk stuff, 1/8/97, Chris Horn.
85 const int sysctl_vals[] = { 0, 1, 2, 3, 4, 100, 200, 1000, 3000, INT_MAX, 65535, -1 };
106 * enum sysctl_writes_mode - supported sysctl write modes
108 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value
116 * sent to the write syscall. If dealing with strings respect the file
121 * These write modes control how current file position affects the behavior of
122 * updating sysctl values through the proc interface on each write.
125 SYSCTL_WRITES_LEGACY = -1,
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| /kernel/linux/linux-5.10/kernel/ |
| D | sysctl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * Added kernel/java-{interpreter,appletviewer}, 96/5/10, Mike Shaver.
11 * Added kswapd-interval, ctrl-alt-del, printk stuff, 1/8/97, Chris Horn.
149 * enum sysctl_writes_mode - supported sysctl write modes
151 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value
159 * sent to the write syscall. If dealing with strings respect the file
164 * These write modes control how current file position affects the behavior of
165 * updating sysctl values through the proc interface on each write.
168 SYSCTL_WRITES_LEGACY = -1,
188 static int max_sched_tunable_scaling = SCHED_TUNABLESCALING_END-1;
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| /kernel/linux/linux-6.6/net/sctp/ |
| D | sysctl.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * lksctp developers <linux-sctp@vger.kernel.org>
46 static int proc_sctp_do_hmac_alg(struct ctl_table *ctl, int write,
48 static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write,
50 static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write, void *buffer,
52 static int proc_sctp_do_udp_port(struct ctl_table *ctl, int write, void *buffer,
54 static int proc_sctp_do_alpha_beta(struct ctl_table *ctl, int write,
56 static int proc_sctp_do_auth(struct ctl_table *ctl, int write,
58 static int proc_sctp_do_probe_interval(struct ctl_table *ctl, int write,
64 .data = &sysctl_sctp_mem,
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | st,stm32-fmc2-ebi-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
25 8: Synchronous read synchronous write PSRAM.
26 9: Synchronous read asynchronous write PSRAM.
27 10: Synchronous read synchronous write NOR.
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
| D | l1d_cache.json | 4 …ion": "Counts level 1 data cache refills caused by speculatively executed load or store operations…
8 …data cache accesses from any load/store operations. Atomic operations that resolve in the CPUs cac…
12 …write-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty …
16 …"PublicDescription": "Counts cache line refills into the level 1 data cache from any memory read o…
20 …"Counts level 1 data cache accesses from any load operation. Atomic load operations that resolve i…
24 …data cache accesses generated by store operations. This event also counts accesses caused by a DC …
28 …nts level 1 data cache refills caused by speculatively executed load instructions where the memory…
32 …ts level 1 data cache refills caused by speculatively executed store instructions where the memory…
36 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches…
40 …"PublicDescription": "Counts level 1 data cache refills for which the cache line data came from ou…
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/ |
| D | l1d_cache.json | 4 …ion": "Counts level 1 data cache refills caused by speculatively executed load or store operations…
8 …data cache accesses from any load/store operations. Atomic operations that resolve in the CPUs cac…
12 …write-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty …
16 …Counts level 1 data cache accesses from any load operation. Atomic load operations that resolve in…
20 …data cache accesses generated by store operations. This event also counts accesses caused by a DC …
24 …nts level 1 data cache refills caused by speculatively executed load instructions where the memory…
28 …ts level 1 data cache refills caused by speculatively executed store instructions where the memory…
32 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches…
36 …"PublicDescription": "Counts level 1 data cache refills for which the cache line data came from ou…
40 …"PublicDescription": "Counts dirty cache line evictions from the level 1 data cache caused by a ne…
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/ |
| D | cache.json | 15 …blicDescription": "L1 data cache refill. This event counts any load or store operation or page tab…
18 "BriefDescription": "L1 data cache refill"
21 …scription": "L1 data cache access. This event counts any load or store operation or page table wal…
24 "BriefDescription": "L1 data cache access"
27 …"PublicDescription": "L1 data TLB refill. This event counts any refill of the data L1 TLB from the…
30 "BriefDescription": "L1 data TLB refill"
33 …cess or Level 0 Macro-op cache access. This event counts any instruction fetch which accesses the …
39 …"PublicDescription": "L1 data cache Write-Back. This event counts any write-back of data from the …
42 "BriefDescription": "L1 data cache Write-Back"
45 …ublicDescription": "L2 data cache access. This event counts any transaction from L1 which looks up…
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z14/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
14 …The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache. This is a re…
17 "Unit": "CPU-M-CF",
21 …progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z14/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
14 … written into The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache"
17 "Unit": "CPU-M-CF",
21 …progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
[all …]
|
| /kernel/linux/linux-5.10/net/sctp/ |
| D | sysctl.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * lksctp developers <linux-sctp@vger.kernel.org>
45 static int proc_sctp_do_hmac_alg(struct ctl_table *ctl, int write,
47 static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write,
49 static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write, void *buffer,
51 static int proc_sctp_do_alpha_beta(struct ctl_table *ctl, int write,
53 static int proc_sctp_do_auth(struct ctl_table *ctl, int write,
59 .data = &sysctl_sctp_mem,
66 .data = &sysctl_sctp_rmem,
73 .data = &sysctl_sctp_wmem,
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|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_zec12/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …Description": "A directory write to the Level-1 Data cache directory where the returned cache line…
24 "Unit": "CPU-M-CF",
28 …ription": "A directory write to the Level-1 Instruction cache directory where the returned cache l…
31 "Unit": "CPU-M-CF",
35 …cription": "A directory write to the Level-1 Data cache directory where the returned cache line wa…
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ |
| D | cache.json | 102 …-complex L2 cache, this event does not count. If the complex is configured without a per-complex L…
105 …-complex L2 cache, this event does not count. If the complex is configured without a per-complex L…
108 …ption": "L1 data cache refill due to prefetch. This event counts any linefills from the prefetcher…
111 …ption": "L1 data cache refill due to prefetch. This event counts any linefills from the prefetcher…
114 …"PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the co…
117 …"BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the cor…
120 …"PublicDescription": "L1 data cache entering write streaming mode. This event counts for each entr…
123 …"BriefDescription": "L1 data cache entering write streaming mode. This event counts for each entry…
126 …data cache write streaming mode. This event counts for each cycle where the core is in write strea…
129 …data cache write streaming mode. This event counts for each cycle where the core is in write strea…
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|
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igc/ |
| D | igc_diag.c | 1 // SPDX-License-Identifier: GPL-2.0
35 static bool reg_pattern_test(struct igc_adapter *adapter, u64 *data, int reg, in reg_pattern_test() argument
36 u32 mask, u32 write) in reg_pattern_test() argument
38 struct igc_hw *hw = &adapter->hw; in reg_pattern_test()
46 wr32(reg, test_pattern[pat] & write); in reg_pattern_test()
48 if (val != (test_pattern[pat] & write & mask)) { in reg_pattern_test()
49 netdev_err(adapter->netdev, in reg_pattern_test()
51 reg, val, test_pattern[pat] & write & mask); in reg_pattern_test()
52 *data = reg; in reg_pattern_test()
61 static bool reg_set_and_check(struct igc_adapter *adapter, u64 *data, int reg, in reg_set_and_check() argument
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|
| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/igc/ |
| D | igc_diag.c | 1 // SPDX-License-Identifier: GPL-2.0
35 static bool reg_pattern_test(struct igc_adapter *adapter, u64 *data, int reg, in reg_pattern_test() argument
36 u32 mask, u32 write) in reg_pattern_test() argument
38 struct igc_hw *hw = &adapter->hw; in reg_pattern_test()
46 wr32(reg, test_pattern[pat] & write); in reg_pattern_test()
48 if (val != (test_pattern[pat] & write & mask)) { in reg_pattern_test()
49 netdev_err(adapter->netdev, in reg_pattern_test()
51 reg, val, test_pattern[pat] & write & mask); in reg_pattern_test()
52 *data = reg; in reg_pattern_test()
61 static bool reg_set_and_check(struct igc_adapter *adapter, u64 *data, int reg, in reg_set_and_check() argument
[all …]
|