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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dingenic,mac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ingenic,mac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MAC in Ingenic SoCs
10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
18 - ingenic,jz4775-mac
19 - ingenic,x1000-mac
20 - ingenic,x1600-mac
21 - ingenic,x1830-mac
[all …]
Dqcom-emac.txt3 This network controller consists of two devices: a MAC and an SGMII
5 connects the MAC node to its corresponding internal phy node. Another
10 MAC node:
11 - compatible : Should be "qcom,fsm9900-emac".
12 - reg : Offset and length of the register regions for the device
13 - interrupts : Interrupt number used by this controller
14 - mac-address : The 6-byte MAC address. If present, it is the default
15 MAC address.
16 - internal-phy : phandle to the internal PHY node
17 - phy-handle : phandle to the external PHY node
[all …]
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
[all …]
Dhisilicon-femac.txt1 Hisilicon Fast Ethernet MAC controller
4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
9 The first region is the MAC core register base and size.
10 The second region is the global MAC control register.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
[all …]
Dqcom-emac.txt3 This network controller consists of two devices: a MAC and an SGMII
5 connects the MAC node to its corresponding internal phy node. Another
10 MAC node:
11 - compatible : Should be "qcom,fsm9900-emac".
12 - reg : Offset and length of the register regions for the device
13 - interrupts : Interrupt number used by this controller
14 - mac-address : The 6-byte MAC address. If present, it is the default
15 MAC address.
16 - internal-phy : phandle to the internal PHY node
17 - phy-handle : phandle the the external PHY node
[all …]
Dhisilicon-femac.txt1 Hisilicon Fast Ethernet MAC controller
4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
9 The first region is the MAC core register base and size.
10 The second region is the global MAC control register.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dksi8560.dts15 /dts-v1/;
20 #address-cells = <1>;
21 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <0x8000>; /* L1, 32K */
39 i-cache-size = <0x8000>; /* L1, 32K */
40 timebase-frequency = <0>; /* From U-boot */
[all …]
Dxpedite5200.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>; // 32 bytes
36 i-cache-line-size = <32>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
[all …]
Dtqm8540.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
[all …]
Dtqm8548-bigflash.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
[all …]
Dtqm8548.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dksi8560.dts15 /dts-v1/;
22 #address-cells = <1>;
23 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
38 d-cache-line-size = <32>;
39 i-cache-line-size = <32>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
[all …]
Dxpedite5200.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>; // 32 bytes
36 i-cache-line-size = <32>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
[all …]
Dtqm8540.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
[all …]
Dtqm8548-bigflash.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
[all …]
Dtqm8548.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
[all …]
Dxpedite5200_xmon.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 * xMon boot loader memory map which differs from U-Boot's.
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 form-factor = "PMC/XMC";
18 boot-bank = <0x0>;
33 #address-cells = <1>;
34 #size-cells = <0>;
39 d-cache-line-size = <32>; // 32 bytes
[all …]
/kernel/linux/linux-6.6/drivers/net/dsa/mv88e6xxx/
Dglobal1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
36 /* Offset 0x01: Switch MAC Address Register Bytes 0 & 1
37 * Offset 0x02: Switch MAC Address Register Bytes 2 & 3
38 * Offset 0x03: Switch MAC Address Register Bytes 4 & 5
49 #define MV88E6352_G1_VTU_FID_VID_POLICY 0x1000
78 #define MV88E6XXX_G1_VTU_OP_FLUSH_ALL 0x1000
93 #define MV88E6XXX_G1_VTU_VID_VALID 0x1000
122 #define MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL 0x1000
166 /* Offset 0x0D: ATU MAC Address Register Bytes 0 & 1
[all …]
/kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/
Dglobal1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
35 /* Offset 0x01: Switch MAC Address Register Bytes 0 & 1
36 * Offset 0x02: Switch MAC Address Register Bytes 2 & 3
37 * Offset 0x03: Switch MAC Address Register Bytes 4 & 5
75 #define MV88E6XXX_G1_VTU_OP_FLUSH_ALL 0x1000
90 #define MV88E6XXX_G1_VTU_VID_VALID 0x1000
119 #define MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL 0x1000
163 /* Offset 0x0D: ATU MAC Address Register Bytes 0 & 1
164 * Offset 0x0E: ATU MAC Address Register Bytes 2 & 3
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/ingenic/
Dx1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
4 #include <dt-bindings/dma/x1000-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "ingenic,x1000", "ingenic,x1000e";
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
[all …]
Dx1830.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dmpc8560ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>; // 32 bytes
36 i-cache-line-size = <32>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/apm/
Dapm-storm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Storm SOC
9 compatible = "apm,xgene-storm";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/apm/
Dapm-storm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Storm SOC
9 compatible = "apm,xgene-storm";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]

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