Searched +full:xps +full:- +full:ethernetlite +full:- +full:3 (Results 1 – 2 of 2) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-or-later7 * Copyright (c) 2007 - 2013 Xilinx, Inc.104 * struct net_local - Our private per device data144 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device155 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()157 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()160 xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_enable_interrupts()163 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); in xemaclite_enable_interrupts()167 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device178 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); in xemaclite_disable_interrupts()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later8 * 2007 - 2013 (c) Xilinx, Inc.100 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32)adr)) % ALIGNMENT)111 * struct net_local - Our private per device data153 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device164 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()166 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()169 xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_enable_interrupts()172 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); in xemaclite_enable_interrupts()176 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device[all …]