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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Ddwc3-xilinx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/dwc3-xilinx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx SuperSpeed DWC3 USB SoC controller
10 - Piyush Mehta <piyush.mehta@amd.com>
15 - enum:
16 - xlnx,zynqmp-dwc3
17 - xlnx,versal-dwc3
21 "#address-cells":
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Ddwc3-xilinx.txt1 Xilinx SuperSpeed DWC3 USB SoC controller
4 - compatible: Should contain "xlnx,zynqmp-dwc3"
5 - clocks: A list of phandles for the clocks listed in clock-names
6 - clock-names: Should contain the following:
13 A child node must exist to represent the core DWC3 IP block. The name of
14 the node is not important. The content of the node is defined in dwc3.txt.
19 #address-cells = <0x2>;
20 #size-cells = <0x1>;
21 compatible = "xlnx,zynqmp-dwc3";
22 clock-names = "bus_clk" "ref_clk";
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Ddwc3.txt1 synopsys DWC3 CORE
3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
23 compatible = "xlnx,zynqmp";
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/kernel/linux/linux-5.10/drivers/usb/dwc3/
Ddwc3-of-simple.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-of-simple.c - OF glue layer for simple integrations
5 * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com
9 * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
10 * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
18 #include <linux/dma-mapping.h>
36 struct device *dev = &pdev->dev; in dwc3_of_simple_probe()
37 struct device_node *np = dev->of_node; in dwc3_of_simple_probe()
43 return -ENOMEM; in dwc3_of_simple_probe()
46 simple->dev = dev; in dwc3_of_simple_probe()
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/kernel/linux/linux-6.6/drivers/usb/dwc3/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
14 module, the module will be called dwc3.ko.
22 Select this if you have ULPI type PHY attached to your DWC3
26 bool "DWC3 Mode Selection"
35 Select this when you want to use DWC3 in host mode only,
42 Select this when you want to use DWC3 in gadget mode only,
49 This is the default mode of working of DWC3 controller where
78 tristate "PCIe-based Platforms"
86 tristate "Synopsys PCIe-based HAPS Platforms"
159 This driver handles ZynqMP SoC operations.
Ddwc3-xilinx.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-xilinx.c - Xilinx DWC3 controller specific glue driver
15 #include <linux/dma-mapping.h>
22 #include <linux/firmware/xlnx-zynqmp.h>
62 reg = readl(priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst()
69 writel(reg, priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst()
74 struct device *dev = priv_data->dev; in dwc3_xlnx_init_versal()
79 /* Assert and De-assert reset */ in dwc3_xlnx_init_versal()
90 dev_err_probe(dev, ret, "failed to De-assert Reset\n"); in dwc3_xlnx_init_versal()
101 struct device *dev = priv_data->dev; in dwc3_xlnx_init_zynqmp()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP
5 * (C) Copyright 2014 - 2019, Xilinx, Inc.
15 #include <dt-bindings/power/xlnx-zynqmp-power.h>
16 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
19 compatible = "xlnx,zynqmp";
20 #address-cells = <2>;
21 #size-cells = <2>;
24 #address-cells = <1>;
25 #size-cells = <0>;
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/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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