1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. 5 * SPDX-License-Identifier: MIT 6 * 7 ***********************************************************************************************************************/ 8 9 /** 10 ************************************************************************************************************************ 11 * @file gfx11addrlib.h 12 * @brief Contains the Gfx11Lib class definition. 13 ************************************************************************************************************************ 14 */ 15 16 #ifndef __GFX11_ADDR_LIB_H__ 17 #define __GFX11_ADDR_LIB_H__ 18 19 #include "addrlib2.h" 20 #include "coord.h" 21 #include "gfx11SwizzlePattern.h" 22 23 namespace Addr 24 { 25 namespace V2 26 { 27 28 /** 29 ************************************************************************************************************************ 30 * @brief GFX11 specific settings structure. 31 ************************************************************************************************************************ 32 */ 33 struct Gfx11ChipSettings 34 { 35 struct 36 { 37 UINT_32 isGfx1150 : 1; 38 UINT_32 isPhoenix : 1; 39 UINT_32 reserved1 : 30; 40 41 // Misc configuration bits 42 UINT_32 reserved2 : 32; 43 }; 44 }; 45 46 /** 47 ************************************************************************************************************************ 48 * @brief GFX11 data surface type. 49 ************************************************************************************************************************ 50 */ 51 enum Gfx11DataType 52 { 53 Gfx11DataColor, 54 Gfx11DataDepthStencil, 55 }; 56 57 const UINT_32 Gfx11LinearSwModeMask = (1u << ADDR_SW_LINEAR); 58 59 const UINT_32 Gfx11Blk256BSwModeMask = (1u << ADDR_SW_256B_D); 60 61 const UINT_32 Gfx11Blk4KBSwModeMask = (1u << ADDR_SW_4KB_S) | 62 (1u << ADDR_SW_4KB_D) | 63 (1u << ADDR_SW_4KB_S_X) | 64 (1u << ADDR_SW_4KB_D_X); 65 66 const UINT_32 Gfx11Blk64KBSwModeMask = (1u << ADDR_SW_64KB_S) | 67 (1u << ADDR_SW_64KB_D) | 68 (1u << ADDR_SW_64KB_S_T) | 69 (1u << ADDR_SW_64KB_D_T) | 70 (1u << ADDR_SW_64KB_Z_X) | 71 (1u << ADDR_SW_64KB_S_X) | 72 (1u << ADDR_SW_64KB_D_X) | 73 (1u << ADDR_SW_64KB_R_X); 74 75 const UINT_32 Gfx11Blk256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) | 76 (1u << ADDR_SW_256KB_S_X) | 77 (1u << ADDR_SW_256KB_D_X) | 78 (1u << ADDR_SW_256KB_R_X); 79 80 const UINT_32 Gfx11ZSwModeMask = (1u << ADDR_SW_64KB_Z_X) | 81 (1u << ADDR_SW_256KB_Z_X); 82 83 const UINT_32 Gfx11StandardSwModeMask = (1u << ADDR_SW_4KB_S) | 84 (1u << ADDR_SW_64KB_S) | 85 (1u << ADDR_SW_64KB_S_T) | 86 (1u << ADDR_SW_4KB_S_X) | 87 (1u << ADDR_SW_64KB_S_X) | 88 (1u << ADDR_SW_256KB_S_X); 89 90 const UINT_32 Gfx11DisplaySwModeMask = (1u << ADDR_SW_256B_D) | 91 (1u << ADDR_SW_4KB_D) | 92 (1u << ADDR_SW_64KB_D) | 93 (1u << ADDR_SW_64KB_D_T) | 94 (1u << ADDR_SW_4KB_D_X) | 95 (1u << ADDR_SW_64KB_D_X) | 96 (1u << ADDR_SW_256KB_D_X); 97 98 const UINT_32 Gfx11RenderSwModeMask = (1u << ADDR_SW_64KB_R_X) | 99 (1u << ADDR_SW_256KB_R_X); 100 101 const UINT_32 Gfx11XSwModeMask = (1u << ADDR_SW_4KB_S_X) | 102 (1u << ADDR_SW_4KB_D_X) | 103 (1u << ADDR_SW_64KB_Z_X) | 104 (1u << ADDR_SW_64KB_S_X) | 105 (1u << ADDR_SW_64KB_D_X) | 106 (1u << ADDR_SW_64KB_R_X) | 107 Gfx11Blk256KBSwModeMask; 108 109 const UINT_32 Gfx11TSwModeMask = (1u << ADDR_SW_64KB_S_T) | 110 (1u << ADDR_SW_64KB_D_T); 111 112 const UINT_32 Gfx11XorSwModeMask = Gfx11XSwModeMask | 113 Gfx11TSwModeMask; 114 115 const UINT_32 Gfx11Rsrc1dSwModeMask = (1u << ADDR_SW_LINEAR) | 116 (1u << ADDR_SW_64KB_R_X) | 117 (1u << ADDR_SW_64KB_Z_X) ; 118 119 const UINT_32 Gfx11Rsrc2dSwModeMask = Gfx11LinearSwModeMask | 120 Gfx11DisplaySwModeMask | 121 Gfx11ZSwModeMask | 122 Gfx11RenderSwModeMask; 123 124 const UINT_32 Gfx11Rsrc3dSwModeMask = Gfx11LinearSwModeMask | 125 Gfx11StandardSwModeMask | 126 Gfx11ZSwModeMask | 127 Gfx11RenderSwModeMask | 128 (1u << ADDR_SW_64KB_D_X); 129 130 const UINT_32 Gfx11Rsrc2dPrtSwModeMask = 131 (Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc2dSwModeMask; 132 133 const UINT_32 Gfx11Rsrc3dPrtSwModeMask = 134 (Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc3dSwModeMask; 135 136 const UINT_32 Gfx11Rsrc3dThin64KBSwModeMask = (1u << ADDR_SW_64KB_Z_X) | 137 (1u << ADDR_SW_64KB_R_X); 138 139 const UINT_32 Gfx11Rsrc3dThin256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) | 140 (1u << ADDR_SW_256KB_R_X); 141 142 const UINT_32 Gfx11Rsrc3dThinSwModeMask = Gfx11Rsrc3dThin64KBSwModeMask | Gfx11Rsrc3dThin256KBSwModeMask; 143 144 const UINT_32 Gfx11Rsrc3dViewAs2dSwModeMask = Gfx11Rsrc3dThinSwModeMask | Gfx11LinearSwModeMask; 145 146 const UINT_32 Gfx11Rsrc3dThickSwModeMask = Gfx11Rsrc3dSwModeMask & ~(Gfx11Rsrc3dThinSwModeMask | Gfx11LinearSwModeMask); 147 148 const UINT_32 Gfx11Rsrc3dThick4KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk4KBSwModeMask; 149 150 const UINT_32 Gfx11Rsrc3dThick64KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk64KBSwModeMask; 151 152 const UINT_32 Gfx11Rsrc3dThick256KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk256KBSwModeMask; 153 154 const UINT_32 Gfx11MsaaSwModeMask = Gfx11ZSwModeMask | 155 Gfx11RenderSwModeMask; 156 157 const UINT_32 Dcn32SwModeMask = (1u << ADDR_SW_LINEAR) | 158 (1u << ADDR_SW_64KB_D) | 159 (1u << ADDR_SW_64KB_D_T) | 160 (1u << ADDR_SW_64KB_D_X) | 161 (1u << ADDR_SW_64KB_R_X) | 162 (1u << ADDR_SW_256KB_D_X) | 163 (1u << ADDR_SW_256KB_R_X); 164 165 const UINT_32 Size256K = 262144u; 166 const UINT_32 Log2Size256K = 18u; 167 168 /** 169 ************************************************************************************************************************ 170 * @brief This class is the GFX11 specific address library 171 * function set. 172 ************************************************************************************************************************ 173 */ 174 class Gfx11Lib : public Lib 175 { 176 public: 177 /// Creates Gfx11Lib object CreateObj(const Client * pClient)178 static Addr::Lib* CreateObj(const Client* pClient) 179 { 180 VOID* pMem = Object::ClientAlloc(sizeof(Gfx11Lib), pClient); 181 return (pMem != NULL) ? new (pMem) Gfx11Lib(pClient) : NULL; 182 } 183 184 protected: 185 Gfx11Lib(const Client* pClient); 186 virtual ~Gfx11Lib(); 187 HwlIsStandardSwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)188 virtual BOOL_32 HwlIsStandardSwizzle( 189 AddrResourceType resourceType, 190 AddrSwizzleMode swizzleMode) const 191 { 192 return m_swizzleModeTable[swizzleMode].isStd; 193 } 194 HwlIsDisplaySwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)195 virtual BOOL_32 HwlIsDisplaySwizzle( 196 AddrResourceType resourceType, 197 AddrSwizzleMode swizzleMode) const 198 { 199 return m_swizzleModeTable[swizzleMode].isDisp; 200 } 201 HwlIsThin(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)202 virtual BOOL_32 HwlIsThin( 203 AddrResourceType resourceType, 204 AddrSwizzleMode swizzleMode) const 205 { 206 return ((IsTex1d(resourceType) == TRUE) || 207 (IsTex2d(resourceType) == TRUE) || 208 ((IsTex3d(resourceType) == TRUE) && 209 (m_swizzleModeTable[swizzleMode].isStd == FALSE) && 210 (m_swizzleModeTable[swizzleMode].isDisp == FALSE))); 211 } 212 HwlIsThick(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)213 virtual BOOL_32 HwlIsThick( 214 AddrResourceType resourceType, 215 AddrSwizzleMode swizzleMode) const 216 { 217 return ((IsTex3d(resourceType) == TRUE) && 218 (m_swizzleModeTable[swizzleMode].isStd || m_swizzleModeTable[swizzleMode].isDisp)); 219 } 220 221 virtual ADDR_E_RETURNCODE HwlComputeHtileInfo( 222 const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, 223 ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; 224 225 virtual ADDR_E_RETURNCODE HwlComputeDccInfo( 226 const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, 227 ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const; 228 229 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( 230 const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, 231 ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); 232 233 virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr( 234 const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, 235 ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); 236 237 virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord( 238 const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn); 239 240 virtual VOID HwlComputeDccAddrFromCoord( 241 const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, 242 ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); 243 244 virtual UINT_32 HwlGetEquationIndex( 245 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 246 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 247 HwlGetEquationTableInfo(const ADDR_EQUATION ** ppEquationTable)248 virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const 249 { 250 *ppEquationTable = m_equationTable; 251 252 return m_numEquations; 253 } 254 255 virtual ADDR_E_RETURNCODE HwlComputePipeBankXor( 256 const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, 257 ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const; 258 259 virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor( 260 const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, 261 ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const; 262 263 virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern( 264 const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, 265 ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const; 266 267 virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView( 268 const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, 269 ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const; 270 271 virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( 272 const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, 273 ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; 274 275 virtual ADDR_E_RETURNCODE HwlGetPossibleSwizzleModes( 276 const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, 277 ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; 278 279 virtual ADDR_E_RETURNCODE HwlGetAllowedBlockSet( 280 ADDR2_SWMODE_SET allowedSwModeSet, 281 AddrResourceType rsrcType, 282 ADDR2_BLOCK_SET* pAllowedBlockSet) const; 283 284 virtual ADDR_E_RETURNCODE HwlGetAllowedSwSet( 285 ADDR2_SWMODE_SET allowedSwModeSet, 286 ADDR2_SWTYPE_SET* pAllowedSwSet) const; 287 288 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck( 289 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 290 291 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled( 292 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 293 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 294 295 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear( 296 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 297 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 298 299 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled( 300 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 301 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 302 303 virtual ADDR_E_RETURNCODE HwlCopyMemToSurface( 304 const ADDR2_COPY_MEMSURFACE_INPUT* pIn, 305 const ADDR2_COPY_MEMSURFACE_REGION* pRegions, 306 UINT_32 regionCount) const; 307 308 virtual ADDR_E_RETURNCODE HwlCopySurfaceToMem( 309 const ADDR2_COPY_MEMSURFACE_INPUT* pIn, 310 const ADDR2_COPY_MEMSURFACE_REGION* pRegions, 311 UINT_32 regionCount) const; 312 313 virtual UINT_32 HwlComputeMaxBaseAlignments() const; 314 315 virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; 316 317 virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn); 318 319 virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); 320 321 private: 322 // Initialize equation table 323 VOID InitEquationTable(); 324 325 ADDR_E_RETURNCODE ComputeSurfaceInfoMacroTiled( 326 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 327 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 328 329 ADDR_E_RETURNCODE ComputeSurfaceInfoMicroTiled( 330 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 331 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 332 333 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMacroTiled( 334 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 335 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 336 337 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMicroTiled( 338 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 339 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 340 341 UINT_32 ComputeOffsetFromEquation( 342 const ADDR_EQUATION* pEq, 343 UINT_32 x, 344 UINT_32 y, 345 UINT_32 z) const; 346 347 ADDR_E_RETURNCODE ComputeStereoInfo( 348 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 349 UINT_32* pAlignY, 350 UINT_32* pRightXor) const; 351 352 static void GetMipSize( 353 UINT_32 mip0Width, 354 UINT_32 mip0Height, 355 UINT_32 mip0Depth, 356 UINT_32 mipId, 357 UINT_32* pMipWidth, 358 UINT_32* pMipHeight, 359 UINT_32* pMipDepth = NULL) 360 { 361 *pMipWidth = ShiftCeil(Max(mip0Width, 1u), mipId); 362 *pMipHeight = ShiftCeil(Max(mip0Height, 1u), mipId); 363 364 if (pMipDepth != NULL) 365 { 366 *pMipDepth = ShiftCeil(Max(mip0Depth, 1u), mipId); 367 } 368 } 369 370 const ADDR_SW_PATINFO* GetSwizzlePatternInfo( 371 AddrSwizzleMode swizzleMode, 372 AddrResourceType resourceType, 373 UINT_32 log2Elem, 374 UINT_32 numFrag) const; 375 GetSwizzlePatternFromPatternInfo(const ADDR_SW_PATINFO * pPatInfo,ADDR_BIT_SETTING (& pSwizzle)[ADDR_MAX_EQUATION_BIT])376 VOID GetSwizzlePatternFromPatternInfo( 377 const ADDR_SW_PATINFO* pPatInfo, 378 ADDR_BIT_SETTING (&pSwizzle)[ADDR_MAX_EQUATION_BIT]) const 379 { 380 memcpy(pSwizzle, 381 GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx], 382 sizeof(GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx])); 383 384 memcpy(&pSwizzle[8], 385 GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx], 386 sizeof(GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx])); 387 388 memcpy(&pSwizzle[12], 389 GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx], 390 sizeof(GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx])); 391 392 memcpy(&pSwizzle[16], 393 GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx], 394 sizeof(GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx])); 395 } 396 397 VOID ConvertSwizzlePatternToEquation( 398 UINT_32 elemLog2, 399 AddrResourceType rsrcType, 400 AddrSwizzleMode swMode, 401 const ADDR_SW_PATINFO* pPatInfo, 402 ADDR_EQUATION* pEquation) const; 403 404 static INT_32 GetMetaElementSizeLog2(Gfx11DataType dataType); 405 406 static INT_32 GetMetaCacheSizeLog2(Gfx11DataType dataType); 407 408 void GetBlk256SizeLog2( 409 AddrResourceType resourceType, 410 AddrSwizzleMode swizzleMode, 411 UINT_32 elemLog2, 412 UINT_32 numSamplesLog2, 413 Dim3d* pBlock) const; 414 415 void GetCompressedBlockSizeLog2( 416 Gfx11DataType dataType, 417 AddrResourceType resourceType, 418 AddrSwizzleMode swizzleMode, 419 UINT_32 elemLog2, 420 UINT_32 numSamplesLog2, 421 Dim3d* pBlock) const; 422 423 INT_32 GetMetaOverlapLog2( 424 Gfx11DataType dataType, 425 AddrResourceType resourceType, 426 AddrSwizzleMode swizzleMode, 427 UINT_32 elemLog2, 428 UINT_32 numSamplesLog2) const; 429 430 INT_32 Get3DMetaOverlapLog2( 431 AddrResourceType resourceType, 432 AddrSwizzleMode swizzleMode, 433 UINT_32 elemLog2) const; 434 435 UINT_32 GetMetaBlkSize( 436 Gfx11DataType dataType, 437 AddrResourceType resourceType, 438 AddrSwizzleMode swizzleMode, 439 UINT_32 elemLog2, 440 UINT_32 numSamplesLog2, 441 BOOL_32 pipeAlign, 442 Dim3d* pBlock) const; 443 444 INT_32 GetPipeRotateAmount( 445 AddrResourceType resourceType, 446 AddrSwizzleMode swizzleMode) const; 447 GetEffectiveNumPipes()448 INT_32 GetEffectiveNumPipes() const 449 { 450 return ((m_numSaLog2 + 1) >= m_pipesLog2) ? m_pipesLog2 : m_numSaLog2 + 1; 451 } 452 IsRbAligned(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)453 BOOL_32 IsRbAligned( 454 AddrResourceType resourceType, 455 AddrSwizzleMode swizzleMode) const 456 { 457 const BOOL_32 isRtopt = IsRtOptSwizzle(swizzleMode); 458 const BOOL_32 isZ = IsZOrderSwizzle(swizzleMode); 459 const BOOL_32 isDisplay = IsDisplaySwizzle(swizzleMode); 460 461 return (IsTex2d(resourceType) && (isRtopt || isZ)) || 462 (IsTex3d(resourceType) && isDisplay); 463 464 } 465 466 UINT_32 GetValidDisplaySwizzleModes(UINT_32 bpp) const; 467 468 BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 469 470 UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const; 471 IsInMipTail(Dim3d mipTailDim,UINT_32 maxNumMipsInTail,UINT_32 mipWidth,UINT_32 mipHeight,UINT_32 numMipsToTheEnd)472 BOOL_32 IsInMipTail( 473 Dim3d mipTailDim, 474 UINT_32 maxNumMipsInTail, 475 UINT_32 mipWidth, 476 UINT_32 mipHeight, 477 UINT_32 numMipsToTheEnd) const 478 { 479 BOOL_32 inTail = ((mipWidth <= mipTailDim.w) && 480 (mipHeight <= mipTailDim.h) && 481 (numMipsToTheEnd <= maxNumMipsInTail)); 482 483 return inTail; 484 } 485 GetBankXorBits(UINT_32 blockBits)486 UINT_32 GetBankXorBits(UINT_32 blockBits) const 487 { 488 return (blockBits > m_pipeInterleaveLog2 + m_pipesLog2 + ColumnBits) ? 489 Min(blockBits - m_pipeInterleaveLog2 - m_pipesLog2 - ColumnBits, BankBits) : 0; 490 } 491 492 BOOL_32 ValidateNonSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 493 BOOL_32 ValidateSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 494 IsBlock256kb(AddrSwizzleMode swizzleMode)495 BOOL_32 IsBlock256kb(AddrSwizzleMode swizzleMode) const { return IsBlockVariable(swizzleMode); } 496 497 // TODO: figure out if there is any Column bits on GFX11... 498 static const UINT_32 ColumnBits = 2; 499 static const UINT_32 BankBits = 4; 500 static const UINT_32 UnalignedDccType = 3; 501 502 static const Dim3d Block256_3d[MaxNumOfBpp]; 503 static const Dim3d Block256K_Log2_3d[MaxNumOfBpp]; 504 static const Dim3d Block64K_Log2_3d[MaxNumOfBpp]; 505 static const Dim3d Block4K_Log2_3d[MaxNumOfBpp]; 506 507 static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE]; 508 509 // Number of packers log2 510 UINT_32 m_numPkrLog2; 511 // Number of shader array log2 512 UINT_32 m_numSaLog2; 513 514 Gfx11ChipSettings m_settings; 515 516 UINT_32 m_colorBaseIndex; 517 UINT_32 m_htileBaseIndex; 518 UINT_32 m_dccBaseIndex; 519 }; 520 521 } // V2 522 } // Addr 523 524 #endif 525 526