1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. 5 * SPDX-License-Identifier: MIT 6 * 7 ***********************************************************************************************************************/ 8 9 /** 10 **************************************************************************************************** 11 * @file siaddrlib.h 12 * @brief Contains the R800Lib class definition. 13 **************************************************************************************************** 14 */ 15 16 #ifndef __SI_ADDR_LIB_H__ 17 #define __SI_ADDR_LIB_H__ 18 19 #include "addrlib1.h" 20 #include "egbaddrlib.h" 21 22 namespace Addr 23 { 24 namespace V1 25 { 26 27 /** 28 **************************************************************************************************** 29 * @brief Describes the information in tile mode table 30 **************************************************************************************************** 31 */ 32 struct TileConfig 33 { 34 AddrTileMode mode; 35 AddrTileType type; 36 ADDR_TILEINFO info; 37 }; 38 39 /** 40 **************************************************************************************************** 41 * @brief SI specific settings structure. 42 **************************************************************************************************** 43 */ 44 struct SiChipSettings 45 { 46 UINT_32 isSouthernIsland : 1; 47 UINT_32 isTahiti : 1; 48 UINT_32 isPitCairn : 1; 49 UINT_32 isCapeVerde : 1; 50 // Oland/Hainan are of GFXIP 6.0, similar with SI 51 UINT_32 isOland : 1; 52 UINT_32 isHainan : 1; 53 54 // CI 55 UINT_32 isSeaIsland : 1; 56 UINT_32 isBonaire : 1; 57 UINT_32 isKaveri : 1; 58 UINT_32 isSpectre : 1; 59 UINT_32 isSpooky : 1; 60 UINT_32 isKalindi : 1; 61 UINT_32 isHawaii : 1; 62 63 // VI 64 UINT_32 isVolcanicIslands : 1; 65 UINT_32 isIceland : 1; 66 UINT_32 isTonga : 1; 67 UINT_32 isFiji : 1; 68 UINT_32 isPolaris10 : 1; 69 UINT_32 isPolaris11 : 1; 70 UINT_32 isPolaris12 : 1; 71 UINT_32 isVegaM : 1; 72 UINT_32 isCarrizo : 1; 73 74 UINT_32 : 1; 75 }; 76 77 /** 78 **************************************************************************************************** 79 * @brief This class is the SI specific address library 80 * function set. 81 **************************************************************************************************** 82 */ 83 class SiLib : public EgBasedLib 84 { 85 public: 86 /// Creates SiLib object CreateObj(const Client * pClient)87 static Addr::Lib* CreateObj(const Client* pClient) 88 { 89 VOID* pMem = Object::ClientAlloc(sizeof(SiLib), pClient); 90 return (pMem != NULL) ? new (pMem) SiLib(pClient) : NULL; 91 } 92 93 protected: 94 SiLib(const Client* pClient); 95 virtual ~SiLib(); 96 97 // Hwl interface - defined in AddrLib1 98 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( 99 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 100 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 101 102 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( 103 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 104 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; 105 106 virtual UINT_64 HwlComputeXmaskAddrFromCoord( 107 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices, 108 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 109 ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const; 110 111 virtual VOID HwlComputeXmaskCoordFromAddr( 112 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 113 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 114 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; 115 116 virtual ADDR_E_RETURNCODE HwlGetTileIndex( 117 const ADDR_GET_TILEINDEX_INPUT* pIn, 118 ADDR_GET_TILEINDEX_OUTPUT* pOut) const; 119 120 virtual BOOL_32 HwlComputeMipLevel( 121 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 122 123 virtual ChipFamily HwlConvertChipFamily( 124 UINT_32 uChipFamily, UINT_32 uChipRevision); 125 126 virtual BOOL_32 HwlInitGlobalParams( 127 const ADDR_CREATE_INPUT* pCreateIn); 128 129 virtual ADDR_E_RETURNCODE HwlSetupTileCfg( 130 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, 131 ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; 132 133 virtual VOID HwlComputeTileDataWidthAndHeightLinear( 134 UINT_32* pMacroWidth, UINT_32* pMacroHeight, 135 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; 136 137 virtual UINT_64 HwlComputeHtileBytes( 138 UINT_32 pitch, UINT_32 height, UINT_32 bpp, 139 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const; 140 141 virtual ADDR_E_RETURNCODE ComputeBankEquation( 142 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, 143 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; 144 145 virtual ADDR_E_RETURNCODE ComputePipeEquation( 146 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, 147 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; 148 149 virtual UINT_32 ComputePipeFromCoord( 150 UINT_32 x, UINT_32 y, UINT_32 slice, 151 AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 ignoreSE, 152 ADDR_TILEINFO* pTileInfo) const; 153 154 virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const; 155 156 /// Pre-handler of 3x pitch (96 bit) adjustment 157 virtual UINT_32 HwlPreHandleBaseLvl3xPitch( 158 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 159 /// Post-handler of 3x pitch adjustment 160 virtual UINT_32 HwlPostHandleBaseLvl3xPitch( 161 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 162 163 /// Dummy function to finalize the inheritance 164 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( 165 UINT_32 pipe, UINT_32 x) const; 166 167 // Sub-hwl interface - defined in EgBasedLib 168 virtual VOID HwlSetupTileInfo( 169 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, 170 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 171 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, 172 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 173 174 virtual UINT_32 HwlGetPitchAlignmentMicroTiled( 175 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; 176 177 virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( 178 UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 179 UINT_32 baseAlign, UINT_32 pitchAlign, 180 UINT_32 *pPitch, UINT_32 *pHeight) const; 181 182 virtual VOID HwlCheckLastMacroTiledLvl( 183 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 184 185 virtual BOOL_32 HwlTileInfoEqual( 186 const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; 187 188 virtual AddrTileMode HwlDegradeThickTileMode( 189 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; 190 191 virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 192 193 virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 194 195 virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 196 197 /// Overwrite tile setting to PRT 198 virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 199 HwlSanityCheckMacroTiled(ADDR_TILEINFO * pTileInfo)200 virtual BOOL_32 HwlSanityCheckMacroTiled( 201 ADDR_TILEINFO* pTileInfo) const 202 { 203 return TRUE; 204 } 205 206 virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const; 207 208 virtual UINT_64 HwlGetSizeAdjustmentLinear( 209 AddrTileMode tileMode, 210 UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, 211 UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const; 212 213 virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( 214 AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, 215 UINT_32 bank, UINT_32 pipe, 216 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, 217 BOOL_32 ignoreSE, 218 ADDR_TILEINFO* pTileInfo) const; 219 220 virtual UINT_32 HwlPreAdjustBank( 221 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const; 222 223 virtual INT_32 HwlPostCheckTileIndex( 224 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, 225 INT curIndex = TileIndexInvalid) const; 226 227 virtual VOID HwlFmaskPreThunkSurfInfo( 228 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, 229 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, 230 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, 231 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; 232 233 virtual VOID HwlFmaskPostThunkSurfInfo( 234 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, 235 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; 236 237 virtual UINT_32 HwlComputeFmaskBits( 238 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 239 UINT_32* pNumSamples) const; 240 HwlReduceBankWidthHeight(UINT_32 tileSize,UINT_32 bpp,ADDR_SURFACE_FLAGS flags,UINT_32 numSamples,UINT_32 bankHeightAlign,UINT_32 pipes,ADDR_TILEINFO * pTileInfo)241 virtual BOOL_32 HwlReduceBankWidthHeight( 242 UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 243 UINT_32 bankHeightAlign, UINT_32 pipes, 244 ADDR_TILEINFO* pTileInfo) const 245 { 246 return TRUE; 247 } 248 249 virtual UINT_32 HwlComputeMaxBaseAlignments() const; 250 251 virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; 252 253 virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( 254 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 255 UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 256 257 // Get equation table pointer and number of equations HwlGetEquationTableInfo(const ADDR_EQUATION ** ppEquationTable)258 virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const 259 { 260 *ppEquationTable = m_equationTable; 261 262 return m_numEquations; 263 } 264 265 // Check if it is supported for given bpp and tile config to generate an equation 266 BOOL_32 IsEquationSupported( 267 UINT_32 bpp, TileConfig tileConfig, INT_32 tileIndex, UINT_32 elementBytesLog2) const; 268 269 // Protected non-virtual functions 270 VOID ComputeTileCoordFromPipeAndElemIdx( 271 UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile, 272 UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const; 273 274 UINT_32 TileCoordToMaskElementIndex( 275 UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig, 276 UINT_32 *macroShift, UINT_32 *elemIdxBits) const; 277 278 BOOL_32 DecodeGbRegs( 279 const ADDR_REGISTER_VALUE* pRegValue); 280 281 const TileConfig* GetTileSetting( 282 UINT_32 index) const; 283 284 // Initialize equation table 285 VOID InitEquationTable(); 286 287 UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const; 288 289 static const UINT_32 TileTableSize = 32; 290 TileConfig m_tileTable[TileTableSize]; 291 UINT_32 m_noOfEntries; 292 293 // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp) 294 static const UINT_32 MaxNumElementBytes = 5; 295 296 static const BOOL_32 m_EquationSupport[TileTableSize][MaxNumElementBytes]; 297 298 // Prt tile mode index mask 299 static const UINT_32 SiPrtTileIndexMask = ((1 << 3) | (1 << 5) | (1 << 6) | (1 << 7) | 300 (1 << 21) | (1 << 22) | (1 << 23) | (1 << 24) | 301 (1 << 25) | (1 << 30)); 302 303 // More than half slots in tile mode table can't support equation 304 static const UINT_32 EquationTableSize = (MaxNumElementBytes * TileTableSize) / 2; 305 // Equation table 306 ADDR_EQUATION m_equationTable[EquationTableSize]; 307 UINT_32 m_numMacroBits[EquationTableSize]; 308 UINT_32 m_blockWidth[EquationTableSize]; 309 UINT_32 m_blockHeight[EquationTableSize]; 310 UINT_32 m_blockSlices[EquationTableSize]; 311 // Number of equation entries in the table 312 UINT_32 m_numEquations; 313 // Equation lookup table according to bpp and tile index 314 UINT_32 m_equationLookupTable[MaxNumElementBytes][TileTableSize]; 315 316 UINT_32 m_uncompressDepthEqIndex; 317 318 SiChipSettings m_settings; 319 320 private: 321 322 VOID ReadGbTileMode(UINT_32 regValue, TileConfig* pCfg) const; 323 BOOL_32 InitTileSettingTable(const UINT_32 *pSetting, UINT_32 noOfEntries); 324 }; 325 326 } // V1 327 } // Addr 328 329 #endif 330 331