1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_parser_extras.h"
30 #include "glsl_to_nir.h"
31 #include "ir_visitor.h"
32 #include "ir_hierarchical_visitor.h"
33 #include "ir.h"
34 #include "ir_optimization.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_builtin_builder.h"
38 #include "compiler/nir/nir_deref.h"
39 #include "main/errors.h"
40 #include "main/mtypes.h"
41 #include "main/shaderobj.h"
42 #include "util/u_math.h"
43 #include "util/perf/cpu_trace.h"
44
45 /*
46 * pass to lower GLSL IR to NIR
47 *
48 * This will lower variable dereferences to loads/stores of corresponding
49 * variables in NIR - the variables will be converted to registers in a later
50 * pass.
51 */
52
53 static nir_variable_mode
get_param_mode(ir_variable * param)54 get_param_mode(ir_variable *param)
55 {
56 switch ((enum ir_variable_mode)(param->data.mode)) {
57 case ir_var_const_in:
58 case ir_var_function_in:
59 return nir_var_function_in;
60
61 case ir_var_function_out:
62 return nir_var_function_out;
63
64 case ir_var_function_inout:
65 return nir_var_function_inout;
66
67 case ir_var_auto:
68 case ir_var_uniform:
69 case ir_var_shader_storage:
70 case ir_var_temporary:
71 default:
72 unreachable("Unsupported function param mode");
73 }
74 }
75
76 namespace {
77
78 class nir_visitor : public ir_visitor
79 {
80 public:
81 nir_visitor(nir_shader *shader, const uint8_t *src_blake3);
82 nir_visitor(const nir_visitor &) = delete;
83 ~nir_visitor();
84 nir_visitor & operator=(const nir_visitor &) = delete;
85
86 virtual void visit(ir_variable *);
87 virtual void visit(ir_function *);
88 virtual void visit(ir_function_signature *);
89 virtual void visit(ir_loop *);
90 virtual void visit(ir_if *);
91 virtual void visit(ir_discard *);
92 virtual void visit(ir_demote *);
93 virtual void visit(ir_loop_jump *);
94 virtual void visit(ir_return *);
95 virtual void visit(ir_call *);
96 virtual void visit(ir_assignment *);
97 virtual void visit(ir_emit_vertex *);
98 virtual void visit(ir_end_primitive *);
99 virtual void visit(ir_expression *);
100 virtual void visit(ir_swizzle *);
101 virtual void visit(ir_texture *);
102 virtual void visit(ir_constant *);
103 virtual void visit(ir_dereference_variable *);
104 virtual void visit(ir_dereference_record *);
105 virtual void visit(ir_dereference_array *);
106 virtual void visit(ir_barrier *);
107
108 void create_function(ir_function_signature *ir);
109
110 private:
111 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
112 void truncate_after_instruction(exec_node *ir);
113 nir_def *evaluate_rvalue(ir_rvalue *ir);
114
115 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def **srcs);
116 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def *src1);
117 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def *src1,
118 nir_def *src2);
119 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def *src1,
120 nir_def *src2, nir_def *src3);
121
122 nir_shader *shader;
123 nir_function_impl *impl;
124 nir_function_impl *global_impl;
125 nir_builder b;
126 nir_def *result; /* result of the expression tree last visited */
127
128 nir_deref_instr *evaluate_deref(ir_instruction *ir);
129
130 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
131
132 /* most recent deref instruction created */
133 nir_deref_instr *deref;
134
135 /* whether the IR we're operating on is per-function or global */
136 bool is_global;
137
138 ir_function_signature *sig;
139
140 /* map of ir_variable -> nir_variable */
141 struct hash_table *var_table;
142
143 /* map of ir_function_signature -> nir_function_overload */
144 struct hash_table *overload_table;
145
146 /* set of nir_variable hold sparse result */
147 struct set *sparse_variable_set;
148
149 void adjust_sparse_variable(nir_deref_instr *var_deref, const glsl_type *type,
150 nir_def *dest);
151 };
152
153 /*
154 * This visitor runs before the main visitor, calling create_function() for
155 * each function so that the main visitor can resolve forward references in
156 * calls.
157 */
158
159 class nir_function_visitor : public ir_hierarchical_visitor
160 {
161 public:
nir_function_visitor(nir_visitor * v)162 nir_function_visitor(nir_visitor *v) : visitor(v)
163 {
164 }
165 virtual ir_visitor_status visit_enter(ir_function *);
166
167 private:
168 nir_visitor *visitor;
169 };
170
171 } /* end of anonymous namespace */
172
173 nir_shader *
glsl_to_nir(struct gl_shader * gl_shader,const nir_shader_compiler_options * options,const uint8_t * src_blake3)174 glsl_to_nir(struct gl_shader *gl_shader,
175 const nir_shader_compiler_options *options,
176 const uint8_t *src_blake3)
177 {
178 MESA_TRACE_FUNC();
179
180 nir_shader *shader =
181 nir_shader_create(NULL, gl_shader->Stage, options, NULL);
182
183 nir_visitor v1(shader, src_blake3);
184 nir_function_visitor v2(&v1);
185 v2.run(gl_shader->ir);
186 visit_exec_list(gl_shader->ir, &v1);
187
188 /* The GLSL IR won't be needed anymore. */
189 ralloc_free(gl_shader->ir);
190 gl_shader->ir = NULL;
191
192 nir_validate_shader(shader, "after glsl to nir, before function inline");
193 if (should_print_nir(shader)) {
194 printf("glsl_to_nir\n");
195 nir_print_shader(shader, stdout);
196 }
197
198 return shader;
199 }
200
nir_visitor(nir_shader * shader,const uint8_t * src_blake3)201 nir_visitor::nir_visitor(nir_shader *shader, const uint8_t *src_blake3)
202 {
203 this->shader = shader;
204 this->is_global = true;
205 this->var_table = _mesa_pointer_hash_table_create(NULL);
206 this->overload_table = _mesa_pointer_hash_table_create(NULL);
207 this->sparse_variable_set = _mesa_pointer_set_create(NULL);
208 this->result = NULL;
209 this->impl = NULL;
210 this->deref = NULL;
211 this->sig = NULL;
212 this->global_impl = NULL;
213 memset(&this->b, 0, sizeof(this->b));
214
215 if (src_blake3) {
216 char blake_as_str[BLAKE3_OUT_LEN * 2 + 1];;
217 _mesa_blake3_format(blake_as_str, src_blake3);
218
219 /* Create unique function name of function to temporarily hold global
220 * instructions.
221 */
222 char gloabl_func_name[45];
223 snprintf(gloabl_func_name, 45, "%s_%s", "gl_mesa_tmp", blake_as_str);
224
225 nir_function *func = nir_function_create(shader, gloabl_func_name);
226 func->is_tmp_globals_wrapper = true;
227 this->global_impl = nir_function_impl_create(func);
228
229 this->impl = this->global_impl;
230 b = nir_builder_at(nir_after_impl(this->impl));
231 }
232 }
233
~nir_visitor()234 nir_visitor::~nir_visitor()
235 {
236 _mesa_hash_table_destroy(this->var_table, NULL);
237 _mesa_hash_table_destroy(this->overload_table, NULL);
238 _mesa_set_destroy(this->sparse_variable_set, NULL);
239 }
240
241 nir_deref_instr *
evaluate_deref(ir_instruction * ir)242 nir_visitor::evaluate_deref(ir_instruction *ir)
243 {
244 ir->accept(this);
245 return this->deref;
246 }
247
248 void
truncate_after_instruction(exec_node * ir)249 nir_visitor::truncate_after_instruction(exec_node *ir)
250 {
251 if (!ir)
252 return;
253
254 while (!ir->get_next()->is_tail_sentinel()) {
255 ((ir_instruction *)ir->get_next())->remove();
256 }
257 }
258
259 nir_constant *
constant_copy(ir_constant * ir,void * mem_ctx)260 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
261 {
262 if (ir == NULL)
263 return NULL;
264
265 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
266
267 const unsigned rows = ir->type->vector_elements;
268 const unsigned cols = ir->type->matrix_columns;
269 unsigned i;
270
271 ret->num_elements = 0;
272 switch (ir->type->base_type) {
273 case GLSL_TYPE_UINT:
274 /* Only float base types can be matrices. */
275 assert(cols == 1);
276
277 for (unsigned r = 0; r < rows; r++)
278 ret->values[r].u32 = ir->value.u[r];
279
280 break;
281
282 case GLSL_TYPE_UINT16:
283 /* Only float base types can be matrices. */
284 assert(cols == 1);
285
286 for (unsigned r = 0; r < rows; r++)
287 ret->values[r].u16 = ir->value.u16[r];
288 break;
289
290 case GLSL_TYPE_INT:
291 /* Only float base types can be matrices. */
292 assert(cols == 1);
293
294 for (unsigned r = 0; r < rows; r++)
295 ret->values[r].i32 = ir->value.i[r];
296
297 break;
298
299 case GLSL_TYPE_INT16:
300 /* Only float base types can be matrices. */
301 assert(cols == 1);
302
303 for (unsigned r = 0; r < rows; r++)
304 ret->values[r].i16 = ir->value.i16[r];
305 break;
306
307 case GLSL_TYPE_FLOAT:
308 case GLSL_TYPE_FLOAT16:
309 case GLSL_TYPE_DOUBLE:
310 if (cols > 1) {
311 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
312 ret->num_elements = cols;
313 for (unsigned c = 0; c < cols; c++) {
314 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
315 col_const->num_elements = 0;
316 switch (ir->type->base_type) {
317 case GLSL_TYPE_FLOAT:
318 for (unsigned r = 0; r < rows; r++)
319 col_const->values[r].f32 = ir->value.f[c * rows + r];
320 break;
321
322 case GLSL_TYPE_FLOAT16:
323 for (unsigned r = 0; r < rows; r++)
324 col_const->values[r].u16 = ir->value.f16[c * rows + r];
325 break;
326
327 case GLSL_TYPE_DOUBLE:
328 for (unsigned r = 0; r < rows; r++)
329 col_const->values[r].f64 = ir->value.d[c * rows + r];
330 break;
331
332 default:
333 unreachable("Cannot get here from the first level switch");
334 }
335 ret->elements[c] = col_const;
336 }
337 } else {
338 switch (ir->type->base_type) {
339 case GLSL_TYPE_FLOAT:
340 for (unsigned r = 0; r < rows; r++)
341 ret->values[r].f32 = ir->value.f[r];
342 break;
343
344 case GLSL_TYPE_FLOAT16:
345 for (unsigned r = 0; r < rows; r++)
346 ret->values[r].u16 = ir->value.f16[r];
347 break;
348
349 case GLSL_TYPE_DOUBLE:
350 for (unsigned r = 0; r < rows; r++)
351 ret->values[r].f64 = ir->value.d[r];
352 break;
353
354 default:
355 unreachable("Cannot get here from the first level switch");
356 }
357 }
358 break;
359
360 case GLSL_TYPE_UINT64:
361 /* Only float base types can be matrices. */
362 assert(cols == 1);
363
364 for (unsigned r = 0; r < rows; r++)
365 ret->values[r].u64 = ir->value.u64[r];
366 break;
367
368 case GLSL_TYPE_INT64:
369 /* Only float base types can be matrices. */
370 assert(cols == 1);
371
372 for (unsigned r = 0; r < rows; r++)
373 ret->values[r].i64 = ir->value.i64[r];
374 break;
375
376 case GLSL_TYPE_BOOL:
377 /* Only float base types can be matrices. */
378 assert(cols == 1);
379
380 for (unsigned r = 0; r < rows; r++)
381 ret->values[r].b = ir->value.b[r];
382
383 break;
384
385 case GLSL_TYPE_STRUCT:
386 case GLSL_TYPE_ARRAY:
387 ret->elements = ralloc_array(mem_ctx, nir_constant *,
388 ir->type->length);
389 ret->num_elements = ir->type->length;
390
391 for (i = 0; i < ir->type->length; i++)
392 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
393 break;
394
395 default:
396 unreachable("not reached");
397 }
398
399 return ret;
400 }
401
402 void
adjust_sparse_variable(nir_deref_instr * var_deref,const glsl_type * type,nir_def * dest)403 nir_visitor::adjust_sparse_variable(nir_deref_instr *var_deref, const glsl_type *type,
404 nir_def *dest)
405 {
406 const glsl_type *texel_type = glsl_get_field_type(type, "texel");
407 assert(texel_type);
408
409 assert(var_deref->deref_type == nir_deref_type_var);
410 nir_variable *var = var_deref->var;
411
412 /* Adjust nir_variable type to align with sparse nir instructions.
413 * Because the nir_variable is created with struct type from ir_variable,
414 * but sparse nir instructions output with vector dest.
415 */
416 var->type = glsl_simple_type(glsl_get_base_glsl_type(texel_type)->base_type,
417 dest->num_components, 1);
418
419 var_deref->type = var->type;
420
421 /* Record the adjusted variable. */
422 _mesa_set_add(this->sparse_variable_set, var);
423 }
424
425 static unsigned
get_nir_how_declared(unsigned how_declared)426 get_nir_how_declared(unsigned how_declared)
427 {
428 if (how_declared == ir_var_hidden)
429 return nir_var_hidden;
430
431 if (how_declared == ir_var_declared_implicitly)
432 return nir_var_declared_implicitly;
433
434 return nir_var_declared_normally;
435 }
436
437 void
visit(ir_variable * ir)438 nir_visitor::visit(ir_variable *ir)
439 {
440 /* FINISHME: inout parameters */
441 assert(ir->data.mode != ir_var_function_inout);
442
443 if (ir->data.mode == ir_var_function_out)
444 return;
445
446 nir_variable *var = rzalloc(shader, nir_variable);
447 var->type = ir->type;
448 var->name = ralloc_strdup(var, ir->name);
449
450 var->data.assigned = ir->data.assigned;
451 var->data.read_only = ir->data.read_only;
452 var->data.centroid = ir->data.centroid;
453 var->data.sample = ir->data.sample;
454 var->data.patch = ir->data.patch;
455 var->data.how_declared = get_nir_how_declared(ir->data.how_declared);
456 var->data.invariant = ir->data.invariant;
457 var->data.explicit_invariant = ir->data.explicit_invariant;
458 var->data.location = ir->data.location;
459 var->data.must_be_shader_input = ir->data.must_be_shader_input;
460 var->data.stream = ir->data.stream;
461 if (ir->data.stream & (1u << 31))
462 var->data.stream |= NIR_STREAM_PACKED;
463
464 var->data.precision = ir->data.precision;
465 var->data.explicit_location = ir->data.explicit_location;
466 var->data.matrix_layout = ir->data.matrix_layout;
467 var->data.from_named_ifc_block = ir->data.from_named_ifc_block;
468 var->data.compact = false;
469 var->data.used = ir->data.used;
470 var->data.max_array_access = ir->data.max_array_access;
471 var->data.implicit_sized_array = ir->data.implicit_sized_array;
472 var->data.from_ssbo_unsized_array = ir->data.from_ssbo_unsized_array;
473
474 switch(ir->data.mode) {
475 case ir_var_auto:
476 if (is_global) {
477 var->data.mode = nir_var_shader_temp;
478 break;
479 }
480
481 FALLTHROUGH;
482 case ir_var_temporary:
483 var->data.mode = nir_var_function_temp;
484 break;
485
486 case ir_var_function_in:
487 case ir_var_const_in:
488 var->data.mode = nir_var_function_temp;
489 break;
490
491 case ir_var_shader_in:
492 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
493 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
494 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
495 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
496 var->data.mode = nir_var_system_value;
497 } else {
498 var->data.mode = nir_var_shader_in;
499 }
500 break;
501
502 case ir_var_shader_out:
503 var->data.mode = nir_var_shader_out;
504 break;
505
506 case ir_var_uniform:
507 if (ir->get_interface_type())
508 var->data.mode = nir_var_mem_ubo;
509 else if (glsl_type_contains_image(ir->type) && !ir->data.bindless)
510 var->data.mode = nir_var_image;
511 else
512 var->data.mode = nir_var_uniform;
513 break;
514
515 case ir_var_shader_storage:
516 var->data.mode = nir_var_mem_ssbo;
517 break;
518
519 case ir_var_system_value:
520 var->data.mode = nir_var_system_value;
521 break;
522
523 case ir_var_shader_shared:
524 var->data.mode = nir_var_mem_shared;
525 break;
526
527 default:
528 unreachable("not reached");
529 }
530
531 unsigned mem_access = 0;
532 if (ir->data.memory_read_only)
533 mem_access |= ACCESS_NON_WRITEABLE;
534 if (ir->data.memory_write_only)
535 mem_access |= ACCESS_NON_READABLE;
536 if (ir->data.memory_coherent)
537 mem_access |= ACCESS_COHERENT;
538 if (ir->data.memory_volatile)
539 mem_access |= ACCESS_VOLATILE;
540 if (ir->data.memory_restrict)
541 mem_access |= ACCESS_RESTRICT;
542
543 var->interface_type = ir->get_interface_type();
544
545 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
546 if (!glsl_type_is_interface(glsl_without_array(ir->type))) {
547 /* This variable is one entry in the interface */
548 UNUSED bool found = false;
549 for (unsigned i = 0; i < ir->get_interface_type()->length; i++) {
550 const glsl_struct_field *field =
551 &ir->get_interface_type()->fields.structure[i];
552 if (strcmp(ir->name, field->name) != 0)
553 continue;
554
555 if (field->memory_read_only)
556 mem_access |= ACCESS_NON_WRITEABLE;
557 if (field->memory_write_only)
558 mem_access |= ACCESS_NON_READABLE;
559 if (field->memory_coherent)
560 mem_access |= ACCESS_COHERENT;
561 if (field->memory_volatile)
562 mem_access |= ACCESS_VOLATILE;
563 if (field->memory_restrict)
564 mem_access |= ACCESS_RESTRICT;
565
566 found = true;
567 break;
568 }
569 assert(found);
570 }
571 }
572
573 var->data.interpolation = ir->data.interpolation;
574 var->data.location_frac = ir->data.location_frac;
575
576 switch (ir->data.depth_layout) {
577 case ir_depth_layout_none:
578 var->data.depth_layout = nir_depth_layout_none;
579 break;
580 case ir_depth_layout_any:
581 var->data.depth_layout = nir_depth_layout_any;
582 break;
583 case ir_depth_layout_greater:
584 var->data.depth_layout = nir_depth_layout_greater;
585 break;
586 case ir_depth_layout_less:
587 var->data.depth_layout = nir_depth_layout_less;
588 break;
589 case ir_depth_layout_unchanged:
590 var->data.depth_layout = nir_depth_layout_unchanged;
591 break;
592 default:
593 unreachable("not reached");
594 }
595
596 var->data.index = ir->data.index;
597 var->data.descriptor_set = 0;
598 var->data.binding = ir->data.binding;
599 var->data.explicit_binding = ir->data.explicit_binding;
600 var->data.explicit_offset = ir->data.explicit_xfb_offset;
601 var->data.bindless = ir->data.bindless;
602 var->data.offset = ir->data.offset;
603 var->data.access = (gl_access_qualifier)mem_access;
604 var->data.has_initializer = ir->data.has_initializer;
605 var->data.is_implicit_initializer = ir->data.is_implicit_initializer;
606
607 if (glsl_type_is_image(glsl_without_array(var->type))) {
608 var->data.image.format = ir->data.image_format;
609 } else if (var->data.mode == nir_var_shader_out) {
610 var->data.xfb.buffer = ir->data.xfb_buffer;
611 var->data.xfb.stride = ir->data.xfb_stride;
612 }
613
614 var->data.fb_fetch_output = ir->data.fb_fetch_output;
615 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
616 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
617
618 if (ir->is_interface_instance()) {
619 int *max_ifc_array_access = ir->get_max_ifc_array_access();
620 if (max_ifc_array_access) {
621 var->max_ifc_array_access =
622 rzalloc_array(var, int, ir->get_interface_type()->length);
623 memcpy(var->max_ifc_array_access, max_ifc_array_access,
624 ir->get_interface_type()->length * sizeof(unsigned));
625 }
626 }
627
628 var->num_state_slots = ir->get_num_state_slots();
629 if (var->num_state_slots > 0) {
630 var->state_slots = rzalloc_array(var, nir_state_slot,
631 var->num_state_slots);
632
633 ir_state_slot *state_slots = ir->get_state_slots();
634 for (unsigned i = 0; i < var->num_state_slots; i++) {
635 for (unsigned j = 0; j < 4; j++)
636 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
637 }
638 } else {
639 var->state_slots = NULL;
640 }
641
642 /* Values declared const will have ir->constant_value instead of
643 * ir->constant_initializer.
644 */
645 if (ir->constant_initializer)
646 var->constant_initializer = constant_copy(ir->constant_initializer, var);
647 else
648 var->constant_initializer = constant_copy(ir->constant_value, var);
649
650 if (var->data.mode == nir_var_function_temp)
651 nir_function_impl_add_variable(impl, var);
652 else
653 nir_shader_add_variable(shader, var);
654
655 _mesa_hash_table_insert(var_table, ir, var);
656 }
657
658 ir_visitor_status
visit_enter(ir_function * ir)659 nir_function_visitor::visit_enter(ir_function *ir)
660 {
661 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
662 visitor->create_function(sig);
663 }
664 return visit_continue_with_parent;
665 }
666
667 void
create_function(ir_function_signature * ir)668 nir_visitor::create_function(ir_function_signature *ir)
669 {
670 if (ir->is_intrinsic())
671 return;
672
673 nir_function *func = nir_function_create(shader, ir->function_name());
674 if (strcmp(ir->function_name(), "main") == 0)
675 func->is_entrypoint = true;
676
677 func->num_params = ir->parameters.length() +
678 (ir->return_type != &glsl_type_builtin_void);
679 func->params = rzalloc_array(shader, nir_parameter, func->num_params);
680
681 unsigned np = 0;
682 if (ir->return_type != &glsl_type_builtin_void) {
683 /* The return value is a variable deref (basically an out parameter) */
684 func->params[np].num_components = 1;
685 func->params[np].bit_size = 32;
686 func->params[np].type = ir->return_type;
687 func->params[np].is_return = true;
688 func->params[np].mode = nir_var_function_out;
689 np++;
690 }
691
692 foreach_in_list(ir_variable, param, &ir->parameters) {
693 func->params[np].num_components = 1;
694 func->params[np].bit_size = 32;
695
696 func->params[np].type = param->type;
697 func->params[np].is_return = false;
698 func->params[np].mode = get_param_mode(param);
699 func->params[np].implicit_conversion_prohibited =
700 !!param->data.implicit_conversion_prohibited;
701 np++;
702 }
703 assert(np == func->num_params);
704
705 func->is_subroutine = ir->function()->is_subroutine;
706 func->num_subroutine_types = ir->function()->num_subroutine_types;
707 func->subroutine_index = ir->function()->subroutine_index;
708 func->subroutine_types =
709 ralloc_array(func, const struct glsl_type *, func->num_subroutine_types);
710 for (int i = 0; i < func->num_subroutine_types; i++)
711 func->subroutine_types[i] = ir->function()->subroutine_types[i];
712
713 _mesa_hash_table_insert(this->overload_table, ir, func);
714 }
715
716 void
visit(ir_function * ir)717 nir_visitor::visit(ir_function *ir)
718 {
719 foreach_in_list(ir_function_signature, sig, &ir->signatures)
720 sig->accept(this);
721 }
722
723 void
visit(ir_function_signature * ir)724 nir_visitor::visit(ir_function_signature *ir)
725 {
726 if (ir->is_intrinsic())
727 return;
728
729 this->sig = ir;
730
731 struct hash_entry *entry =
732 _mesa_hash_table_search(this->overload_table, ir);
733
734 assert(entry);
735 nir_function *func = (nir_function *) entry->data;
736
737 if (ir->is_defined) {
738 nir_function_impl *impl = nir_function_impl_create(func);
739 this->impl = impl;
740
741 this->is_global = false;
742
743 b = nir_builder_at(nir_after_impl(impl));
744
745 visit_exec_list(&ir->body, this);
746
747 this->impl = global_impl;
748 if (this->impl)
749 b = nir_builder_at(nir_after_impl(this->impl));
750
751 this->is_global = true;
752 }
753 }
754
755 void
visit(ir_loop * ir)756 nir_visitor::visit(ir_loop *ir)
757 {
758 nir_push_loop(&b);
759 visit_exec_list(&ir->body_instructions, this);
760 nir_pop_loop(&b, NULL);
761 }
762
763 void
visit(ir_if * ir)764 nir_visitor::visit(ir_if *ir)
765 {
766 nir_push_if(&b, evaluate_rvalue(ir->condition));
767 visit_exec_list(&ir->then_instructions, this);
768 nir_push_else(&b, NULL);
769 visit_exec_list(&ir->else_instructions, this);
770 nir_pop_if(&b, NULL);
771 }
772
773 void
visit(ir_discard * ir)774 nir_visitor::visit(ir_discard *ir)
775 {
776 /*
777 * discards aren't treated as control flow, because before we lower them
778 * they can appear anywhere in the shader and the stuff after them may still
779 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
780 * discards will be immediately followed by a return.
781 */
782
783 if (ir->condition)
784 nir_discard_if(&b, evaluate_rvalue(ir->condition));
785 else
786 nir_discard(&b);
787 }
788
789 void
visit(ir_demote * ir)790 nir_visitor::visit(ir_demote *ir)
791 {
792 nir_demote(&b);
793 }
794
795 void
visit(ir_emit_vertex * ir)796 nir_visitor::visit(ir_emit_vertex *ir)
797 {
798 nir_emit_vertex(&b, (unsigned)ir->stream_id());
799 }
800
801 void
visit(ir_end_primitive * ir)802 nir_visitor::visit(ir_end_primitive *ir)
803 {
804 nir_end_primitive(&b, (unsigned)ir->stream_id());
805 }
806
807 void
visit(ir_loop_jump * ir)808 nir_visitor::visit(ir_loop_jump *ir)
809 {
810 nir_jump_type type;
811 switch (ir->mode) {
812 case ir_loop_jump::jump_break:
813 type = nir_jump_break;
814 break;
815 case ir_loop_jump::jump_continue:
816 type = nir_jump_continue;
817 break;
818 default:
819 unreachable("not reached");
820 }
821
822 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
823 nir_builder_instr_insert(&b, &instr->instr);
824
825 /* Eliminate all instructions after the jump, since they are unreachable
826 * and NIR considers adding these instructions illegal.
827 */
828 truncate_after_instruction(ir);
829 }
830
831 void
visit(ir_return * ir)832 nir_visitor::visit(ir_return *ir)
833 {
834 if (ir->value != NULL) {
835 nir_deref_instr *ret_deref =
836 nir_build_deref_cast(&b, nir_load_param(&b, 0),
837 nir_var_function_temp, ir->value->type, 0);
838
839 if (glsl_type_is_vector_or_scalar(ir->value->type)) {
840 nir_store_deref(&b, ret_deref, evaluate_rvalue(ir->value), ~0);
841 } else {
842 nir_copy_deref(&b, ret_deref, evaluate_deref(ir->value));
843 }
844 }
845
846 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
847 nir_builder_instr_insert(&b, &instr->instr);
848
849 /* Eliminate all instructions after the jump, since they are unreachable
850 * and NIR considers adding these instructions illegal.
851 */
852 truncate_after_instruction(ir);
853 }
854
855 static void
intrinsic_set_std430_align(nir_intrinsic_instr * intrin,const glsl_type * type)856 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
857 {
858 unsigned bit_size = glsl_type_is_boolean(type) ? 32 : glsl_get_bit_size(type);
859 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
860 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
861 }
862
863 /* Accumulate any qualifiers along the deref chain to get the actual
864 * load/store qualifier.
865 */
866
867 static enum gl_access_qualifier
deref_get_qualifier(nir_deref_instr * deref)868 deref_get_qualifier(nir_deref_instr *deref)
869 {
870 nir_deref_path path;
871 nir_deref_path_init(&path, deref, NULL);
872
873 /* Function params can lead to a deref cast just return zero as these
874 * params have no qualifers anyway.
875 */
876 if (path.path[0]->deref_type != nir_deref_type_var)
877 return (gl_access_qualifier) 0;
878
879 unsigned qualifiers = path.path[0]->var->data.access;
880
881 const glsl_type *parent_type = path.path[0]->type;
882 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
883 nir_deref_instr *cur = *cur_ptr;
884
885 if (glsl_type_is_interface(parent_type)) {
886 const struct glsl_struct_field *field =
887 &parent_type->fields.structure[cur->strct.index];
888 if (field->memory_read_only)
889 qualifiers |= ACCESS_NON_WRITEABLE;
890 if (field->memory_write_only)
891 qualifiers |= ACCESS_NON_READABLE;
892 if (field->memory_coherent)
893 qualifiers |= ACCESS_COHERENT;
894 if (field->memory_volatile)
895 qualifiers |= ACCESS_VOLATILE;
896 if (field->memory_restrict)
897 qualifiers |= ACCESS_RESTRICT;
898 }
899
900 parent_type = cur->type;
901 }
902
903 nir_deref_path_finish(&path);
904
905 return (gl_access_qualifier) qualifiers;
906 }
907
908 static nir_op
get_reduction_op(enum ir_intrinsic_id id,const glsl_type * type)909 get_reduction_op(enum ir_intrinsic_id id, const glsl_type *type)
910 {
911 #define IR_CASE(op) \
912 case ir_intrinsic_reduce_##op: \
913 case ir_intrinsic_inclusive_##op: \
914 case ir_intrinsic_exclusive_##op: \
915 case ir_intrinsic_clustered_##op: \
916 return CONV_OP(op);
917
918 switch (id) {
919
920 #define CONV_OP(op) \
921 type->base_type == GLSL_TYPE_INT || type->base_type == GLSL_TYPE_UINT ? \
922 nir_op_i##op : nir_op_f##op
923
924 IR_CASE(add)
925 IR_CASE(mul)
926
927 #undef CONV_OP
928 #define CONV_OP(op) \
929 type->base_type == GLSL_TYPE_INT ? nir_op_i##op : \
930 (type->base_type == GLSL_TYPE_UINT ? nir_op_u##op : nir_op_f##op)
931
932 IR_CASE(min)
933 IR_CASE(max)
934
935 #undef CONV_OP
936 #define CONV_OP(op) nir_op_i##op
937
938 IR_CASE(and)
939 IR_CASE(or)
940 IR_CASE(xor)
941
942 #undef CONV_OP
943
944 default:
945 unreachable("not reached");
946 }
947
948 #undef IR_CASE
949 }
950
951 void
visit(ir_call * ir)952 nir_visitor::visit(ir_call *ir)
953 {
954 if (ir->callee->is_intrinsic()) {
955 nir_intrinsic_op op;
956
957 /* Initialize to something because gcc complains otherwise */
958 nir_atomic_op atomic_op = nir_atomic_op_iadd;
959
960 switch (ir->callee->intrinsic_id) {
961 case ir_intrinsic_generic_atomic_add:
962 op = nir_intrinsic_deref_atomic;
963 atomic_op = glsl_type_is_integer_32_64(ir->return_deref->type)
964 ? nir_atomic_op_iadd : nir_atomic_op_fadd;
965 break;
966 case ir_intrinsic_generic_atomic_and:
967 op = nir_intrinsic_deref_atomic;
968 atomic_op = nir_atomic_op_iand;
969 break;
970 case ir_intrinsic_generic_atomic_or:
971 op = nir_intrinsic_deref_atomic;
972 atomic_op = nir_atomic_op_ior;
973 break;
974 case ir_intrinsic_generic_atomic_xor:
975 op = nir_intrinsic_deref_atomic;
976 atomic_op = nir_atomic_op_ixor;
977 break;
978 case ir_intrinsic_generic_atomic_min:
979 assert(ir->return_deref);
980 op = nir_intrinsic_deref_atomic;
981 if (ir->return_deref->type == &glsl_type_builtin_int ||
982 ir->return_deref->type == &glsl_type_builtin_int64_t)
983 atomic_op = nir_atomic_op_imin;
984 else if (ir->return_deref->type == &glsl_type_builtin_uint ||
985 ir->return_deref->type == &glsl_type_builtin_uint64_t)
986 atomic_op = nir_atomic_op_umin;
987 else if (ir->return_deref->type == &glsl_type_builtin_float)
988 atomic_op = nir_atomic_op_fmin;
989 else
990 unreachable("Invalid type");
991 break;
992 case ir_intrinsic_generic_atomic_max:
993 assert(ir->return_deref);
994 op = nir_intrinsic_deref_atomic;
995 if (ir->return_deref->type == &glsl_type_builtin_int ||
996 ir->return_deref->type == &glsl_type_builtin_int64_t)
997 atomic_op = nir_atomic_op_imax;
998 else if (ir->return_deref->type == &glsl_type_builtin_uint ||
999 ir->return_deref->type == &glsl_type_builtin_uint64_t)
1000 atomic_op = nir_atomic_op_umax;
1001 else if (ir->return_deref->type == &glsl_type_builtin_float)
1002 atomic_op = nir_atomic_op_fmax;
1003 else
1004 unreachable("Invalid type");
1005 break;
1006 case ir_intrinsic_generic_atomic_exchange:
1007 op = nir_intrinsic_deref_atomic;
1008 atomic_op = nir_atomic_op_xchg;
1009 break;
1010 case ir_intrinsic_generic_atomic_comp_swap:
1011 op = nir_intrinsic_deref_atomic_swap;
1012 atomic_op = glsl_type_is_integer_32_64(ir->return_deref->type)
1013 ? nir_atomic_op_cmpxchg
1014 : nir_atomic_op_fcmpxchg;
1015 break;
1016 case ir_intrinsic_atomic_counter_read:
1017 op = nir_intrinsic_atomic_counter_read_deref;
1018 break;
1019 case ir_intrinsic_atomic_counter_increment:
1020 op = nir_intrinsic_atomic_counter_inc_deref;
1021 break;
1022 case ir_intrinsic_atomic_counter_predecrement:
1023 op = nir_intrinsic_atomic_counter_pre_dec_deref;
1024 break;
1025 case ir_intrinsic_atomic_counter_add:
1026 op = nir_intrinsic_atomic_counter_add_deref;
1027 break;
1028 case ir_intrinsic_atomic_counter_and:
1029 op = nir_intrinsic_atomic_counter_and_deref;
1030 break;
1031 case ir_intrinsic_atomic_counter_or:
1032 op = nir_intrinsic_atomic_counter_or_deref;
1033 break;
1034 case ir_intrinsic_atomic_counter_xor:
1035 op = nir_intrinsic_atomic_counter_xor_deref;
1036 break;
1037 case ir_intrinsic_atomic_counter_min:
1038 op = nir_intrinsic_atomic_counter_min_deref;
1039 break;
1040 case ir_intrinsic_atomic_counter_max:
1041 op = nir_intrinsic_atomic_counter_max_deref;
1042 break;
1043 case ir_intrinsic_atomic_counter_exchange:
1044 op = nir_intrinsic_atomic_counter_exchange_deref;
1045 break;
1046 case ir_intrinsic_atomic_counter_comp_swap:
1047 op = nir_intrinsic_atomic_counter_comp_swap_deref;
1048 break;
1049 case ir_intrinsic_image_load:
1050 op = nir_intrinsic_image_deref_load;
1051 break;
1052 case ir_intrinsic_image_store:
1053 op = nir_intrinsic_image_deref_store;
1054 break;
1055 case ir_intrinsic_image_atomic_add:
1056 op = nir_intrinsic_image_deref_atomic;
1057 atomic_op = glsl_type_is_integer_32_64(ir->return_deref->type)
1058 ? nir_atomic_op_iadd
1059 : nir_atomic_op_fadd;
1060 break;
1061 case ir_intrinsic_image_atomic_min:
1062 op = nir_intrinsic_image_deref_atomic;
1063 if (ir->return_deref->type == &glsl_type_builtin_int)
1064 atomic_op = nir_atomic_op_imin;
1065 else if (ir->return_deref->type == &glsl_type_builtin_uint)
1066 atomic_op = nir_atomic_op_umin;
1067 else
1068 unreachable("Invalid type");
1069 break;
1070 case ir_intrinsic_image_atomic_max:
1071 op = nir_intrinsic_image_deref_atomic;
1072 if (ir->return_deref->type == &glsl_type_builtin_int)
1073 atomic_op = nir_atomic_op_imax;
1074 else if (ir->return_deref->type == &glsl_type_builtin_uint)
1075 atomic_op = nir_atomic_op_umax;
1076 else
1077 unreachable("Invalid type");
1078 break;
1079 case ir_intrinsic_image_atomic_and:
1080 op = nir_intrinsic_image_deref_atomic;
1081 atomic_op = nir_atomic_op_iand;
1082 break;
1083 case ir_intrinsic_image_atomic_or:
1084 op = nir_intrinsic_image_deref_atomic;
1085 atomic_op = nir_atomic_op_ior;
1086 break;
1087 case ir_intrinsic_image_atomic_xor:
1088 op = nir_intrinsic_image_deref_atomic;
1089 atomic_op = nir_atomic_op_ixor;
1090 break;
1091 case ir_intrinsic_image_atomic_exchange:
1092 op = nir_intrinsic_image_deref_atomic;
1093 atomic_op = nir_atomic_op_xchg;
1094 break;
1095 case ir_intrinsic_image_atomic_comp_swap:
1096 op = nir_intrinsic_image_deref_atomic_swap;
1097 atomic_op = nir_atomic_op_cmpxchg;
1098 break;
1099 case ir_intrinsic_image_atomic_inc_wrap:
1100 op = nir_intrinsic_image_deref_atomic;
1101 atomic_op = nir_atomic_op_inc_wrap;
1102 break;
1103 case ir_intrinsic_image_atomic_dec_wrap:
1104 op = nir_intrinsic_image_deref_atomic;
1105 atomic_op = nir_atomic_op_dec_wrap;
1106 break;
1107 case ir_intrinsic_memory_barrier:
1108 case ir_intrinsic_memory_barrier_buffer:
1109 case ir_intrinsic_memory_barrier_image:
1110 case ir_intrinsic_memory_barrier_shared:
1111 case ir_intrinsic_memory_barrier_atomic_counter:
1112 case ir_intrinsic_group_memory_barrier:
1113 case ir_intrinsic_subgroup_barrier:
1114 case ir_intrinsic_subgroup_memory_barrier:
1115 case ir_intrinsic_subgroup_memory_barrier_buffer:
1116 case ir_intrinsic_subgroup_memory_barrier_shared:
1117 case ir_intrinsic_subgroup_memory_barrier_image:
1118 op = nir_intrinsic_barrier;
1119 break;
1120 case ir_intrinsic_image_size:
1121 op = nir_intrinsic_image_deref_size;
1122 break;
1123 case ir_intrinsic_image_samples:
1124 op = nir_intrinsic_image_deref_samples;
1125 break;
1126 case ir_intrinsic_image_sparse_load:
1127 op = nir_intrinsic_image_deref_sparse_load;
1128 break;
1129 case ir_intrinsic_shader_clock:
1130 op = nir_intrinsic_shader_clock;
1131 break;
1132 case ir_intrinsic_begin_invocation_interlock:
1133 op = nir_intrinsic_begin_invocation_interlock;
1134 break;
1135 case ir_intrinsic_end_invocation_interlock:
1136 op = nir_intrinsic_end_invocation_interlock;
1137 break;
1138 case ir_intrinsic_vote_any:
1139 op = nir_intrinsic_vote_any;
1140 break;
1141 case ir_intrinsic_vote_all:
1142 op = nir_intrinsic_vote_all;
1143 break;
1144 case ir_intrinsic_vote_eq: {
1145 ir_rvalue *rvalue = (ir_rvalue *) ir->actual_parameters.get_head();
1146 op = glsl_type_is_integer(rvalue->type) ? nir_intrinsic_vote_ieq : nir_intrinsic_vote_feq;
1147 break;
1148 }
1149 case ir_intrinsic_ballot:
1150 op = nir_intrinsic_ballot;
1151 break;
1152 case ir_intrinsic_read_invocation:
1153 op = nir_intrinsic_read_invocation;
1154 break;
1155 case ir_intrinsic_read_first_invocation:
1156 op = nir_intrinsic_read_first_invocation;
1157 break;
1158 case ir_intrinsic_helper_invocation:
1159 op = nir_intrinsic_is_helper_invocation;
1160 break;
1161 case ir_intrinsic_is_sparse_texels_resident:
1162 op = nir_intrinsic_is_sparse_texels_resident;
1163 break;
1164 case ir_intrinsic_elect:
1165 op = nir_intrinsic_elect;
1166 break;
1167 case ir_intrinsic_inverse_ballot:
1168 op = nir_intrinsic_inverse_ballot;
1169 break;
1170 case ir_intrinsic_ballot_bit_extract:
1171 op = nir_intrinsic_ballot_bitfield_extract;
1172 break;
1173 case ir_intrinsic_ballot_bit_count:
1174 op = nir_intrinsic_ballot_bit_count_reduce;
1175 break;
1176 case ir_intrinsic_ballot_inclusive_bit_count:
1177 op = nir_intrinsic_ballot_bit_count_inclusive;
1178 break;
1179 case ir_intrinsic_ballot_exclusive_bit_count:
1180 op = nir_intrinsic_ballot_bit_count_exclusive;
1181 break;
1182 case ir_intrinsic_ballot_find_lsb:
1183 op = nir_intrinsic_ballot_find_lsb;
1184 break;
1185 case ir_intrinsic_ballot_find_msb:
1186 op = nir_intrinsic_ballot_find_msb;
1187 break;
1188 case ir_intrinsic_shuffle:
1189 op = nir_intrinsic_shuffle;
1190 break;
1191 case ir_intrinsic_shuffle_xor:
1192 op = nir_intrinsic_shuffle_xor;
1193 break;
1194 case ir_intrinsic_shuffle_up:
1195 op = nir_intrinsic_shuffle_up;
1196 break;
1197 case ir_intrinsic_shuffle_down:
1198 op = nir_intrinsic_shuffle_down;
1199 break;
1200 case ir_intrinsic_reduce_add:
1201 case ir_intrinsic_reduce_mul:
1202 case ir_intrinsic_reduce_min:
1203 case ir_intrinsic_reduce_max:
1204 case ir_intrinsic_reduce_and:
1205 case ir_intrinsic_reduce_or:
1206 case ir_intrinsic_reduce_xor:
1207 case ir_intrinsic_clustered_add:
1208 case ir_intrinsic_clustered_mul:
1209 case ir_intrinsic_clustered_min:
1210 case ir_intrinsic_clustered_max:
1211 case ir_intrinsic_clustered_and:
1212 case ir_intrinsic_clustered_or:
1213 case ir_intrinsic_clustered_xor:
1214 op = nir_intrinsic_reduce;
1215 break;
1216 case ir_intrinsic_inclusive_add:
1217 case ir_intrinsic_inclusive_mul:
1218 case ir_intrinsic_inclusive_min:
1219 case ir_intrinsic_inclusive_max:
1220 case ir_intrinsic_inclusive_and:
1221 case ir_intrinsic_inclusive_or:
1222 case ir_intrinsic_inclusive_xor:
1223 op = nir_intrinsic_inclusive_scan;
1224 break;
1225 case ir_intrinsic_exclusive_add:
1226 case ir_intrinsic_exclusive_mul:
1227 case ir_intrinsic_exclusive_min:
1228 case ir_intrinsic_exclusive_max:
1229 case ir_intrinsic_exclusive_and:
1230 case ir_intrinsic_exclusive_or:
1231 case ir_intrinsic_exclusive_xor:
1232 op = nir_intrinsic_exclusive_scan;
1233 break;
1234 case ir_intrinsic_quad_broadcast:
1235 op = nir_intrinsic_quad_broadcast;
1236 break;
1237 case ir_intrinsic_quad_swap_horizontal:
1238 op = nir_intrinsic_quad_swap_horizontal;
1239 break;
1240 case ir_intrinsic_quad_swap_vertical:
1241 op = nir_intrinsic_quad_swap_vertical;
1242 break;
1243 case ir_intrinsic_quad_swap_diagonal:
1244 op = nir_intrinsic_quad_swap_diagonal;
1245 break;
1246 default:
1247 unreachable("not reached");
1248 }
1249
1250 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1251 nir_def *ret = &instr->def;
1252
1253 switch (op) {
1254 case nir_intrinsic_deref_atomic:
1255 case nir_intrinsic_deref_atomic_swap: {
1256 int param_count = ir->actual_parameters.length();
1257 assert(param_count == 2 || param_count == 3);
1258
1259 /* Deref */
1260 exec_node *param = ir->actual_parameters.get_head();
1261 ir_rvalue *rvalue = (ir_rvalue *) param;
1262 ir_dereference *deref = rvalue->as_dereference();
1263 ir_swizzle *swizzle = NULL;
1264 if (!deref) {
1265 /* We may have a swizzle to pick off a single vec4 component */
1266 swizzle = rvalue->as_swizzle();
1267 assert(swizzle && swizzle->type->vector_elements == 1);
1268 deref = swizzle->val->as_dereference();
1269 assert(deref);
1270 }
1271 nir_deref_instr *nir_deref = evaluate_deref(deref);
1272 if (swizzle) {
1273 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1274 swizzle->mask.x);
1275 }
1276 instr->src[0] = nir_src_for_ssa(&nir_deref->def);
1277
1278 nir_intrinsic_set_atomic_op(instr, atomic_op);
1279 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1280
1281 /* data1 parameter (this is always present) */
1282 param = param->get_next();
1283 ir_instruction *inst = (ir_instruction *) param;
1284 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1285
1286 /* data2 parameter (only with atomic_comp_swap) */
1287 if (param_count == 3) {
1288 assert(op == nir_intrinsic_deref_atomic_swap);
1289 param = param->get_next();
1290 inst = (ir_instruction *) param;
1291 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1292 }
1293
1294 /* Atomic result */
1295 assert(ir->return_deref);
1296 if (glsl_type_is_integer_64(ir->return_deref->type)) {
1297 nir_def_init(&instr->instr, &instr->def,
1298 ir->return_deref->type->vector_elements, 64);
1299 } else {
1300 nir_def_init(&instr->instr, &instr->def,
1301 ir->return_deref->type->vector_elements, 32);
1302 }
1303 nir_builder_instr_insert(&b, &instr->instr);
1304 break;
1305 }
1306 case nir_intrinsic_atomic_counter_read_deref:
1307 case nir_intrinsic_atomic_counter_inc_deref:
1308 case nir_intrinsic_atomic_counter_pre_dec_deref:
1309 case nir_intrinsic_atomic_counter_add_deref:
1310 case nir_intrinsic_atomic_counter_min_deref:
1311 case nir_intrinsic_atomic_counter_max_deref:
1312 case nir_intrinsic_atomic_counter_and_deref:
1313 case nir_intrinsic_atomic_counter_or_deref:
1314 case nir_intrinsic_atomic_counter_xor_deref:
1315 case nir_intrinsic_atomic_counter_exchange_deref:
1316 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1317 /* Set the counter variable dereference. */
1318 exec_node *param = ir->actual_parameters.get_head();
1319 ir_dereference *counter = (ir_dereference *)param;
1320
1321 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->def);
1322 param = param->get_next();
1323
1324 /* Set the intrinsic destination. */
1325 if (ir->return_deref) {
1326 nir_def_init(&instr->instr, &instr->def, 1, 32);
1327 }
1328
1329 /* Set the intrinsic parameters. */
1330 if (!param->is_tail_sentinel()) {
1331 instr->src[1] =
1332 nir_src_for_ssa(evaluate_rvalue((ir_rvalue *)param));
1333 param = param->get_next();
1334 }
1335
1336 if (!param->is_tail_sentinel()) {
1337 instr->src[2] =
1338 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1339 param = param->get_next();
1340 }
1341
1342 nir_builder_instr_insert(&b, &instr->instr);
1343 break;
1344 }
1345 case nir_intrinsic_image_deref_load:
1346 case nir_intrinsic_image_deref_store:
1347 case nir_intrinsic_image_deref_atomic:
1348 case nir_intrinsic_image_deref_atomic_swap:
1349 case nir_intrinsic_image_deref_samples:
1350 case nir_intrinsic_image_deref_size:
1351 case nir_intrinsic_image_deref_sparse_load: {
1352 /* Set the image variable dereference. */
1353 exec_node *param = ir->actual_parameters.get_head();
1354 ir_dereference *image = (ir_dereference *)param;
1355 nir_deref_instr *deref = evaluate_deref(image);
1356 const glsl_type *type = deref->type;
1357
1358 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1359
1360 if (op == nir_intrinsic_image_deref_atomic ||
1361 op == nir_intrinsic_image_deref_atomic_swap) {
1362 nir_intrinsic_set_atomic_op(instr, atomic_op);
1363 }
1364
1365 instr->src[0] = nir_src_for_ssa(&deref->def);
1366 param = param->get_next();
1367 nir_intrinsic_set_image_dim(instr,
1368 (glsl_sampler_dim)type->sampler_dimensionality);
1369 nir_intrinsic_set_image_array(instr, type->sampler_array);
1370
1371 /* Set the intrinsic destination. */
1372 if (ir->return_deref) {
1373 unsigned num_components;
1374 if (op == nir_intrinsic_image_deref_sparse_load) {
1375 const glsl_type *dest_type =
1376 glsl_get_field_type(ir->return_deref->type, "texel");
1377 /* One extra component to hold residency code. */
1378 num_components = dest_type->vector_elements + 1;
1379 } else
1380 num_components = ir->return_deref->type->vector_elements;
1381
1382 nir_def_init(&instr->instr, &instr->def, num_components, 32);
1383 }
1384
1385 if (op == nir_intrinsic_image_deref_size) {
1386 instr->num_components = instr->def.num_components;
1387 } else if (op == nir_intrinsic_image_deref_load ||
1388 op == nir_intrinsic_image_deref_sparse_load) {
1389 instr->num_components = instr->def.num_components;
1390 nir_intrinsic_set_dest_type(instr,
1391 nir_get_nir_type_for_glsl_base_type(type->sampled_type));
1392 } else if (op == nir_intrinsic_image_deref_store) {
1393 instr->num_components = 4;
1394 nir_intrinsic_set_src_type(instr,
1395 nir_get_nir_type_for_glsl_base_type(type->sampled_type));
1396 }
1397
1398 if (op == nir_intrinsic_image_deref_size ||
1399 op == nir_intrinsic_image_deref_samples) {
1400 /* image_deref_size takes an LOD parameter which is always 0
1401 * coming from GLSL.
1402 */
1403 if (op == nir_intrinsic_image_deref_size)
1404 instr->src[1] = nir_src_for_ssa(nir_imm_int(&b, 0));
1405 nir_builder_instr_insert(&b, &instr->instr);
1406 break;
1407 }
1408
1409 /* Set the address argument, extending the coordinate vector to four
1410 * components.
1411 */
1412 nir_def *src_addr =
1413 evaluate_rvalue((ir_rvalue *)param);
1414 nir_def *srcs[4];
1415
1416 for (int i = 0; i < 4; i++) {
1417 if (i < glsl_get_sampler_coordinate_components(type))
1418 srcs[i] = nir_channel(&b, src_addr, i);
1419 else
1420 srcs[i] = nir_undef(&b, 1, 32);
1421 }
1422
1423 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1424 param = param->get_next();
1425
1426 /* Set the sample argument, which is undefined for single-sample
1427 * images.
1428 */
1429 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1430 instr->src[2] =
1431 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1432 param = param->get_next();
1433 } else {
1434 instr->src[2] = nir_src_for_ssa(nir_undef(&b, 1, 32));
1435 }
1436
1437 /* Set the intrinsic parameters. */
1438 if (!param->is_tail_sentinel()) {
1439 instr->src[3] =
1440 nir_src_for_ssa(evaluate_rvalue((ir_rvalue *)param));
1441 param = param->get_next();
1442 } else if (op == nir_intrinsic_image_deref_load ||
1443 op == nir_intrinsic_image_deref_sparse_load) {
1444 instr->src[3] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1445 }
1446
1447 if (!param->is_tail_sentinel()) {
1448 instr->src[4] =
1449 nir_src_for_ssa(evaluate_rvalue((ir_rvalue *)param));
1450 param = param->get_next();
1451 } else if (op == nir_intrinsic_image_deref_store) {
1452 instr->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1453 }
1454
1455 nir_builder_instr_insert(&b, &instr->instr);
1456 break;
1457 }
1458 case nir_intrinsic_barrier: {
1459 /* The nir_intrinsic_barrier follows the general
1460 * semantics of SPIR-V memory barriers, so this and other memory
1461 * barriers use the mapping based on GLSL->SPIR-V from
1462 *
1463 * https://www.khronos.org/registry/OpenGL/extensions/ARB/ARB_gl_spirv.txt
1464 */
1465 if (ir->callee->intrinsic_id == ir_intrinsic_subgroup_barrier) {
1466 nir_barrier(&b, SCOPE_SUBGROUP, SCOPE_SUBGROUP, NIR_MEMORY_ACQ_REL,
1467 nir_var_image | nir_var_mem_ssbo | nir_var_mem_shared | nir_var_mem_global);
1468 break;
1469 }
1470
1471 mesa_scope scope;
1472 unsigned modes;
1473 switch (ir->callee->intrinsic_id) {
1474 case ir_intrinsic_memory_barrier:
1475 scope = SCOPE_DEVICE;
1476 modes = nir_var_image |
1477 nir_var_mem_ssbo |
1478 nir_var_mem_shared |
1479 nir_var_mem_global;
1480 break;
1481 case ir_intrinsic_memory_barrier_buffer:
1482 scope = SCOPE_DEVICE;
1483 modes = nir_var_mem_ssbo |
1484 nir_var_mem_global;
1485 break;
1486 case ir_intrinsic_memory_barrier_image:
1487 scope = SCOPE_DEVICE;
1488 modes = nir_var_image;
1489 break;
1490 case ir_intrinsic_memory_barrier_shared:
1491 /* Both ARB_gl_spirv and glslang lower this to Device scope, so
1492 * follow their lead. Note GL_KHR_vulkan_glsl also does
1493 * something similar.
1494 */
1495 scope = SCOPE_DEVICE;
1496 modes = nir_var_mem_shared;
1497 break;
1498 case ir_intrinsic_group_memory_barrier:
1499 scope = SCOPE_WORKGROUP;
1500 modes = nir_var_image |
1501 nir_var_mem_ssbo |
1502 nir_var_mem_shared |
1503 nir_var_mem_global;
1504 break;
1505 case ir_intrinsic_memory_barrier_atomic_counter:
1506 /* There's no nir_var_atomic_counter, but since atomic counters are lowered
1507 * to SSBOs, we use nir_var_mem_ssbo instead.
1508 */
1509 scope = SCOPE_DEVICE;
1510 modes = nir_var_mem_ssbo;
1511 break;
1512 case ir_intrinsic_subgroup_memory_barrier:
1513 scope = SCOPE_SUBGROUP;
1514 modes = nir_var_image |
1515 nir_var_mem_ssbo |
1516 nir_var_mem_shared |
1517 nir_var_mem_global;
1518 break;
1519 case ir_intrinsic_subgroup_memory_barrier_buffer:
1520 scope = SCOPE_SUBGROUP;
1521 modes = nir_var_mem_ssbo |
1522 nir_var_mem_global;
1523 break;
1524 case ir_intrinsic_subgroup_memory_barrier_shared:
1525 scope = SCOPE_SUBGROUP;
1526 modes = nir_var_mem_shared;
1527 break;
1528 case ir_intrinsic_subgroup_memory_barrier_image:
1529 scope = SCOPE_SUBGROUP;
1530 modes = nir_var_image;
1531 break;
1532 default:
1533 unreachable("invalid intrinsic id for memory barrier");
1534 }
1535
1536 nir_scoped_memory_barrier(&b, scope, NIR_MEMORY_ACQ_REL,
1537 (nir_variable_mode)modes);
1538 break;
1539 }
1540 case nir_intrinsic_store_ssbo: {
1541 exec_node *param = ir->actual_parameters.get_head();
1542 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1543
1544 param = param->get_next();
1545 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1546
1547 param = param->get_next();
1548 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1549
1550 param = param->get_next();
1551 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1552 assert(write_mask);
1553
1554 nir_def *nir_val = evaluate_rvalue(val);
1555 if (glsl_type_is_boolean(val->type))
1556 nir_val = nir_b2i32(&b, nir_val);
1557
1558 instr->src[0] = nir_src_for_ssa(nir_val);
1559 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1560 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1561 intrinsic_set_std430_align(instr, val->type);
1562 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1563 instr->num_components = val->type->vector_elements;
1564
1565 nir_builder_instr_insert(&b, &instr->instr);
1566 break;
1567 }
1568 case nir_intrinsic_load_shared: {
1569 exec_node *param = ir->actual_parameters.get_head();
1570 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1571
1572 nir_intrinsic_set_base(instr, 0);
1573 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1574
1575 const glsl_type *type = ir->return_deref->var->type;
1576 instr->num_components = type->vector_elements;
1577 intrinsic_set_std430_align(instr, type);
1578
1579 /* Setup destination register */
1580 unsigned bit_size = glsl_type_is_boolean(type) ? 32 : glsl_get_bit_size(type);
1581 nir_def_init(&instr->instr, &instr->def, type->vector_elements,
1582 bit_size);
1583
1584 nir_builder_instr_insert(&b, &instr->instr);
1585
1586 /* The value in shared memory is a 32-bit value */
1587 if (glsl_type_is_boolean(type))
1588 ret = nir_b2b1(&b, &instr->def);
1589 break;
1590 }
1591 case nir_intrinsic_store_shared: {
1592 exec_node *param = ir->actual_parameters.get_head();
1593 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1594
1595 param = param->get_next();
1596 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1597
1598 param = param->get_next();
1599 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1600 assert(write_mask);
1601
1602 nir_intrinsic_set_base(instr, 0);
1603 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1604
1605 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1606
1607 nir_def *nir_val = evaluate_rvalue(val);
1608 /* The value in shared memory is a 32-bit value */
1609 if (glsl_type_is_boolean(val->type))
1610 nir_val = nir_b2b32(&b, nir_val);
1611
1612 instr->src[0] = nir_src_for_ssa(nir_val);
1613 instr->num_components = val->type->vector_elements;
1614 intrinsic_set_std430_align(instr, val->type);
1615
1616 nir_builder_instr_insert(&b, &instr->instr);
1617 break;
1618 }
1619 case nir_intrinsic_reduce:
1620 case nir_intrinsic_inclusive_scan:
1621 case nir_intrinsic_exclusive_scan: {
1622 const glsl_type *type = ir->return_deref->type;
1623 nir_def_init(&instr->instr, &instr->def, glsl_get_vector_elements(type),
1624 glsl_get_bit_size(type));
1625 instr->num_components = instr->def.num_components;
1626
1627 exec_node *param = ir->actual_parameters.get_head();
1628 ir_rvalue *value = ((ir_instruction *)param)->as_rvalue();
1629 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1630
1631 param = param->get_next();
1632 if (!param->is_tail_sentinel()) {
1633 ir_constant *size = ((ir_instruction *)param)->as_constant();
1634 assert(size);
1635
1636 nir_intrinsic_set_cluster_size(instr, size->get_uint_component(0));
1637 }
1638
1639 nir_intrinsic_set_reduction_op(instr, get_reduction_op(ir->callee->intrinsic_id, type));
1640
1641 nir_builder_instr_insert(&b, &instr->instr);
1642 break;
1643 }
1644 case nir_intrinsic_shader_clock:
1645 nir_intrinsic_set_memory_scope(instr, SCOPE_SUBGROUP);
1646 FALLTHROUGH;
1647 case nir_intrinsic_begin_invocation_interlock:
1648 case nir_intrinsic_end_invocation_interlock:
1649 case nir_intrinsic_vote_ieq:
1650 case nir_intrinsic_vote_feq:
1651 case nir_intrinsic_vote_any:
1652 case nir_intrinsic_vote_all:
1653 case nir_intrinsic_ballot:
1654 case nir_intrinsic_read_invocation:
1655 case nir_intrinsic_read_first_invocation:
1656 case nir_intrinsic_is_helper_invocation:
1657 case nir_intrinsic_is_sparse_texels_resident:
1658 case nir_intrinsic_elect:
1659 case nir_intrinsic_inverse_ballot:
1660 case nir_intrinsic_ballot_bitfield_extract:
1661 case nir_intrinsic_ballot_bit_count_reduce:
1662 case nir_intrinsic_ballot_bit_count_inclusive:
1663 case nir_intrinsic_ballot_bit_count_exclusive:
1664 case nir_intrinsic_ballot_find_lsb:
1665 case nir_intrinsic_ballot_find_msb:
1666 case nir_intrinsic_shuffle:
1667 case nir_intrinsic_shuffle_xor:
1668 case nir_intrinsic_shuffle_up:
1669 case nir_intrinsic_shuffle_down:
1670 case nir_intrinsic_quad_broadcast:
1671 case nir_intrinsic_quad_swap_horizontal:
1672 case nir_intrinsic_quad_swap_vertical:
1673 case nir_intrinsic_quad_swap_diagonal: {
1674 if (ir->return_deref) {
1675 const glsl_type *type = ir->return_deref->type;
1676 nir_def_init(&instr->instr, &instr->def, glsl_get_vector_elements(type),
1677 glsl_get_bit_size(type));
1678
1679 if (!nir_intrinsic_dest_components(instr))
1680 instr->num_components = instr->def.num_components;
1681 }
1682
1683 unsigned index = 0;
1684 foreach_in_list(ir_rvalue, param, &ir->actual_parameters) {
1685 instr->src[index] = nir_src_for_ssa(evaluate_rvalue(param));
1686
1687 if (!nir_intrinsic_src_components(instr, index))
1688 instr->num_components = nir_src_num_components(instr->src[index]);
1689
1690 index++;
1691 }
1692
1693 nir_builder_instr_insert(&b, &instr->instr);
1694 break;
1695 }
1696 default:
1697 unreachable("not reached");
1698 }
1699
1700 if (ir->return_deref) {
1701 nir_deref_instr *ret_deref = evaluate_deref(ir->return_deref);
1702
1703 if (op == nir_intrinsic_image_deref_sparse_load)
1704 adjust_sparse_variable(ret_deref, ir->return_deref->type, ret);
1705
1706 nir_store_deref(&b, ret_deref, ret, ~0);
1707 }
1708
1709 return;
1710 }
1711
1712 struct hash_entry *entry =
1713 _mesa_hash_table_search(this->overload_table, ir->callee);
1714 assert(entry);
1715 nir_function *callee = (nir_function *) entry->data;
1716
1717 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1718
1719 unsigned i = 0;
1720 nir_deref_instr *ret_deref = NULL;
1721 if (ir->return_deref) {
1722 nir_variable *ret_tmp =
1723 nir_local_variable_create(this->impl, ir->return_deref->type,
1724 "return_tmp");
1725 ret_deref = nir_build_deref_var(&b, ret_tmp);
1726 call->params[i++] = nir_src_for_ssa(&ret_deref->def);
1727 }
1728
1729 foreach_two_lists(formal_node, &ir->callee->parameters,
1730 actual_node, &ir->actual_parameters) {
1731 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1732 ir_variable *sig_param = (ir_variable *) formal_node;
1733
1734 nir_deref_instr *param_deref;
1735 if (sig_param->data.mode == ir_var_function_in &&
1736 glsl_contains_opaque(sig_param->type)) {
1737 param_deref = evaluate_deref(param_rvalue);
1738 } else {
1739 nir_variable *param =
1740 nir_local_variable_create(this->impl, sig_param->type, "param");
1741 param->data.precision = sig_param->data.precision;
1742 param_deref = nir_build_deref_var(&b, param);
1743
1744 if (sig_param->data.mode == ir_var_function_in ||
1745 sig_param->data.mode == ir_var_function_inout) {
1746 if (glsl_type_is_vector_or_scalar(param->type)) {
1747 nir_store_deref(&b, param_deref,
1748 evaluate_rvalue(param_rvalue),
1749 ~0);
1750 } else {
1751 nir_copy_deref(&b, param_deref, evaluate_deref(param_rvalue));
1752 }
1753 }
1754 }
1755
1756 call->params[i] = nir_src_for_ssa(¶m_deref->def);
1757
1758 i++;
1759 }
1760
1761 nir_builder_instr_insert(&b, &call->instr);
1762
1763 /* Copy out params. We must do this after the function call to ensure we
1764 * do not overwrite global variables prematurely.
1765 */
1766 i = ir->return_deref ? 1 : 0;
1767 foreach_two_lists(formal_node, &ir->callee->parameters,
1768 actual_node, &ir->actual_parameters) {
1769 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1770 ir_variable *sig_param = (ir_variable *) formal_node;
1771
1772 if (sig_param->data.mode == ir_var_function_out ||
1773 sig_param->data.mode == ir_var_function_inout) {
1774 if (glsl_type_is_vector_or_scalar(sig_param->type)) {
1775 nir_store_deref(&b, evaluate_deref(param_rvalue),
1776 nir_load_deref(&b, nir_src_as_deref(call->params[i])),
1777 ~0);
1778 } else {
1779 nir_copy_deref(&b, evaluate_deref(param_rvalue),
1780 nir_src_as_deref(call->params[i]));
1781 }
1782 }
1783
1784 i++;
1785 }
1786
1787
1788 if (ir->return_deref) {
1789 if (glsl_type_is_vector_or_scalar(ir->return_deref->type)) {
1790 nir_store_deref(&b, evaluate_deref(ir->return_deref),
1791 nir_load_deref(&b, ret_deref), ~0);
1792 } else {
1793 nir_copy_deref(&b, evaluate_deref(ir->return_deref), ret_deref);
1794 }
1795 }
1796 }
1797
1798 void
visit(ir_assignment * ir)1799 nir_visitor::visit(ir_assignment *ir)
1800 {
1801 unsigned num_components = ir->lhs->type->vector_elements;
1802 unsigned write_mask = ir->write_mask;
1803
1804 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1805 ir->lhs->variable_referenced()->data.precise;
1806
1807 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1808 (write_mask == BITFIELD_MASK(num_components) || write_mask == 0)) {
1809 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1810 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1811 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1812 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1813
1814 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1815 rhs_qualifiers);
1816 return;
1817 }
1818
1819 ir_texture *tex = ir->rhs->as_texture();
1820 bool is_sparse = tex && tex->is_sparse;
1821
1822 if (!is_sparse)
1823 assert(glsl_type_is_scalar(ir->rhs->type) || glsl_type_is_vector(ir->rhs->type));
1824
1825 ir->lhs->accept(this);
1826 nir_deref_instr *lhs_deref = this->deref;
1827 nir_def *src = evaluate_rvalue(ir->rhs);
1828
1829 if (is_sparse) {
1830 adjust_sparse_variable(lhs_deref, tex->type, src);
1831
1832 /* correct component and mask because they are 0 for struct */
1833 num_components = src->num_components;
1834 write_mask = BITFIELD_MASK(num_components);
1835 }
1836
1837 if (write_mask != BITFIELD_MASK(num_components) && write_mask != 0) {
1838 /* GLSL IR will give us the input to the write-masked assignment in a
1839 * single packed vector. So, for example, if the writemask is xzw, then
1840 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1841 * from the load.
1842 */
1843 unsigned swiz[4];
1844 unsigned component = 0;
1845 for (unsigned i = 0; i < 4; i++) {
1846 swiz[i] = write_mask & (1 << i) ? component++ : 0;
1847 }
1848 src = nir_swizzle(&b, src, swiz, num_components);
1849 }
1850
1851 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1852
1853 nir_store_deref_with_access(&b, lhs_deref, src, write_mask,
1854 qualifiers);
1855 }
1856
1857 /*
1858 * Given an instruction, returns a pointer to its destination or NULL if there
1859 * is no destination.
1860 *
1861 * Note that this only handles instructions we generate at this level.
1862 */
1863 static nir_def *
get_instr_def(nir_instr * instr)1864 get_instr_def(nir_instr *instr)
1865 {
1866 nir_alu_instr *alu_instr;
1867 nir_intrinsic_instr *intrinsic_instr;
1868 nir_tex_instr *tex_instr;
1869
1870 switch (instr->type) {
1871 case nir_instr_type_alu:
1872 alu_instr = nir_instr_as_alu(instr);
1873 return &alu_instr->def;
1874
1875 case nir_instr_type_intrinsic:
1876 intrinsic_instr = nir_instr_as_intrinsic(instr);
1877 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1878 return &intrinsic_instr->def;
1879 else
1880 return NULL;
1881
1882 case nir_instr_type_tex:
1883 tex_instr = nir_instr_as_tex(instr);
1884 return &tex_instr->def;
1885
1886 default:
1887 unreachable("not reached");
1888 }
1889
1890 return NULL;
1891 }
1892
1893 void
add_instr(nir_instr * instr,unsigned num_components,unsigned bit_size)1894 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1895 unsigned bit_size)
1896 {
1897 nir_def *def = get_instr_def(instr);
1898
1899 if (def)
1900 nir_def_init(instr, def, num_components, bit_size);
1901
1902 nir_builder_instr_insert(&b, instr);
1903
1904 if (def)
1905 this->result = def;
1906 }
1907
1908 nir_def *
evaluate_rvalue(ir_rvalue * ir)1909 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1910 {
1911 ir->accept(this);
1912 if (ir->as_dereference() || ir->as_constant()) {
1913 /*
1914 * A dereference is being used on the right hand side, which means we
1915 * must emit a variable load.
1916 */
1917
1918 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1919 this->result = nir_load_deref_with_access(&b, this->deref, access);
1920 }
1921
1922 return this->result;
1923 }
1924
1925 static bool
type_is_float(glsl_base_type type)1926 type_is_float(glsl_base_type type)
1927 {
1928 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1929 type == GLSL_TYPE_FLOAT16;
1930 }
1931
1932 static bool
type_is_signed(glsl_base_type type)1933 type_is_signed(glsl_base_type type)
1934 {
1935 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1936 type == GLSL_TYPE_INT16;
1937 }
1938
1939 void
visit(ir_expression * ir)1940 nir_visitor::visit(ir_expression *ir)
1941 {
1942 /* Some special cases */
1943 switch (ir->operation) {
1944 case ir_unop_interpolate_at_centroid:
1945 case ir_binop_interpolate_at_offset:
1946 case ir_binop_interpolate_at_sample: {
1947 ir_dereference *deref = ir->operands[0]->as_dereference();
1948 ir_swizzle *swizzle = NULL;
1949 ir_expression *precision_op = NULL;
1950 if (!deref) {
1951 precision_op = ir->operands[0]->as_expression();
1952 if (precision_op) {
1953 /* For some builtins precision is lowered to mediump for certain
1954 * parameters that ignore precision. For example for Interpolation
1955 * and Bitfield functions.
1956 */
1957 assert(precision_op->operation == ir_unop_f2fmp);
1958 deref = precision_op->operands[0]->as_dereference();
1959 }
1960
1961 if (!deref) {
1962 swizzle = ir->operands[0]->as_swizzle();
1963 assert(swizzle);
1964 deref = swizzle->val->as_dereference();
1965 }
1966
1967 assert(deref);
1968 }
1969
1970 deref->accept(this);
1971
1972 assert(nir_deref_mode_is(this->deref, nir_var_shader_in));
1973 nir_intrinsic_op op;
1974 switch (ir->operation) {
1975 case ir_unop_interpolate_at_centroid:
1976 op = nir_intrinsic_interp_deref_at_centroid;
1977 break;
1978 case ir_binop_interpolate_at_offset:
1979 op = nir_intrinsic_interp_deref_at_offset;
1980 break;
1981 case ir_binop_interpolate_at_sample:
1982 op = nir_intrinsic_interp_deref_at_sample;
1983 break;
1984 default:
1985 unreachable("Invalid interpolation intrinsic");
1986 }
1987
1988 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1989 intrin->num_components = deref->type->vector_elements;
1990 intrin->src[0] = nir_src_for_ssa(&this->deref->def);
1991
1992 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1993 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1994 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1995
1996 unsigned bit_size = glsl_get_bit_size(deref->type);
1997 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1998
1999 if (swizzle) {
2000 unsigned swiz[4] = {
2001 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
2002 };
2003
2004 result = nir_swizzle(&b, result, swiz,
2005 swizzle->type->vector_elements);
2006 }
2007
2008 if (precision_op) {
2009 result = nir_build_alu(&b, nir_op_f2fmp, result, NULL, NULL, NULL);
2010 }
2011
2012 return;
2013 }
2014
2015 case ir_unop_implicitly_sized_array_length:
2016 case ir_unop_ssbo_unsized_array_length: {
2017 nir_intrinsic_instr *intrin;
2018 if (ir->operation == ir_unop_ssbo_unsized_array_length) {
2019 intrin =
2020 nir_intrinsic_instr_create(b.shader,
2021 nir_intrinsic_deref_buffer_array_length);
2022 } else {
2023 intrin =
2024 nir_intrinsic_instr_create(b.shader,
2025 nir_intrinsic_deref_implicit_array_length);
2026 }
2027
2028 ir_dereference *deref = ir->operands[0]->as_dereference();
2029 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->def);
2030
2031 add_instr(&intrin->instr, 1, 32);
2032 return;
2033 }
2034
2035 default:
2036 break;
2037 }
2038
2039 nir_def *srcs[4];
2040 for (unsigned i = 0; i < ir->num_operands; i++)
2041 srcs[i] = evaluate_rvalue(ir->operands[i]);
2042
2043 glsl_base_type types[4];
2044 for (unsigned i = 0; i < ir->num_operands; i++)
2045 types[i] = ir->operands[i]->type->base_type;
2046
2047 glsl_base_type out_type = ir->type->base_type;
2048
2049 switch (ir->operation) {
2050 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
2051 case ir_unop_logic_not:
2052 result = nir_inot(&b, srcs[0]);
2053 break;
2054 case ir_unop_neg:
2055 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
2056 : nir_ineg(&b, srcs[0]);
2057 break;
2058 case ir_unop_abs:
2059 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
2060 : nir_iabs(&b, srcs[0]);
2061 break;
2062 case ir_unop_clz:
2063 result = nir_uclz(&b, srcs[0]);
2064 break;
2065 case ir_unop_saturate:
2066 assert(type_is_float(types[0]));
2067 result = nir_fsat(&b, srcs[0]);
2068 break;
2069 case ir_unop_sign:
2070 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
2071 : nir_isign(&b, srcs[0]);
2072 break;
2073 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
2074 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
2075 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
2076 case ir_unop_exp: result = nir_fexp2(&b, nir_fmul_imm(&b, srcs[0], M_LOG2E)); break;
2077 case ir_unop_log: result = nir_fmul_imm(&b, nir_flog2(&b, srcs[0]), 1.0 / M_LOG2E); break;
2078 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
2079 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
2080 case ir_unop_i2f:
2081 case ir_unop_u2f:
2082 case ir_unop_b2f:
2083 case ir_unop_f2i:
2084 case ir_unop_f2u:
2085 case ir_unop_f2b:
2086 case ir_unop_i2b:
2087 case ir_unop_b2i:
2088 case ir_unop_b2i64:
2089 case ir_unop_d2f:
2090 case ir_unop_f2d:
2091 case ir_unop_f162u:
2092 case ir_unop_u2f16:
2093 case ir_unop_f162i:
2094 case ir_unop_i2f16:
2095 case ir_unop_f162f:
2096 case ir_unop_f2f16:
2097 case ir_unop_f162b:
2098 case ir_unop_b2f16:
2099 case ir_unop_f162d:
2100 case ir_unop_d2f16:
2101 case ir_unop_f162u64:
2102 case ir_unop_u642f16:
2103 case ir_unop_f162i64:
2104 case ir_unop_i642f16:
2105 case ir_unop_i2i:
2106 case ir_unop_u2u:
2107 case ir_unop_d2i:
2108 case ir_unop_d2u:
2109 case ir_unop_d2b:
2110 case ir_unop_i2d:
2111 case ir_unop_u2d:
2112 case ir_unop_i642i:
2113 case ir_unop_i642u:
2114 case ir_unop_i642f:
2115 case ir_unop_i642b:
2116 case ir_unop_i642d:
2117 case ir_unop_u642i:
2118 case ir_unop_u642u:
2119 case ir_unop_u642f:
2120 case ir_unop_u642d:
2121 case ir_unop_i2i64:
2122 case ir_unop_u2i64:
2123 case ir_unop_f2i64:
2124 case ir_unop_d2i64:
2125 case ir_unop_i2u64:
2126 case ir_unop_u2u64:
2127 case ir_unop_f2u64:
2128 case ir_unop_d2u64:
2129 case ir_unop_i2u:
2130 case ir_unop_u2i:
2131 case ir_unop_i642u64:
2132 case ir_unop_u642i64: {
2133 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
2134 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
2135 result = nir_type_convert(&b, srcs[0], src_type, dst_type,
2136 nir_rounding_mode_undef);
2137 /* b2i and b2f don't have fixed bit-size versions so the builder will
2138 * just assume 32 and we have to fix it up here.
2139 */
2140 result->bit_size = nir_alu_type_get_type_size(dst_type);
2141 break;
2142 }
2143
2144 case ir_unop_f2fmp: {
2145 result = nir_build_alu(&b, nir_op_f2fmp, srcs[0], NULL, NULL, NULL);
2146 break;
2147 }
2148
2149 case ir_unop_i2imp: {
2150 result = nir_build_alu(&b, nir_op_i2imp, srcs[0], NULL, NULL, NULL);
2151 break;
2152 }
2153
2154 case ir_unop_u2ump: {
2155 result = nir_build_alu(&b, nir_op_i2imp, srcs[0], NULL, NULL, NULL);
2156 break;
2157 }
2158
2159 case ir_unop_bitcast_i2f:
2160 case ir_unop_bitcast_f2i:
2161 case ir_unop_bitcast_u2f:
2162 case ir_unop_bitcast_f2u:
2163 case ir_unop_bitcast_i642d:
2164 case ir_unop_bitcast_d2i64:
2165 case ir_unop_bitcast_u642d:
2166 case ir_unop_bitcast_d2u64:
2167 case ir_unop_subroutine_to_int:
2168 /* no-op */
2169 result = nir_mov(&b, srcs[0]);
2170 break;
2171 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2172 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2173 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2174 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2175 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2176 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2177 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2178 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2179 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2180 case ir_unop_dFdx: result = nir_ddx(&b, srcs[0]); break;
2181 case ir_unop_dFdy: result = nir_ddy(&b, srcs[0]); break;
2182 case ir_unop_dFdx_fine: result = nir_ddx_fine(&b, srcs[0]); break;
2183 case ir_unop_dFdy_fine: result = nir_ddy_fine(&b, srcs[0]); break;
2184 case ir_unop_dFdx_coarse: result = nir_ddx_coarse(&b, srcs[0]); break;
2185 case ir_unop_dFdy_coarse: result = nir_ddy_coarse(&b, srcs[0]); break;
2186 case ir_unop_pack_snorm_2x16:
2187 result = nir_pack_snorm_2x16(&b, srcs[0]);
2188 break;
2189 case ir_unop_pack_snorm_4x8:
2190 result = nir_pack_snorm_4x8(&b, srcs[0]);
2191 break;
2192 case ir_unop_pack_unorm_2x16:
2193 result = nir_pack_unorm_2x16(&b, srcs[0]);
2194 break;
2195 case ir_unop_pack_unorm_4x8:
2196 result = nir_pack_unorm_4x8(&b, srcs[0]);
2197 break;
2198 case ir_unop_pack_half_2x16:
2199 result = nir_pack_half_2x16(&b, srcs[0]);
2200 break;
2201 case ir_unop_unpack_snorm_2x16:
2202 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2203 break;
2204 case ir_unop_unpack_snorm_4x8:
2205 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2206 break;
2207 case ir_unop_unpack_unorm_2x16:
2208 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2209 break;
2210 case ir_unop_unpack_unorm_4x8:
2211 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2212 break;
2213 case ir_unop_unpack_half_2x16:
2214 result = nir_unpack_half_2x16(&b, srcs[0]);
2215 break;
2216 case ir_unop_pack_sampler_2x32:
2217 case ir_unop_pack_image_2x32:
2218 case ir_unop_pack_double_2x32:
2219 case ir_unop_pack_int_2x32:
2220 case ir_unop_pack_uint_2x32:
2221 result = nir_pack_64_2x32(&b, srcs[0]);
2222 break;
2223 case ir_unop_unpack_sampler_2x32:
2224 case ir_unop_unpack_image_2x32:
2225 case ir_unop_unpack_double_2x32:
2226 case ir_unop_unpack_int_2x32:
2227 case ir_unop_unpack_uint_2x32:
2228 result = nir_unpack_64_2x32(&b, srcs[0]);
2229 break;
2230 case ir_unop_bitfield_reverse:
2231 result = nir_bitfield_reverse(&b, srcs[0]);
2232 break;
2233 case ir_unop_bit_count:
2234 result = nir_bit_count(&b, srcs[0]);
2235 break;
2236 case ir_unop_find_msb:
2237 switch (types[0]) {
2238 case GLSL_TYPE_UINT:
2239 result = nir_ufind_msb(&b, srcs[0]);
2240 break;
2241 case GLSL_TYPE_INT:
2242 result = nir_ifind_msb(&b, srcs[0]);
2243 break;
2244 default:
2245 unreachable("Invalid type for findMSB()");
2246 }
2247 break;
2248 case ir_unop_find_lsb:
2249 result = nir_find_lsb(&b, srcs[0]);
2250 break;
2251
2252 case ir_unop_get_buffer_size: {
2253 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2254 this->shader,
2255 nir_intrinsic_get_ssbo_size);
2256 load->num_components = ir->type->vector_elements;
2257 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2258 unsigned bit_size = glsl_get_bit_size(ir->type);
2259 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2260 return;
2261 }
2262
2263 case ir_unop_atan:
2264 result = nir_atan(&b, srcs[0]);
2265 break;
2266
2267 case ir_binop_add:
2268 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2269 : nir_iadd(&b, srcs[0], srcs[1]);
2270 break;
2271 case ir_binop_add_sat:
2272 result = type_is_signed(out_type) ? nir_iadd_sat(&b, srcs[0], srcs[1])
2273 : nir_uadd_sat(&b, srcs[0], srcs[1]);
2274 break;
2275 case ir_binop_sub:
2276 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2277 : nir_isub(&b, srcs[0], srcs[1]);
2278 break;
2279 case ir_binop_sub_sat:
2280 result = type_is_signed(out_type) ? nir_isub_sat(&b, srcs[0], srcs[1])
2281 : nir_usub_sat(&b, srcs[0], srcs[1]);
2282 break;
2283 case ir_binop_abs_sub:
2284 /* out_type is always unsigned for ir_binop_abs_sub, so we have to key
2285 * on the type of the sources.
2286 */
2287 result = type_is_signed(types[0]) ? nir_uabs_isub(&b, srcs[0], srcs[1])
2288 : nir_uabs_usub(&b, srcs[0], srcs[1]);
2289 break;
2290 case ir_binop_avg:
2291 result = type_is_signed(out_type) ? nir_ihadd(&b, srcs[0], srcs[1])
2292 : nir_uhadd(&b, srcs[0], srcs[1]);
2293 break;
2294 case ir_binop_avg_round:
2295 result = type_is_signed(out_type) ? nir_irhadd(&b, srcs[0], srcs[1])
2296 : nir_urhadd(&b, srcs[0], srcs[1]);
2297 break;
2298 case ir_binop_mul_32x16:
2299 result = type_is_signed(out_type) ? nir_imul_32x16(&b, srcs[0], srcs[1])
2300 : nir_umul_32x16(&b, srcs[0], srcs[1]);
2301 break;
2302 case ir_binop_mul:
2303 if (type_is_float(out_type))
2304 result = nir_fmul(&b, srcs[0], srcs[1]);
2305 else if (out_type == GLSL_TYPE_INT64 &&
2306 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2307 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2308 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2309 else if (out_type == GLSL_TYPE_UINT64 &&
2310 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2311 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2312 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2313 else
2314 result = nir_imul(&b, srcs[0], srcs[1]);
2315 break;
2316 case ir_binop_div:
2317 if (type_is_float(out_type))
2318 result = nir_fdiv(&b, srcs[0], srcs[1]);
2319 else if (type_is_signed(out_type))
2320 result = nir_idiv(&b, srcs[0], srcs[1]);
2321 else
2322 result = nir_udiv(&b, srcs[0], srcs[1]);
2323 break;
2324 case ir_binop_mod:
2325 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2326 : nir_umod(&b, srcs[0], srcs[1]);
2327 break;
2328 case ir_binop_min:
2329 if (type_is_float(out_type))
2330 result = nir_fmin(&b, srcs[0], srcs[1]);
2331 else if (type_is_signed(out_type))
2332 result = nir_imin(&b, srcs[0], srcs[1]);
2333 else
2334 result = nir_umin(&b, srcs[0], srcs[1]);
2335 break;
2336 case ir_binop_max:
2337 if (type_is_float(out_type))
2338 result = nir_fmax(&b, srcs[0], srcs[1]);
2339 else if (type_is_signed(out_type))
2340 result = nir_imax(&b, srcs[0], srcs[1]);
2341 else
2342 result = nir_umax(&b, srcs[0], srcs[1]);
2343 break;
2344 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2345 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2346 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2347 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2348 case ir_binop_logic_and:
2349 result = nir_iand(&b, srcs[0], srcs[1]);
2350 break;
2351 case ir_binop_logic_or:
2352 result = nir_ior(&b, srcs[0], srcs[1]);
2353 break;
2354 case ir_binop_logic_xor:
2355 result = nir_ixor(&b, srcs[0], srcs[1]);
2356 break;
2357 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], nir_u2u32(&b, srcs[1])); break;
2358 case ir_binop_rshift:
2359 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], nir_u2u32(&b, srcs[1]))
2360 : nir_ushr(&b, srcs[0], nir_u2u32(&b, srcs[1]));
2361 break;
2362 case ir_binop_imul_high:
2363 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2364 : nir_umul_high(&b, srcs[0], srcs[1]);
2365 break;
2366 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2367 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2368 case ir_binop_less:
2369 if (type_is_float(types[0]))
2370 result = nir_flt(&b, srcs[0], srcs[1]);
2371 else if (type_is_signed(types[0]))
2372 result = nir_ilt(&b, srcs[0], srcs[1]);
2373 else
2374 result = nir_ult(&b, srcs[0], srcs[1]);
2375 break;
2376 case ir_binop_gequal:
2377 if (type_is_float(types[0]))
2378 result = nir_fge(&b, srcs[0], srcs[1]);
2379 else if (type_is_signed(types[0]))
2380 result = nir_ige(&b, srcs[0], srcs[1]);
2381 else
2382 result = nir_uge(&b, srcs[0], srcs[1]);
2383 break;
2384 case ir_binop_equal:
2385 if (type_is_float(types[0]))
2386 result = nir_feq(&b, srcs[0], srcs[1]);
2387 else
2388 result = nir_ieq(&b, srcs[0], srcs[1]);
2389 break;
2390 case ir_binop_nequal:
2391 if (type_is_float(types[0]))
2392 result = nir_fneu(&b, srcs[0], srcs[1]);
2393 else
2394 result = nir_ine(&b, srcs[0], srcs[1]);
2395 break;
2396 case ir_binop_all_equal:
2397 if (type_is_float(types[0])) {
2398 switch (ir->operands[0]->type->vector_elements) {
2399 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2400 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2401 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2402 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2403 default:
2404 unreachable("not reached");
2405 }
2406 } else {
2407 switch (ir->operands[0]->type->vector_elements) {
2408 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2409 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2410 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2411 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2412 default:
2413 unreachable("not reached");
2414 }
2415 }
2416 break;
2417 case ir_binop_any_nequal:
2418 if (type_is_float(types[0])) {
2419 switch (ir->operands[0]->type->vector_elements) {
2420 case 1: result = nir_fneu(&b, srcs[0], srcs[1]); break;
2421 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2422 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2423 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2424 default:
2425 unreachable("not reached");
2426 }
2427 } else {
2428 switch (ir->operands[0]->type->vector_elements) {
2429 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2430 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2431 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2432 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2433 default:
2434 unreachable("not reached");
2435 }
2436 }
2437 break;
2438 case ir_binop_dot:
2439 result = nir_fdot(&b, srcs[0], srcs[1]);
2440 break;
2441
2442 case ir_binop_vector_extract:
2443 result = nir_vector_extract(&b, srcs[0], srcs[1]);
2444 break;
2445 case ir_triop_vector_insert:
2446 result = nir_vector_insert(&b, srcs[0], srcs[1], srcs[2]);
2447 break;
2448
2449 case ir_binop_atan2:
2450 result = nir_atan2(&b, srcs[0], srcs[1]);
2451 break;
2452
2453 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2454 case ir_triop_fma:
2455 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2456 break;
2457 case ir_triop_lrp:
2458 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2459 break;
2460 case ir_triop_csel:
2461 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2462 break;
2463 case ir_triop_bitfield_extract:
2464 result = glsl_type_is_int_16_32(ir->type) ?
2465 nir_ibitfield_extract(&b, nir_i2i32(&b, srcs[0]), nir_i2i32(&b, srcs[1]), nir_i2i32(&b, srcs[2])) :
2466 nir_ubitfield_extract(&b, nir_u2u32(&b, srcs[0]), nir_i2i32(&b, srcs[1]), nir_i2i32(&b, srcs[2]));
2467
2468 if (ir->type->base_type == GLSL_TYPE_INT16) {
2469 result = nir_i2i16(&b, result);
2470 } else if (ir->type->base_type == GLSL_TYPE_UINT16) {
2471 result = nir_u2u16(&b, result);
2472 }
2473
2474 break;
2475 case ir_quadop_bitfield_insert:
2476 result = nir_bitfield_insert(&b,
2477 nir_u2u32(&b, srcs[0]), nir_u2u32(&b, srcs[1]),
2478 nir_i2i32(&b, srcs[2]), nir_i2i32(&b, srcs[3]));
2479
2480 if (ir->type->base_type == GLSL_TYPE_INT16) {
2481 result = nir_i2i16(&b, result);
2482 } else if (ir->type->base_type == GLSL_TYPE_UINT16) {
2483 result = nir_u2u16(&b, result);
2484 }
2485
2486 break;
2487 case ir_quadop_vector:
2488 result = nir_vec(&b, srcs, ir->type->vector_elements);
2489 break;
2490
2491 default:
2492 unreachable("not reached");
2493 }
2494
2495 /* The bit-size of the NIR SSA value must match the bit-size of the
2496 * original GLSL IR expression.
2497 */
2498 assert(result->bit_size == glsl_base_type_get_bit_size(ir->type->base_type));
2499 }
2500
2501 void
visit(ir_swizzle * ir)2502 nir_visitor::visit(ir_swizzle *ir)
2503 {
2504 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2505 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2506 ir->type->vector_elements);
2507 }
2508
2509 void
visit(ir_texture * ir)2510 nir_visitor::visit(ir_texture *ir)
2511 {
2512 unsigned num_srcs;
2513 nir_texop op;
2514 switch (ir->op) {
2515 case ir_tex:
2516 op = nir_texop_tex;
2517 num_srcs = 1; /* coordinate */
2518 break;
2519
2520 case ir_txb:
2521 case ir_txl:
2522 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2523 num_srcs = 2; /* coordinate, bias/lod */
2524 break;
2525
2526 case ir_txd:
2527 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2528 num_srcs = 3;
2529 break;
2530
2531 case ir_txf:
2532 op = nir_texop_txf;
2533 if (ir->lod_info.lod != NULL)
2534 num_srcs = 2; /* coordinate, lod */
2535 else
2536 num_srcs = 1; /* coordinate */
2537 break;
2538
2539 case ir_txf_ms:
2540 op = nir_texop_txf_ms;
2541 num_srcs = 2; /* coordinate, sample_index */
2542 break;
2543
2544 case ir_txs:
2545 op = nir_texop_txs;
2546 if (ir->lod_info.lod != NULL)
2547 num_srcs = 1; /* lod */
2548 else
2549 num_srcs = 0;
2550 break;
2551
2552 case ir_lod:
2553 op = nir_texop_lod;
2554 num_srcs = 1; /* coordinate */
2555 break;
2556
2557 case ir_tg4:
2558 op = nir_texop_tg4;
2559 num_srcs = 1; /* coordinate */
2560 break;
2561
2562 case ir_query_levels:
2563 op = nir_texop_query_levels;
2564 num_srcs = 0;
2565 break;
2566
2567 case ir_texture_samples:
2568 op = nir_texop_texture_samples;
2569 num_srcs = 0;
2570 break;
2571
2572 case ir_samples_identical:
2573 op = nir_texop_samples_identical;
2574 num_srcs = 1; /* coordinate */
2575 break;
2576
2577 default:
2578 unreachable("not reached");
2579 }
2580
2581 if (ir->projector != NULL)
2582 num_srcs++;
2583 if (ir->shadow_comparator != NULL)
2584 num_srcs++;
2585 /* offsets are constants we store inside nir_tex_intrs.offsets */
2586 if (ir->offset != NULL && !glsl_type_is_array(ir->offset->type))
2587 num_srcs++;
2588 if (ir->clamp != NULL)
2589 num_srcs++;
2590
2591 /* Add one for the texture deref */
2592 num_srcs += 2;
2593
2594 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2595
2596 instr->op = op;
2597 instr->sampler_dim =
2598 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2599 instr->is_array = ir->sampler->type->sampler_array;
2600 instr->is_shadow = ir->sampler->type->sampler_shadow;
2601
2602 const glsl_type *dest_type
2603 = ir->is_sparse ? glsl_get_field_type(ir->type, "texel") : ir->type;
2604 assert(dest_type != &glsl_type_builtin_error);
2605 if (instr->is_shadow)
2606 instr->is_new_style_shadow = (dest_type->vector_elements == 1);
2607 instr->dest_type = nir_get_nir_type_for_glsl_type(dest_type);
2608 instr->is_sparse = ir->is_sparse;
2609
2610 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2611 nir_def *tex_intrin = nir_deref_texture_src(&b, 32, &sampler_deref->def);
2612
2613 instr->src[0] = nir_tex_src_for_ssa(nir_tex_src_sampler_deref_intrinsic,
2614 tex_intrin);
2615 instr->src[1] = nir_tex_src_for_ssa(nir_tex_src_texture_deref_intrinsic,
2616 tex_intrin);
2617
2618 unsigned src_number = 2;
2619
2620 if (ir->coordinate != NULL) {
2621 instr->coord_components = ir->coordinate->type->vector_elements;
2622 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_coord,
2623 evaluate_rvalue(ir->coordinate));
2624 src_number++;
2625 }
2626
2627 if (ir->projector != NULL) {
2628 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_projector,
2629 evaluate_rvalue(ir->projector));
2630 src_number++;
2631 }
2632
2633 if (ir->shadow_comparator != NULL) {
2634 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_comparator,
2635 evaluate_rvalue(ir->shadow_comparator));
2636 src_number++;
2637 }
2638
2639 if (ir->offset != NULL) {
2640 if (glsl_type_is_array(ir->offset->type)) {
2641 const int size = MIN2(glsl_array_size(ir->offset->type), 4);
2642 for (int i = 0; i < size; i++) {
2643 const ir_constant *c =
2644 ir->offset->as_constant()->get_array_element(i);
2645
2646 for (unsigned j = 0; j < 2; ++j) {
2647 int val = c->get_int_component(j);
2648 instr->tg4_offsets[i][j] = val;
2649 }
2650 }
2651 } else {
2652 assert(glsl_type_is_vector(ir->offset->type) || glsl_type_is_scalar(ir->offset->type));
2653
2654 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_offset,
2655 evaluate_rvalue(ir->offset));
2656 src_number++;
2657 }
2658 }
2659
2660 if (ir->clamp) {
2661 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_min_lod,
2662 evaluate_rvalue(ir->clamp));
2663 src_number++;
2664 }
2665
2666 switch (ir->op) {
2667 case ir_txb:
2668 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_bias,
2669 evaluate_rvalue(ir->lod_info.bias));
2670 src_number++;
2671 break;
2672
2673 case ir_txl:
2674 case ir_txf:
2675 case ir_txs:
2676 if (ir->lod_info.lod != NULL) {
2677 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_lod,
2678 evaluate_rvalue(ir->lod_info.lod));
2679 src_number++;
2680 }
2681 break;
2682
2683 case ir_txd:
2684 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_ddx,
2685 evaluate_rvalue(ir->lod_info.grad.dPdx));
2686 src_number++;
2687 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_ddy,
2688 evaluate_rvalue(ir->lod_info.grad.dPdy));
2689 src_number++;
2690 break;
2691
2692 case ir_txf_ms:
2693 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_ms_index,
2694 evaluate_rvalue(ir->lod_info.sample_index));
2695 src_number++;
2696 break;
2697
2698 case ir_tg4:
2699 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2700 break;
2701
2702 default:
2703 break;
2704 }
2705
2706 assert(src_number == num_srcs);
2707
2708 unsigned bit_size = glsl_get_bit_size(dest_type);
2709 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2710 }
2711
2712 void
visit(ir_constant * ir)2713 nir_visitor::visit(ir_constant *ir)
2714 {
2715 /*
2716 * We don't know if this variable is an array or struct that gets
2717 * dereferenced, so do the safe thing an make it a variable with a
2718 * constant initializer and return a dereference.
2719 */
2720
2721 nir_variable *var =
2722 nir_local_variable_create(this->impl, ir->type, "const_temp");
2723 var->data.read_only = true;
2724 var->constant_initializer = constant_copy(ir, var);
2725
2726 this->deref = nir_build_deref_var(&b, var);
2727 }
2728
2729 void
visit(ir_dereference_variable * ir)2730 nir_visitor::visit(ir_dereference_variable *ir)
2731 {
2732 if (ir->variable_referenced()->data.mode == ir_var_function_out ||
2733 ir->variable_referenced()->data.mode == ir_var_function_inout ||
2734 ir->variable_referenced()->data.mode == ir_var_function_in) {
2735 unsigned i = (sig->return_type != &glsl_type_builtin_void) ? 1 : 0;
2736
2737 foreach_in_list(ir_variable, param, &sig->parameters) {
2738 if (param == ir->variable_referenced()) {
2739 break;
2740 }
2741 i++;
2742 }
2743
2744 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2745 nir_var_function_temp, ir->type, 0);
2746 return;
2747 }
2748
2749 struct hash_entry *entry =
2750 _mesa_hash_table_search(this->var_table, ir->var);
2751 assert(entry);
2752 nir_variable *var = (nir_variable *) entry->data;
2753
2754 this->deref = nir_build_deref_var(&b, var);
2755 }
2756
2757 void
visit(ir_dereference_record * ir)2758 nir_visitor::visit(ir_dereference_record *ir)
2759 {
2760 ir->record->accept(this);
2761
2762 int field_index = ir->field_idx;
2763 assert(field_index >= 0);
2764
2765 /* sparse texture variable is a struct for ir_variable, but it has been
2766 * converted to a vector for nir_variable.
2767 */
2768 if (this->deref->deref_type == nir_deref_type_var &&
2769 _mesa_set_search(this->sparse_variable_set, this->deref->var)) {
2770 nir_def *load = nir_load_deref(&b, this->deref);
2771 assert(load->num_components >= 2);
2772
2773 nir_def *ssa;
2774 const glsl_type *type = ir->record->type;
2775 if (field_index == glsl_get_field_index(type, "code")) {
2776 /* last channel holds residency code */
2777 ssa = nir_channel(&b, load, load->num_components - 1);
2778 } else {
2779 assert(field_index == glsl_get_field_index(type, "texel"));
2780
2781 unsigned mask = BITFIELD_MASK(load->num_components - 1);
2782 ssa = nir_channels(&b, load, mask);
2783 }
2784
2785 /* still need to create a deref for return */
2786 nir_variable *tmp =
2787 nir_local_variable_create(this->impl, ir->type, "deref_tmp");
2788 this->deref = nir_build_deref_var(&b, tmp);
2789 nir_store_deref(&b, this->deref, ssa, ~0);
2790 } else
2791 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2792 }
2793
2794 void
visit(ir_dereference_array * ir)2795 nir_visitor::visit(ir_dereference_array *ir)
2796 {
2797 nir_def *index = evaluate_rvalue(ir->array_index);
2798
2799 ir->array->accept(this);
2800
2801 this->deref = nir_build_deref_array(&b, this->deref, index);
2802 }
2803
2804 void
visit(ir_barrier *)2805 nir_visitor::visit(ir_barrier *)
2806 {
2807 if (shader->info.stage == MESA_SHADER_COMPUTE) {
2808 nir_barrier(&b, SCOPE_WORKGROUP, SCOPE_WORKGROUP,
2809 NIR_MEMORY_ACQ_REL, nir_var_mem_shared);
2810 } else if (shader->info.stage == MESA_SHADER_TESS_CTRL) {
2811 nir_barrier(&b, SCOPE_WORKGROUP, SCOPE_WORKGROUP,
2812 NIR_MEMORY_ACQ_REL, nir_var_shader_out);
2813 }
2814 }
2815
2816 nir_shader *
glsl_float64_funcs_to_nir(struct gl_context * ctx,const nir_shader_compiler_options * options)2817 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2818 const nir_shader_compiler_options *options)
2819 {
2820 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2821 * matter because we're not optimizing anything here.
2822 */
2823 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2824 sh->Source = float64_source;
2825 sh->CompileStatus = COMPILE_FAILURE;
2826 _mesa_glsl_compile_shader(ctx, sh, NULL, false, false, true);
2827 nir_shader *nir = nir_shader_clone(NULL, sh->nir);
2828
2829 if (!sh->CompileStatus) {
2830 if (sh->InfoLog) {
2831 _mesa_problem(ctx,
2832 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2833 sh->InfoLog, float64_source);
2834 }
2835 return NULL;
2836 }
2837
2838 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2839 sh->Source = NULL;
2840 _mesa_delete_shader(ctx, sh);
2841
2842 nir_validate_shader(nir, "float64_funcs_to_nir");
2843
2844 NIR_PASS(_, nir, nir_lower_variable_initializers, nir_var_function_temp);
2845 NIR_PASS(_, nir, nir_lower_returns);
2846 NIR_PASS(_, nir, nir_inline_functions);
2847 NIR_PASS(_, nir, nir_opt_deref);
2848
2849 /* Do some optimizations to clean up the shader now. By optimizing the
2850 * functions in the library, we avoid having to re-do that work every
2851 * time we inline a copy of a function. Reducing basic blocks also helps
2852 * with compile times.
2853 */
2854 NIR_PASS(_, nir, nir_lower_vars_to_ssa);
2855 NIR_PASS(_, nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
2856 NIR_PASS(_, nir, nir_copy_prop);
2857 NIR_PASS(_, nir, nir_opt_dce);
2858 NIR_PASS(_, nir, nir_opt_cse);
2859 NIR_PASS(_, nir, nir_opt_gcm, true);
2860 NIR_PASS(_, nir, nir_opt_peephole_select, 1, false, false);
2861 NIR_PASS(_, nir, nir_opt_dce);
2862
2863 return nir;
2864 }
2865