1 /*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_cfg.h"
25 #include "brw_fs.h"
26 #include "util/macros.h"
27
28 bool
is_commutative() const29 fs_inst::is_commutative() const
30 {
31 switch (opcode) {
32 case BRW_OPCODE_AND:
33 case BRW_OPCODE_OR:
34 case BRW_OPCODE_XOR:
35 case BRW_OPCODE_ADD:
36 case BRW_OPCODE_ADD3:
37 case SHADER_OPCODE_MULH:
38 return true;
39
40 case BRW_OPCODE_MUL:
41 /* Integer multiplication of dword and word sources is not actually
42 * commutative. The DW source must be first.
43 */
44 return !brw_type_is_int(src[0].type) ||
45 brw_type_size_bits(src[0].type) == brw_type_size_bits(src[1].type);
46
47 case BRW_OPCODE_SEL:
48 /* MIN and MAX are commutative. */
49 if (conditional_mod == BRW_CONDITIONAL_GE ||
50 conditional_mod == BRW_CONDITIONAL_L) {
51 return true;
52 }
53 FALLTHROUGH;
54 default:
55 return false;
56 }
57 }
58
59 bool
is_3src(const struct brw_compiler * compiler) const60 fs_inst::is_3src(const struct brw_compiler *compiler) const
61 {
62 return ::is_3src(&compiler->isa, opcode);
63 }
64
65 bool
is_math() const66 fs_inst::is_math() const
67 {
68 return (opcode == SHADER_OPCODE_RCP ||
69 opcode == SHADER_OPCODE_RSQ ||
70 opcode == SHADER_OPCODE_SQRT ||
71 opcode == SHADER_OPCODE_EXP2 ||
72 opcode == SHADER_OPCODE_LOG2 ||
73 opcode == SHADER_OPCODE_SIN ||
74 opcode == SHADER_OPCODE_COS ||
75 opcode == SHADER_OPCODE_INT_QUOTIENT ||
76 opcode == SHADER_OPCODE_INT_REMAINDER ||
77 opcode == SHADER_OPCODE_POW);
78 }
79
80 bool
is_control_flow_begin() const81 fs_inst::is_control_flow_begin() const
82 {
83 switch (opcode) {
84 case BRW_OPCODE_DO:
85 case BRW_OPCODE_IF:
86 case BRW_OPCODE_ELSE:
87 return true;
88 default:
89 return false;
90 }
91 }
92
93 bool
is_control_flow_end() const94 fs_inst::is_control_flow_end() const
95 {
96 switch (opcode) {
97 case BRW_OPCODE_ELSE:
98 case BRW_OPCODE_WHILE:
99 case BRW_OPCODE_ENDIF:
100 return true;
101 default:
102 return false;
103 }
104 }
105
106 bool
is_control_flow() const107 fs_inst::is_control_flow() const
108 {
109 switch (opcode) {
110 case BRW_OPCODE_DO:
111 case BRW_OPCODE_WHILE:
112 case BRW_OPCODE_IF:
113 case BRW_OPCODE_ELSE:
114 case BRW_OPCODE_ENDIF:
115 case BRW_OPCODE_BREAK:
116 case BRW_OPCODE_CONTINUE:
117 return true;
118 default:
119 return false;
120 }
121 }
122
123 bool
uses_indirect_addressing() const124 fs_inst::uses_indirect_addressing() const
125 {
126 switch (opcode) {
127 case SHADER_OPCODE_BROADCAST:
128 case SHADER_OPCODE_CLUSTER_BROADCAST:
129 case SHADER_OPCODE_MOV_INDIRECT:
130 return true;
131 default:
132 return false;
133 }
134 }
135
136 bool
can_do_saturate() const137 fs_inst::can_do_saturate() const
138 {
139 switch (opcode) {
140 case BRW_OPCODE_ADD:
141 case BRW_OPCODE_ADD3:
142 case BRW_OPCODE_ASR:
143 case BRW_OPCODE_AVG:
144 case BRW_OPCODE_CSEL:
145 case BRW_OPCODE_DP2:
146 case BRW_OPCODE_DP3:
147 case BRW_OPCODE_DP4:
148 case BRW_OPCODE_DPH:
149 case BRW_OPCODE_DP4A:
150 case BRW_OPCODE_LINE:
151 case BRW_OPCODE_LRP:
152 case BRW_OPCODE_MAC:
153 case BRW_OPCODE_MAD:
154 case BRW_OPCODE_MATH:
155 case BRW_OPCODE_MOV:
156 case BRW_OPCODE_MUL:
157 case SHADER_OPCODE_MULH:
158 case BRW_OPCODE_PLN:
159 case BRW_OPCODE_RNDD:
160 case BRW_OPCODE_RNDE:
161 case BRW_OPCODE_RNDU:
162 case BRW_OPCODE_RNDZ:
163 case BRW_OPCODE_SEL:
164 case BRW_OPCODE_SHL:
165 case BRW_OPCODE_SHR:
166 case SHADER_OPCODE_COS:
167 case SHADER_OPCODE_EXP2:
168 case SHADER_OPCODE_LOG2:
169 case SHADER_OPCODE_POW:
170 case SHADER_OPCODE_RCP:
171 case SHADER_OPCODE_RSQ:
172 case SHADER_OPCODE_SIN:
173 case SHADER_OPCODE_SQRT:
174 return true;
175 default:
176 return false;
177 }
178 }
179
180 bool
reads_accumulator_implicitly() const181 fs_inst::reads_accumulator_implicitly() const
182 {
183 switch (opcode) {
184 case BRW_OPCODE_MAC:
185 case BRW_OPCODE_MACH:
186 return true;
187 default:
188 return false;
189 }
190 }
191
192 bool
writes_accumulator_implicitly(const struct intel_device_info * devinfo) const193 fs_inst::writes_accumulator_implicitly(const struct intel_device_info *devinfo) const
194 {
195 return writes_accumulator ||
196 (eot && intel_needs_workaround(devinfo, 14010017096));
197 }
198
199 bool
has_side_effects() const200 fs_inst::has_side_effects() const
201 {
202 switch (opcode) {
203 case SHADER_OPCODE_SEND:
204 case SHADER_OPCODE_SEND_GATHER:
205 return send_has_side_effects;
206
207 case BRW_OPCODE_SYNC:
208 case SHADER_OPCODE_MEMORY_STORE_LOGICAL:
209 case SHADER_OPCODE_MEMORY_ATOMIC_LOGICAL:
210 case SHADER_OPCODE_MEMORY_FENCE:
211 case SHADER_OPCODE_INTERLOCK:
212 case SHADER_OPCODE_URB_WRITE_LOGICAL:
213 case FS_OPCODE_FB_WRITE_LOGICAL:
214 case SHADER_OPCODE_BARRIER:
215 case SHADER_OPCODE_RND_MODE:
216 case SHADER_OPCODE_FLOAT_CONTROL_MODE:
217 case FS_OPCODE_SCHEDULING_FENCE:
218 case SHADER_OPCODE_BTD_SPAWN_LOGICAL:
219 case SHADER_OPCODE_BTD_RETIRE_LOGICAL:
220 case RT_OPCODE_TRACE_RAY_LOGICAL:
221 return true;
222 default:
223 return eot;
224 }
225 }
226
227 bool
is_volatile() const228 fs_inst::is_volatile() const
229 {
230 return opcode == SHADER_OPCODE_MEMORY_LOAD_LOGICAL ||
231 ((opcode == SHADER_OPCODE_SEND ||
232 opcode == SHADER_OPCODE_SEND_GATHER) && send_is_volatile);
233 }
234
235 #ifndef NDEBUG
236 static bool
inst_is_in_block(const bblock_t * block,const fs_inst * inst)237 inst_is_in_block(const bblock_t *block, const fs_inst *inst)
238 {
239 const exec_node *n = inst;
240
241 /* Find the tail sentinel. If the tail sentinel is the sentinel from the
242 * list header in the bblock_t, then this instruction is in that basic
243 * block.
244 */
245 while (!n->is_tail_sentinel())
246 n = n->get_next();
247
248 return n == &block->instructions.tail_sentinel;
249 }
250 #endif
251
252 static void
adjust_later_block_ips(bblock_t * start_block,int ip_adjustment)253 adjust_later_block_ips(bblock_t *start_block, int ip_adjustment)
254 {
255 for (bblock_t *block_iter = start_block->next();
256 block_iter;
257 block_iter = block_iter->next()) {
258 block_iter->start_ip += ip_adjustment;
259 block_iter->end_ip += ip_adjustment;
260 }
261 }
262
263 void
insert_after(bblock_t * block,fs_inst * inst)264 fs_inst::insert_after(bblock_t *block, fs_inst *inst)
265 {
266 assert(this != inst);
267 assert(block->end_ip_delta == 0);
268
269 if (!this->is_head_sentinel())
270 assert(inst_is_in_block(block, this) || !"Instruction not in block");
271
272 block->end_ip++;
273
274 adjust_later_block_ips(block, 1);
275
276 exec_node::insert_after(inst);
277 }
278
279 void
insert_before(bblock_t * block,fs_inst * inst)280 fs_inst::insert_before(bblock_t *block, fs_inst *inst)
281 {
282 assert(this != inst);
283 assert(block->end_ip_delta == 0);
284
285 if (!this->is_tail_sentinel())
286 assert(inst_is_in_block(block, this) || !"Instruction not in block");
287
288 block->end_ip++;
289
290 adjust_later_block_ips(block, 1);
291
292 exec_node::insert_before(inst);
293 }
294
295 void
remove(bblock_t * block,bool defer_later_block_ip_updates)296 fs_inst::remove(bblock_t *block, bool defer_later_block_ip_updates)
297 {
298 assert(inst_is_in_block(block, this) || !"Instruction not in block");
299
300 if (exec_list_is_singular(&block->instructions)) {
301 this->opcode = BRW_OPCODE_NOP;
302 this->resize_sources(0);
303 this->dst = brw_reg();
304 this->size_written = 0;
305 return;
306 }
307
308 if (defer_later_block_ip_updates) {
309 block->end_ip_delta--;
310 } else {
311 assert(block->end_ip_delta == 0);
312 adjust_later_block_ips(block, -1);
313 }
314
315 if (block->start_ip == block->end_ip) {
316 if (block->end_ip_delta != 0) {
317 adjust_later_block_ips(block, block->end_ip_delta);
318 block->end_ip_delta = 0;
319 }
320
321 block->cfg->remove_block(block);
322 } else {
323 block->end_ip--;
324 }
325
326 exec_node::remove();
327 }
328