1 /* 2 * Copyright 2024 Advanced Micro Devices, Inc. 3 * SPDX-License-Identifier: MIT 4 */ 5 6 #ifndef AC_LINUX_DRM_H 7 #define AC_LINUX_DRM_H 8 9 #include <stdbool.h> 10 #include <stdint.h> 11 12 #ifndef _WIN32 13 #include "drm-uapi/amdgpu_drm.h" 14 #include "amdgpu.h" 15 #endif 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 /* All functions are static inline stubs on Windows. */ 22 #ifdef _WIN32 23 #define PROC static inline 24 #define TAIL \ 25 { \ 26 return -1; \ 27 } 28 #define TAILV \ 29 { \ 30 } 31 #define TAILPTR \ 32 { \ 33 return NULL; \ 34 } 35 typedef void* amdgpu_va_handle; 36 #else 37 #define PROC 38 #define TAIL 39 #define TAILV 40 #define TAILPTR 41 #endif 42 43 struct ac_drm_device; 44 typedef struct ac_drm_device ac_drm_device; 45 46 typedef union ac_drm_bo { 47 #ifdef _WIN32 48 void *abo; 49 #else 50 amdgpu_bo_handle abo; 51 #endif 52 #ifdef HAVE_AMDGPU_VIRTIO 53 struct amdvgpu_bo *vbo; 54 #endif 55 } ac_drm_bo; 56 57 struct ac_drm_bo_import_result { 58 ac_drm_bo bo; 59 uint64_t alloc_size; 60 }; 61 62 PROC int ac_drm_device_initialize(int fd, bool is_virtio, 63 uint32_t *major_version, uint32_t *minor_version, 64 ac_drm_device **device_handle) TAIL; 65 PROC uintptr_t ac_drm_device_get_cookie(ac_drm_device *dev) TAIL; 66 PROC void ac_drm_device_deinitialize(ac_drm_device *dev) TAILV; 67 PROC int ac_drm_device_get_fd(ac_drm_device *dev) TAIL; 68 PROC int ac_drm_bo_set_metadata(ac_drm_device *dev, uint32_t bo_handle, 69 struct amdgpu_bo_metadata *info) TAIL; 70 PROC int ac_drm_bo_query_info(ac_drm_device *dev, uint32_t bo_handle, struct amdgpu_bo_info *info) TAIL; 71 PROC int ac_drm_bo_wait_for_idle(ac_drm_device *dev, ac_drm_bo bo, uint64_t timeout_ns, 72 bool *busy) TAIL; 73 PROC int ac_drm_bo_va_op(ac_drm_device *dev, uint32_t bo_handle, uint64_t offset, uint64_t size, 74 uint64_t addr, uint64_t flags, uint32_t ops) TAIL; 75 PROC int ac_drm_bo_va_op_raw(ac_drm_device *dev, uint32_t bo_handle, uint64_t offset, uint64_t size, 76 uint64_t addr, uint64_t flags, uint32_t ops) TAIL; 77 PROC int ac_drm_bo_va_op_raw2(ac_drm_device *dev, uint32_t bo_handle, uint64_t offset, uint64_t size, 78 uint64_t addr, uint64_t flags, uint32_t ops, 79 uint32_t vm_timeline_syncobj_out, uint64_t vm_timeline_point, 80 uint64_t input_fence_syncobj_handles, 81 uint32_t num_syncobj_handles) TAIL; 82 PROC int ac_drm_cs_ctx_create2(ac_drm_device *dev, uint32_t priority, uint32_t *ctx_id) TAIL; 83 PROC int ac_drm_cs_ctx_free(ac_drm_device *dev, uint32_t ctx_id) TAIL; 84 PROC int ac_drm_cs_ctx_stable_pstate(ac_drm_device *dev, uint32_t ctx_id, uint32_t op, 85 uint32_t flags, uint32_t *out_flags) TAIL; 86 PROC int ac_drm_cs_query_reset_state2(ac_drm_device *dev, uint32_t ctx_id, uint64_t *flags) TAIL; 87 PROC int ac_drm_cs_query_fence_status(ac_drm_device *dev, uint32_t ctx_id, uint32_t ip_type, 88 uint32_t ip_instance, uint32_t ring, uint64_t fence_seq_no, 89 uint64_t timeout_ns, uint64_t flags, uint32_t *expired) TAIL; 90 PROC int ac_drm_cs_create_syncobj2(int device_fd, uint32_t flags, uint32_t *handle) TAIL; 91 PROC int ac_drm_cs_create_syncobj(int device_fd, uint32_t *handle) TAIL; 92 PROC int ac_drm_cs_destroy_syncobj(int device_fd, uint32_t handle) TAIL; 93 PROC int ac_drm_cs_syncobj_wait(int device_fd, uint32_t *handles, unsigned num_handles, 94 int64_t timeout_nsec, unsigned flags, 95 uint32_t *first_signaled) TAIL; 96 PROC int ac_drm_cs_syncobj_query2(int device_fd, uint32_t *handles, uint64_t *points, 97 unsigned num_handles, uint32_t flags) TAIL; 98 PROC int ac_drm_cs_import_syncobj(int device_fd, int shared_fd, uint32_t *handle) TAIL; 99 PROC int ac_drm_cs_syncobj_export_sync_file(int device_fd, uint32_t syncobj, 100 int *sync_file_fd) TAIL; 101 PROC int ac_drm_cs_syncobj_import_sync_file(int device_fd, uint32_t syncobj, int sync_file_fd) TAIL; 102 PROC int ac_drm_cs_syncobj_export_sync_file2(int device_fd, uint32_t syncobj, uint64_t point, 103 uint32_t flags, int *sync_file_fd) TAIL; 104 PROC int ac_drm_cs_syncobj_transfer(int device_fd, uint32_t dst_handle, uint64_t dst_point, 105 uint32_t src_handle, uint64_t src_point, uint32_t flags) TAIL; 106 PROC int ac_drm_cs_submit_raw2(ac_drm_device *dev, uint32_t ctx_id, uint32_t bo_list_handle, 107 int num_chunks, struct drm_amdgpu_cs_chunk *chunks, 108 uint64_t *seq_no) TAIL; 109 PROC void ac_drm_cs_chunk_fence_info_to_data(uint32_t bo_handle, uint64_t offset, 110 struct drm_amdgpu_cs_chunk_data *data) TAILV; 111 PROC int ac_drm_cs_syncobj_timeline_wait(int device_fd, uint32_t *handles, uint64_t *points, 112 unsigned num_handles, int64_t timeout_nsec, unsigned flags, 113 uint32_t *first_signaled) TAIL; 114 PROC int ac_drm_query_info(ac_drm_device *dev, unsigned info_id, unsigned size, void *value) TAIL; 115 PROC int ac_drm_read_mm_registers(ac_drm_device *dev, unsigned dword_offset, unsigned count, 116 uint32_t instance, uint32_t flags, uint32_t *values) TAIL; 117 PROC int ac_drm_query_hw_ip_count(ac_drm_device *dev, unsigned type, uint32_t *count) TAIL; 118 PROC int ac_drm_query_hw_ip_info(ac_drm_device *dev, unsigned type, unsigned ip_instance, 119 struct drm_amdgpu_info_hw_ip *info) TAIL; 120 PROC int ac_drm_query_firmware_version(ac_drm_device *dev, unsigned fw_type, unsigned ip_instance, 121 unsigned index, uint32_t *version, uint32_t *feature) TAIL; 122 PROC int ac_drm_query_uq_fw_area_info(ac_drm_device *dev, unsigned type, unsigned ip_instance, 123 struct drm_amdgpu_info_uq_fw_areas *info) TAIL; 124 PROC int ac_drm_query_gpu_info(ac_drm_device *dev, struct amdgpu_gpu_info *info) TAIL; 125 PROC int ac_drm_query_heap_info(ac_drm_device *dev, uint32_t heap, uint32_t flags, 126 struct amdgpu_heap_info *info) TAIL; 127 PROC int ac_drm_query_sensor_info(ac_drm_device *dev, unsigned sensor_type, unsigned size, 128 void *value) TAIL; 129 PROC int ac_drm_query_video_caps_info(ac_drm_device *dev, unsigned cap_type, unsigned size, 130 void *value) TAIL; 131 PROC int ac_drm_query_gpuvm_fault_info(ac_drm_device *dev, unsigned size, void *value) TAIL; 132 PROC int ac_drm_vm_reserve_vmid(ac_drm_device *dev, uint32_t flags) TAIL; 133 PROC int ac_drm_vm_unreserve_vmid(ac_drm_device *dev, uint32_t flags) TAIL; 134 PROC const char *ac_drm_get_marketing_name(ac_drm_device *device) TAILPTR; 135 PROC int ac_drm_query_sw_info(ac_drm_device *dev, 136 enum amdgpu_sw_info info, void *value) TAIL; 137 PROC int ac_drm_bo_alloc(ac_drm_device *dev, struct amdgpu_bo_alloc_request *alloc_buffer, 138 ac_drm_bo *bo) TAIL; 139 PROC int ac_drm_bo_export(ac_drm_device *dev, ac_drm_bo bo, 140 enum amdgpu_bo_handle_type type, uint32_t *shared_handle) TAIL; 141 PROC int ac_drm_bo_import(ac_drm_device *dev, enum amdgpu_bo_handle_type type, 142 uint32_t shared_handle, struct ac_drm_bo_import_result *output) TAIL; 143 PROC int ac_drm_create_bo_from_user_mem(ac_drm_device *dev, void *cpu, 144 uint64_t size, ac_drm_bo *bo) TAIL; 145 PROC int ac_drm_bo_free(ac_drm_device *dev, ac_drm_bo bo) TAIL; 146 PROC int ac_drm_bo_cpu_map(ac_drm_device *dev, ac_drm_bo bo, void **cpu) TAIL; 147 PROC int ac_drm_bo_cpu_unmap(ac_drm_device *dev, ac_drm_bo bo) TAIL; 148 PROC int ac_drm_va_range_alloc(ac_drm_device *dev, enum amdgpu_gpu_va_range va_range_type, 149 uint64_t size, uint64_t va_base_alignment, uint64_t va_base_required, 150 uint64_t *va_base_allocated, amdgpu_va_handle *va_range_handle, 151 uint64_t flags) TAIL; 152 PROC int ac_drm_va_range_free(amdgpu_va_handle va_range_handle) TAIL; 153 PROC int ac_drm_create_userqueue(ac_drm_device *dev, uint32_t ip_type, uint32_t doorbell_handle, 154 uint32_t doorbell_offset, uint64_t queue_va, uint64_t queue_size, 155 uint64_t wptr_va, uint64_t rptr_va, void *mqd_in, 156 uint32_t *queue_id) TAIL; 157 PROC int ac_drm_free_userqueue(ac_drm_device *dev, uint32_t queue_id) TAIL; 158 PROC int ac_drm_userq_signal(ac_drm_device *dev, struct drm_amdgpu_userq_signal *signal_data) TAIL; 159 PROC int ac_drm_userq_wait(ac_drm_device *dev, struct drm_amdgpu_userq_wait *wait_data) TAIL; 160 161 #ifdef __cplusplus 162 } 163 #endif 164 165 #endif 166