1 /* 2 * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17 */ 18 #ifndef __DRV_HDMI_EDID_H__ 19 #define __DRV_HDMI_EDID_H__ 20 21 #include "hi_type.h" 22 #include "drv_hdmi_infoframe.h" 23 #include "drv_hdmi_common.h" 24 25 #define HDMI_EDID_BLOCK_SIZE 128 26 #define HDMI_EDID_MAX_BLOCK_NUM 4 27 #define HDMI_EDID_TOTAL_SIZE (HDMI_EDID_BLOCK_SIZE * HDMI_EDID_MAX_BLOCK_NUM) 28 #define HDMI_EDID_MAX_HDMI14_TMDS_RATE 340000 // in khz 29 #define HDMI_EDID_MAX_HDMI20_TMDS_RATE 600000 30 #define HDMI_EDID_MAX_STDTIMNG_COUNT 8 31 #define HDMI_EDID_MAX_VIC_COUNT 128 32 #define HDMI_EDID_MAX_AUDIO_CAP_COUNT 16 33 #define HDMI_EDID_MAX_SAMPE_RATE_NUM 8 34 #define HDMI_EDID_MAX_BIT_DEPTH_NUM 6 35 #define HDMI_EDID_MAX_DETAIL_TIMING_COUNT 10 36 #define HDMI_EDID_MAX_SINKNAME_COUNT 14 37 #define HDMI_EDID_MAX_AUDIO_SPEAKER_COUNT 12 38 /* virtual video code, private define for VSDB 4k-format */ 39 #define HDMI_EDID_MAX_REAL_VIC 255U 40 #define HDMI_VIC_VIRTUAL_BASE (HDMI_EDID_MAX_REAL_VIC) 41 #define DOLBY_IEEE_OUI 0x00D046 42 43 typedef enum { 44 HDMI_EDID_ESTABTIMG_VESA_800X600_60, 45 HDMI_EDID_ESTABTIMG_VESA_800X600_56, 46 HDMI_EDID_ESTABTIMG_VESA_640X480_75, 47 HDMI_EDID_ESTABTIMG_VESA_640X480_72, 48 HDMI_EDID_ESTABTIMG_VGA_640X480_67, 49 HDMI_EDID_ESTABTIMG_XGA_640X480_60, 50 HDMI_EDID_ESTABTIMG_XGA2_720X400_88, 51 HDMI_EDID_ESTABTIMG_XGA_720X400_70, 52 HDMI_EDID_ESTABTIMG_VESA_1280X1024_75, 53 HDMI_EDID_ESTABTIMG_VESA_1024X768_75, 54 HDMI_EDID_ESTABTIMG_VESA_1024X768_70, 55 HDMI_EDID_ESTABTIMG_VESA_1024X768_60, 56 HDMI_EDID_ESTABTIMG_1024X768_87, 57 HDMI_EDID_ESTABTIMG_832X624_75, 58 HDMI_EDID_ESTABTIMG_VESA_800X600_75, 59 HDMI_EDID_ESTABTIMG_VESA_800X600_72, 60 HDMI_EDID_ESTABTIMG_VESA_1152X870_75, 61 HDMI_EDID_ESTABTIMG_BUTT 62 } hdmi_edid_estab_timing; 63 64 typedef struct { 65 hi_u32 vfb; /* vertical front blank */ 66 hi_u32 vbb; /* vertical back blank */ 67 hi_u32 vact; /* vertical active area */ 68 hi_u32 hfb; /* horizontal front blank */ 69 hi_u32 hbb; /* horizontal back blank */ 70 hi_u32 hact; /* horizontal active area */ 71 hi_u32 vpw; /* vertical sync pulse width */ 72 hi_u32 hpw; /* horizontal sync pulse width */ 73 hi_bool idv; /* flag of data valid signal is needed flip */ 74 hi_bool ihs; /* flag of horizontal sync pulse is needed flip */ 75 hi_bool ivs; /* flag of vertical sync pulse is needed flip */ 76 hi_u32 image_width; /* image width */ 77 hi_u32 image_height; /* image height */ 78 hi_u32 aspect_ratio_w; /* aspect ratio width */ 79 hi_u32 aspect_ratio_h; /* aspect ratio height */ 80 hi_bool interlace; /* flag of interlace */ 81 hi_u32 pixel_clk; /* pixelc clk for this timing */ 82 } hdmi_edid_pre_timing; 83 84 typedef struct { 85 hi_u32 hor_active; 86 hi_u32 ver_active; 87 hi_u32 refresh_rate; 88 } hdmi_edid_std_timing; 89 90 typedef enum { 91 HDMI_EDID_VIRTUAL_VIC_3840X2160_30 = HDMI_VIC_VIRTUAL_BASE + 1, 92 HDMI_EDID_VIRTUAL_VIC_3840X2160_25, 93 HDMI_EDID_VIRTUAL_VIC_3840X2160_24, 94 HDMI_EDID_VIRTUAL_VIC_4096X2160_24, 95 HDMI_EDID_VIRTUAL_VIC_VSDB_BUTT 96 } hdmi_edid_virtual_vic; 97 98 typedef struct { 99 hdmi_audio_format_code aud_fmt_code; 100 hdmi_sample_rate support_sample_rate[HDMI_EDID_MAX_SAMPE_RATE_NUM]; 101 hdmi_audio_bit_depth support_bit_depth[HDMI_EDID_MAX_BIT_DEPTH_NUM]; 102 hi_u32 support_sample_rate_num; 103 hi_u8 aud_channel; /* aud channel of the coding type */ 104 hi_u32 support_bit_depth_num; 105 hi_u32 max_bit_rate; /* khz */ 106 } hdmi_edid_audio_info; 107 108 typedef enum { 109 HDMI_EDID_AUDIO_SPEAKER_FL_FR, 110 HDMI_EDID_AUDIO_SPEAKER_LFE, 111 HDMI_EDID_AUDIO_SPEAKER_FC, 112 HDMI_EDID_AUDIO_SPEAKER_RL_RR, 113 HDMI_EDID_AUDIO_SPEAKER_RC, 114 HDMI_EDID_AUDIO_SPEAKER_FLC_FRC, 115 HDMI_EDID_AUDIO_SPEAKER_RLC_RRC, 116 HDMI_EDID_AUDIO_SPEAKER_FLW_FRW, 117 HDMI_EDID_AUDIO_SPEAKER_FLH_FRH, 118 HDMI_EDID_AUDIO_SPEAKER_TC, 119 HDMI_EDID_AUDIO_SPEAKER_FCH, 120 HDMI_EDID_AUDIO_SPEAKER_BUTT 121 } hdmi_edid_audio_speaker; 122 123 typedef struct { 124 hi_char mfrs_name[4]; 125 hi_u32 product_code; 126 hi_u32 serial_number; 127 hi_u32 week; 128 hi_u32 year; 129 hi_u8 sink_name[HDMI_EDID_MAX_SINKNAME_COUNT]; 130 } hdmi_edid_manufacture_info; 131 132 typedef struct { 133 hi_bool deep_color_y444; 134 hi_bool deep_color30_bit; 135 hi_bool deep_color36_bit; 136 hi_bool deep_color48_bit; 137 } hdmi_edid_deep_color; 138 139 typedef struct { 140 hi_bool xvycc601; 141 hi_bool xvycc709; 142 hi_bool sycc601; 143 hi_bool adoble_ycc601; 144 hi_bool adoble_rgb; 145 hi_bool bt2020c_ycc; 146 hi_bool bt2020_ycc; 147 hi_bool bt2020_rgb; 148 } hdmi_edid_colorimetry; 149 150 typedef struct { 151 hi_bool rgb444; 152 hi_bool ycbcr422; 153 hi_bool ycbcr444; 154 hi_bool ycbcr420; 155 } hdmi_edid_color_space; 156 157 typedef struct { 158 hi_bool phy_addr_valid; 159 hi_u8 phy_addr_a; 160 hi_u8 phy_addr_b; 161 hi_u8 phy_addr_c; 162 hi_u8 phy_addr_d; 163 } hdmi_edid_cec_address; 164 165 typedef struct { 166 hi_bool deep_color30_bit; 167 hi_bool deep_color36_bit; 168 hi_bool deep_color48_bit; 169 } hdmi_edid_deep_color_y420; 170 171 typedef struct { 172 hi_bool dsc_1p2; 173 hi_bool dsc_native_420; 174 hi_bool dsc_all_bpp; 175 hi_bool dsc_10bpc; 176 hi_bool dsc_12bpc; 177 hi_bool dsc_16bpc; 178 hi_u8 dsc_max_slices; 179 hi_u8 dsc_max_frl_rate; 180 hi_u8 dsc_total_chunk_k_bytes; 181 } hdmi_edid_dsc_info; 182 183 typedef enum { 184 HDMI_EDID_3D_FRAME_PACKETING, /* 3d type:frame packing */ 185 HDMI_EDID_3D_FIELD_ALTERNATIVE, /* 3d type:field alternative */ 186 HDMI_EDID_3D_LINE_ALTERNATIVE, /* 3d type:line alternative */ 187 HDMI_EDID_3D_SIDE_BY_SIDE_FULL, /* 3d type:side by side full */ 188 HDMI_EDID_3D_L_DEPTH, /* 3d type:L+depth */ 189 HDMI_EDID_3D_L_DEPTH_GRAPHICS_GRAPHICS_DEPTH, /* 3d type:L+depth+graphics+graphics-depth */ 190 HDMI_EDID_3D_TOP_AND_BOTTOM, /* 3d type:top and bottom */ 191 HDMI_EDID_3D_SIDE_BY_SIDE_HALF = 0x08, /* 3d type:side by side half */ 192 HDMI_EDID_3D_BUTT 193 } hdmi_edid_3d_type; 194 195 typedef struct { 196 hi_bool support_3d; 197 hi_bool support_3d_type[HDMI_EDID_3D_BUTT]; 198 } hdmi_edid_3d_info; 199 200 typedef enum { 201 HDMI_EDID_DATA_VALIDSINK, 202 HDMI_EDID_DATA_VALIDTEST, 203 HDMI_EDID_DATA_INVALID, 204 HDMI_EDID_DATA_BUTT 205 } hdmi_edid_data; 206 207 typedef enum { 208 HDMI_EDID_UPDATE_SINK, /* update from SINK by DDC(HAL support interface). */ 209 HDMI_EDID_UPDATE_TEST0, /* update from EDID_TEST,and the following same. */ 210 HDMI_EDID_UPDATE_TEST1, 211 HDMI_EDID_UPDATE_TEST2, 212 HDMI_EDID_UPDATE_TEST3, 213 HDMI_EDID_UPDATE_TEST4, 214 HDMI_EDID_UPDATE_TEST5, 215 HDMI_EDID_UPDATE_TEST6, 216 HDMI_EDID_UPDATE_TEST7, 217 HDMI_EDID_UPDATE_TEST8, 218 HDMI_EDID_UPDATE_TEST9, 219 HDMI_EDID_UPDATE_TEST10, 220 HDMI_EDID_UPDATE_TEST11, 221 HDMI_EDID_UPDATE_TEST12, 222 HDMI_EDID_UPDATE_TEST13, 223 HDMI_EDID_UPDATE_TEST14, 224 HDMI_EDID_UPDATE_TEST15, 225 HDMI_EDID_UPDATE_TEST16, 226 HDMI_EDID_UPDATE_TEST17, 227 HDMI_EDID_UPDATE_TEST18, 228 HDMI_EDID_UPDATE_TEST19, 229 HDMI_EDID_UPDATE_TEST20, 230 HDMI_EDID_UPDATE_TEST21, 231 HDMI_EDID_UPDATE_TEST22, 232 HDMI_EDID_UPDATE_TEST23, 233 HDMI_EDID_UPDATE_TEST24, 234 HDMI_EDID_UPDATE_DEBUG, 235 HDMI_EDID_UPDATE_BUTT 236 } hdmi_edid_updata_mode; 237 238 /* 239 * EDID parse-error number. 240 * NOTE:parse-error meaning that something we don't expect occurs, 241 * and it can lead other's raw field to parse error. so we stop and return FAILURE when occurred. 242 * user should read the status when returned FAILURE. 243 */ 244 typedef enum { 245 EDID_PARSE_ERR_NONE, 246 EDID_PARSE_ERR_CHECKSUM, 247 EDID_PARSE_ERR_HEADER, 248 EDID_PARSE_ERR_FST_BLK_VER, 249 EDID_PARSE_ERR_TAG_UNKNOWN, 250 EDID_PARSE_ERR_CEA_REVERION, 251 EDID_PARSE_ERR_BUTT 252 } hdmi_edid_parse_err; 253 254 /* 255 * EDID parse-warning information bit shift code. 256 * NOTE:parse-warning meaning that something we don't expect occurs, 257 * but it can't lead other's raw field to parse error. 258 * user should read the status to check when parsing is finished. 259 */ 260 typedef enum { 261 EDID_PARSE_WARN_NONE, 262 EDID_PARSE_WARN_VENDOR_INVALID, 263 EDID_PARSE_WARN_DTD_OVER, 264 EDID_PARSE_WARN_DTD_INVALID, 265 EDID_PARSE_WARN_EXT_BLK_ZERO, 266 EDID_PARSE_WARN_EXT_BLK_OVER, 267 EDID_PARSE_WARN_AUDIO_CNT_OVER, 268 EDID_PARSE_WARN_AUDIO_FMT_INVALID, 269 EDID_PARSE_WARN_VIC_CNT_OVER, 270 EDID_PARSE_WARN_VIC_INVALID, 271 EDID_PARSE_WARN_VSDB_INVALID, 272 EDID_PARSE_WARN_HFVSDB_INVALID, 273 EDID_PARSE_WARN_SPKDB_INVALID, 274 EDID_PARSE_WARN_Y420VDB_VIC_OVER, 275 EDID_PARSE_WARN_BLOCKLEN_INVALID, 276 EDID_PARSE_WARN_BUTT 277 } hdmi_edid_parse_warn; 278 279 typedef struct { 280 hi_bool audio_fmt_supported[HDMI_EDID_MAX_AUDIO_CAP_COUNT - 1]; 281 hi_u32 audio_sample_rate_supported[HDMI_EDID_MAX_SAMPE_RATE_NUM]; /* PCM smprate capability */ 282 hi_u32 max_pcm_channels; 283 } hdmi_audio_capability; 284 285 typedef struct { 286 hi_bool cap_sink; /* [current] is capability parse from SINK or EDID_TEST */ 287 hi_bool cap_valid; /* [current] is capability valid */ 288 hi_bool raw_valid; /* [current] is raw data valid */ 289 hi_u32 raw_len; 290 hdmi_edid_parse_err parse_err; /* [current] parse error code,in byte */ 291 hi_u32 parse_warn; /* [current] parse warning ,in bits shift,see hdmi_edid_parse_warn */ 292 hi_u32 raw_get_err_cnt; /* error from raw data getting count */ 293 hi_u32 cap_get_err_cnt; /* error from capability getting count */ 294 hi_u32 raw_update_err_cnt; /* error from raw data updating count */ 295 } hdmi_edid_status; 296 297 typedef struct { 298 hi_u16 red_x; 299 hi_u16 red_y; 300 hi_u16 green_x; 301 hi_u16 green_y; 302 hi_u16 blue_x; 303 hi_u16 blue_y; 304 hi_u16 white_x; 305 hi_u16 white_y; 306 } hdmi_edid_phosphor; 307 308 typedef struct { 309 /* the major version of display management implemented. only support when vsvdb_version = 0. */ 310 hi_u8 d_mmajor_version; 311 /* the minor version of display management implemented. only support when vsvdb_version = 0. */ 312 hi_u8 d_mminor_version; 313 /* 314 * white point chromaticity coordinate x, bit[11:0]valid. real value = SUM OF bit[N]*2^-(12-N), 315 * only support when vsvdb_version = 0. 316 */ 317 hi_u16 white_x; 318 /* 319 * white point chromaticity coordinate y, bit[11:0]valid. real value = SUM OF bit[N]*2^-(12-N), 320 * only support when vsvdb_version = 0. 321 */ 322 hi_u16 white_y; 323 } hdmi_edid_dolby_caps_ver_type0; 324 325 typedef struct { 326 /* 327 * 0:based on display management v2.x; 328 * 1:based on the video and blending pipeline v3.x; 329 * 2-7: reserved. only support when vsvdb_version = 1. 330 */ 331 hi_u8 dm_version; 332 /* 333 * this bit is valid only vsvdb_version = 1. 334 * 0: dolby vision HDMI sink's colorimetry is close to rec.709, 335 * 1: EDR HDMI sink's colorimetry is close to P3, if byte[9] to byte[14] are present, ignores this bit. 336 */ 337 hi_bool colorimetry; 338 } hdmi_edid_dolby_caps_ver_type1; 339 340 typedef union { 341 hdmi_edid_dolby_caps_ver_type0 dolby_caps_ver0; 342 hdmi_edid_dolby_caps_ver_type1 dolby_caps_ver1; 343 } hdmi_edid_dolby; 344 345 typedef struct { 346 /* 347 * the version of VSVDB, if this equal to 1, the value of min_luminance and max_luminance only 7 bits, 348 * the rx, ry, gx, gy, bx, by only 8 bits. see < dolby vision HDMI transmission specification issue 2.6 349 */ 350 hi_u8 vsvdb_version; 351 /* support(HI_TRUE) or not support(HI_FALSE) a YUV422-12_bit dolby signal */ 352 hi_bool yuv422_12_bit; 353 /* capable of processing a max timing 3840X2160p60(HI_TRUE) /3840X2160p30(HI_FALSE) */ 354 hi_bool b2160_p60; 355 /* support(HI_TRUE) or not support(HI_FALSE) global dimming. */ 356 hi_bool global_dimming; 357 /* red primary chromaticity coordinate x, bit[11:0]valid.real value =SUM OF bit[N]*2^-(12-N) */ 358 hi_u16 red_x; 359 /* red primary chromaticity coordinate y, bit[11:0]valid.real value =SUM OF bit[N]*2^-(12-N) */ 360 hi_u16 red_y; 361 /* green primary chromaticity coordinate x, bit[11:0]valid.real value =SUM OF bit[N]*2^-(12-N) */ 362 hi_u16 green_x; 363 /* green primary chromaticity coordinate y, bit[11:0]valid.real value =SUM OF bit[N]*2^-(12-N) */ 364 hi_u16 green_y; 365 /* blue primary chromaticity coordinate x, bit[11:0]valid.real value =SUM OF bit[N]*2^-(12-N) */ 366 hi_u16 blue_x; 367 /* blue primary chromaticity coordinate y, bit[11:0]valid.real value =SUM OF bit[N]*2^-(12-N) */ 368 hi_u16 blue_y; 369 /* minimum luminance value of the target display, [0,4095] cd/m^2 */ 370 hi_u16 min_luminance; 371 /* maximum luminance value of the target display, [0,4095] cd/m^2 */ 372 hi_u16 max_luminance; 373 /* other caps in dolby VSVDB. distinction between V0(vsvdb_version=0) and V1(vsvdb_version=1). */ 374 hdmi_edid_dolby un_other_caps; 375 /* dolby OUI */ 376 hi_u32 dolby_oui; 377 } hdmi_edid_dolby_cap; 378 379 typedef struct { 380 hi_bool eotf_sdr; /* traditional gamma - SDR luminance range */ 381 hi_bool eotf_hdr; /* traditional gamma - HDR luminance range */ 382 hi_bool eotf_smpte_st2084; /* SMPTE ST 2084 */ 383 hi_bool eotf_hlg; /* hybrid log-gamma */ 384 hi_bool eotf_future; /* future EOTF */ 385 } hdmi_edid_eotf; 386 387 typedef struct { 388 hi_bool descriptor_type1; /* static metadata type 1 */ 389 } hdmi_edid_hdr_metadata_type; 390 391 typedef struct { 392 /* EOTF support. */ 393 hdmi_edid_eotf eotf; 394 /* static metadata descriptor type(ID) support. */ 395 hdmi_edid_hdr_metadata_type metadata; 396 /* desired content max luminance data. real value(in 1cd/m^2) = 50.2^(CV/32) */ 397 hi_u8 max_luminance_cv; 398 /* desired content max frame-average luminance. real value(in 1cd/m^2) = 50.2^(CV/32) */ 399 hi_u8 average_lumin_cv; 400 /* 401 * desired content min luminance data. 402 * real value(in 1cd/m^2) = max_luminance_cv * (min_luminance_cv/255)^2 / 100 403 */ 404 hi_u8 min_luminance_cv; 405 } hdmi_edid_hdr_cap; 406 407 typedef struct { 408 hi_bool dolby_support; 409 hi_bool hdr_support; 410 hdmi_edid_dolby_cap dolby_caps; 411 hdmi_edid_hdr_cap hdr_caps; 412 hdmi_edid_colorimetry color_metry; 413 } hdmi_video_capability; 414 415 typedef struct { 416 hi_u8 max_image_width; /* the disp image max width (0~255)cm */ 417 hi_u8 max_image_height; /* the disp image max height (0~255)cm */ 418 } hdmi_edid_base_disp_para; 419 420 typedef struct { 421 hi_bool support_hdmi; 422 hi_u32 native_format; 423 hi_u32 estab_num; 424 hi_u32 estab_timing[HDMI_EDID_ESTABTIMG_BUTT]; 425 hi_u32 support_vic_num; 426 hi_u32 support_format[HDMI_EDID_MAX_VIC_COUNT]; 427 hdmi_edid_std_timing std_timing[HDMI_EDID_MAX_STDTIMNG_COUNT]; 428 hdmi_edid_3d_info _3d_info; 429 hdmi_edid_deep_color deep_color; 430 hdmi_edid_colorimetry color_metry; 431 hdmi_edid_color_space color_space; 432 hdmi_edid_audio_info audio_info[HDMI_EDID_MAX_AUDIO_CAP_COUNT]; 433 hi_u8 md_bit; 434 hi_u32 audio_info_num; 435 hi_bool support_audio_speaker[HDMI_EDID_MAX_AUDIO_SPEAKER_COUNT]; 436 hi_u8 ext_block_num; 437 hi_u8 version; 438 hi_u8 revision; 439 hdmi_edid_manufacture_info mfrs_info; 440 hdmi_edid_cec_address cec_addr; 441 hdmi_edid_pre_timing perfer_timing[HDMI_EDID_MAX_DETAIL_TIMING_COUNT]; 442 hi_bool support_dvi_dual; 443 hi_bool supports_ai; 444 hi_u32 perfer_timing_num; 445 hi_u32 max_tmds_clock; 446 hi_bool i_latency_fields_present; 447 hi_bool latency_fields_present; 448 hi_bool hdmi_video_present; 449 hi_u8 video_latency; 450 hi_u8 audio_latency; 451 hi_u8 interlaced_video_latency; 452 hi_u8 interlaced_audio_latency; 453 hi_bool support_scramble; 454 hi_bool support_hdmi_20; 455 hi_bool support_scdc; 456 hi_bool support_rr_capable; 457 hi_bool support_lte340_mcsc_scrameble; 458 hi_bool support3d_osd_disparity; 459 hi_bool support3d_dual_view; 460 hi_bool support3d_independent_view; 461 hi_u32 support_y420_vic_num; 462 hi_u32 support_y420_format[HDMI_EDID_MAX_VIC_COUNT]; 463 hi_u32 only_support_y420_vic_num; 464 hi_u32 only_support_y420_format[HDMI_EDID_MAX_VIC_COUNT]; 465 hi_bool ycc_qrange_selectable; 466 hi_bool rgb_qrange_selectable; 467 hi_bool support_ffe; 468 hi_bool ccbpci; 469 hi_u8 max_frl_rate; 470 hi_bool fapa_start_location; 471 hi_bool allm; 472 hi_bool fva; 473 hi_bool cnm_vrr; 474 hi_bool cinema_vrr; 475 hi_bool m_delta; 476 hi_u8 vrr_min; 477 hi_u16 vrr_max; 478 hdmi_edid_dsc_info dsc_info; 479 hdmi_edid_deep_color_y420 deep_color_y420; 480 hdmi_edid_phosphor phos_or_chrom_cap; 481 hdmi_edid_hdr_cap hdr_cap; 482 hdmi_edid_dolby_cap dolby_cap; 483 hdmi_hdcp_capability hdcp_support; 484 hdmi_edid_base_disp_para basic_disp_para; 485 } hdmi_sink_capability; 486 487 typedef struct { 488 hdmi_edid_status status; 489 hi_u8 edid_raw[HDMI_EDID_TOTAL_SIZE]; 490 hdmi_sink_capability capability; 491 } hdmi_edid_info; 492 493 hdmi_edid_data drv_hdmi_edid_capability_get(hdmi_edid_info *edid_info, hdmi_sink_capability **capability); 494 495 hi_s32 drv_hdmi_edid_raw_get(hdmi_edid_info *edid_info, hi_u8 *raw_data, hi_u32 len); 496 497 hi_s32 drv_hdmi_edid_update(hdmi_edid_info *edid_info, hdmi_edid_updata_mode mode); 498 499 hi_s32 dfrv_hdmi_edid_status_get(hdmi_edid_info *edid_info, hdmi_edid_status *status); 500 501 hi_s32 drv_hdmi_edid_reset(hdmi_edid_info *edid_info); 502 503 #endif /* __DRV_HDMI_EDID_H__ */ 504 505