1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * EVENT_LOG System Definitions 4 * 5 * This file describes the payloads of event log entries that are data buffers 6 * rather than formatted string entries. The contents are generally XTLVs. 7 * 8 * Copyright (C) 1999-2019, Broadcom. 9 * 10 * Unless you and Broadcom execute a separate written software license 11 * agreement governing use of this software, this software is licensed to you 12 * under the terms of the GNU General Public License version 2 (the "GPL"), 13 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 14 * following added to such license: 15 * 16 * As a special exception, the copyright holders of this software give you 17 * permission to link this software with independent modules, and to copy and 18 * distribute the resulting executable under terms of your choice, provided that 19 * you also meet, for each linked independent module, the terms and conditions of 20 * the license of that module. An independent module is a module which is not 21 * derived from this software. The special exception does not apply to any 22 * modifications of the software. 23 * 24 * Notwithstanding the above, under no circumstances may you combine this 25 * software in any way with any other Broadcom software provided under a license 26 * other than the GPL, without Broadcom's express prior written consent. 27 * 28 * 29 * <<Broadcom-WL-IPTag/Open:>> 30 * 31 * $Id: event_log_payload.h 825102 2019-06-12 22:26:41Z $ 32 */ 33 34 #ifndef _EVENT_LOG_PAYLOAD_H_ 35 #define _EVENT_LOG_PAYLOAD_H_ 36 37 #include <typedefs.h> 38 #include <bcmutils.h> 39 #include <ethernet.h> 40 #include <event_log_tag.h> 41 42 /** 43 * A (legacy) timestamp message 44 */ 45 typedef struct ts_message { 46 uint32 timestamp; 47 uint32 cyclecount; 48 } ts_msg_t; 49 50 /** 51 * Enhanced timestamp message 52 */ 53 typedef struct enhanced_ts_message { 54 uint32 version; 55 /* More data, depending on version */ 56 uint8 data[]; 57 } ets_msg_t; 58 59 #define ENHANCED_TS_MSG_VERSION_1 (1u) 60 61 /** 62 * Enhanced timestamp message, version 1 63 */ 64 typedef struct enhanced_ts_message_v1 { 65 uint32 version; 66 uint32 timestamp; /* PMU time, in milliseconds */ 67 uint32 cyclecount; 68 uint32 cpu_freq; 69 } ets_msg_v1_t; 70 71 #define EVENT_LOG_XTLV_ID_STR 0 /**< XTLV ID for a string */ 72 #define EVENT_LOG_XTLV_ID_TXQ_SUM 1 /**< XTLV ID for txq_summary_t */ 73 #define EVENT_LOG_XTLV_ID_SCBDATA_SUM 2 /**< XTLV ID for cb_subq_summary_t */ 74 #define EVENT_LOG_XTLV_ID_SCBDATA_AMPDU_TX_SUM 3 /**< XTLV ID for scb_ampdu_tx_summary_t */ 75 #define EVENT_LOG_XTLV_ID_BSSCFGDATA_SUM 4 /**< XTLV ID for bsscfg_q_summary_t */ 76 #define EVENT_LOG_XTLV_ID_UCTXSTATUS 5 /**< XTLV ID for ucode TxStatus array */ 77 #define EVENT_LOG_XTLV_ID_TXQ_SUM_V2 6 /**< XTLV ID for txq_summary_v2_t */ 78 79 /** 80 * An XTLV holding a string 81 * String is not null terminated, length is the XTLV len. 82 */ 83 typedef struct xtlv_string { 84 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_STR */ 85 uint16 len; /* XTLV Len (String length) */ 86 char str[1]; /* var len array characters */ 87 } xtlv_string_t; 88 89 #define XTLV_STRING_FULL_LEN(str_len) (BCM_XTLV_HDR_SIZE + (str_len) * sizeof(char)) 90 91 /** 92 * Summary for a single TxQ context 93 * Two of these will be used per TxQ context---one for the high TxQ, and one for 94 * the low txq that contains DMA prepared pkts. The high TxQ is a full multi-precidence 95 * queue and also has a BSSCFG map to identify the BSSCFGS associated with the queue context. 96 * The low txq counterpart does not populate the BSSCFG map. 97 * The excursion queue will have no bsscfgs associated and is the first queue dumped. 98 */ 99 typedef struct txq_summary { 100 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_TXQ_SUM */ 101 uint16 len; /* XTLV Len */ 102 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */ 103 uint32 stopped; /* flow control bitmap */ 104 uint8 prec_count; /* count of precedences/fifos and len of following array */ 105 uint8 pad; 106 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 107 } txq_summary_t; 108 109 #define TXQ_SUMMARY_LEN (OFFSETOF(txq_summary_t, plen)) 110 #define TXQ_SUMMARY_FULL_LEN(num_q) (TXQ_SUMMARY_LEN + (num_q) * sizeof(uint16)) 111 112 typedef struct txq_summary_v2 { 113 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_TXQ_SUM_V2 */ 114 uint16 len; /* XTLV Len */ 115 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */ 116 uint32 stopped; /* flow control bitmap */ 117 uint32 hw_stopped; /* flow control bitmap */ 118 uint8 prec_count; /* count of precedences/fifos and len of following array */ 119 uint8 pad; 120 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 121 } txq_summary_v2_t; 122 123 #define TXQ_SUMMARY_V2_LEN (OFFSETOF(txq_summary_v2_t, plen)) 124 #define TXQ_SUMMARY_V2_FULL_LEN(num_q) (TXQ_SUMMARY_V2_LEN + (num_q) * sizeof(uint16)) 125 126 /** 127 * Summary for tx datapath of an SCB cubby 128 * This is a generic summary structure (one size fits all) with 129 * a cubby ID and sub-ID to differentiate SCB cubby types and possible sub-queues. 130 */ 131 typedef struct scb_subq_summary { 132 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_SCBDATA_SUM */ 133 uint16 len; /* XTLV Len */ 134 uint32 flags; /* cubby specficic flags */ 135 uint8 cubby_id; /* ID registered for cubby */ 136 uint8 sub_id; /* sub ID if a cubby has more than one queue */ 137 uint8 prec_count; /* count of precedences/fifos and len of following array */ 138 uint8 pad; 139 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 140 } scb_subq_summary_t; 141 142 #define SCB_SUBQ_SUMMARY_LEN (OFFSETOF(scb_subq_summary_t, plen)) 143 #define SCB_SUBQ_SUMMARY_FULL_LEN(num_q) (SCB_SUBQ_SUMMARY_LEN + (num_q) * sizeof(uint16)) 144 145 /* scb_subq_summary_t.flags for APPS */ 146 #define SCBDATA_APPS_F_PS 0x00000001 147 #define SCBDATA_APPS_F_PSPEND 0x00000002 148 #define SCBDATA_APPS_F_INPVB 0x00000004 149 #define SCBDATA_APPS_F_APSD_USP 0x00000008 150 #define SCBDATA_APPS_F_TXBLOCK 0x00000010 151 #define SCBDATA_APPS_F_APSD_HPKT_TMR 0x00000020 152 #define SCBDATA_APPS_F_APSD_TX_PEND 0x00000040 153 #define SCBDATA_APPS_F_INTRANS 0x00000080 154 #define SCBDATA_APPS_F_OFF_PEND 0x00000100 155 #define SCBDATA_APPS_F_OFF_BLOCKED 0x00000200 156 #define SCBDATA_APPS_F_OFF_IN_PROG 0x00000400 157 158 /** 159 * Summary for tx datapath AMPDU SCB cubby 160 * This is a specific data structure to describe the AMPDU datapath state for an SCB 161 * used instead of scb_subq_summary_t. 162 * Info is for one TID, so one will be dumped per BA TID active for an SCB. 163 */ 164 typedef struct scb_ampdu_tx_summary { 165 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_SCBDATA_AMPDU_TX_SUM */ 166 uint16 len; /* XTLV Len */ 167 uint32 flags; /* misc flags */ 168 uint8 tid; /* initiator TID (priority) */ 169 uint8 ba_state; /* internal BA state */ 170 uint8 bar_cnt; /* number of bars sent with no progress */ 171 uint8 retry_bar; /* reason code if bar to be retried at watchdog */ 172 uint16 barpending_seq; /* seqnum for bar */ 173 uint16 bar_ackpending_seq; /* seqnum of bar for which ack is pending */ 174 uint16 start_seq; /* seqnum of the first unacknowledged packet */ 175 uint16 max_seq; /* max unacknowledged seqnum sent */ 176 uint32 released_bytes_inflight; /* Number of bytes pending in bytes */ 177 uint32 released_bytes_target; 178 } scb_ampdu_tx_summary_t; 179 180 /* scb_ampdu_tx_summary.flags defs */ 181 #define SCBDATA_AMPDU_TX_F_BAR_ACKPEND 0x00000001 /* bar_ackpending */ 182 183 /** XTLV stuct to summarize a BSSCFG's packet queue */ 184 typedef struct bsscfg_q_summary { 185 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_BSSCFGDATA_SUM */ 186 uint16 len; /* XTLV Len */ 187 struct ether_addr BSSID; /* BSSID */ 188 uint8 bsscfg_idx; /* bsscfg index */ 189 uint8 type; /* bsscfg type enumeration: BSSCFG_TYPE_XXX */ 190 uint8 subtype; /* bsscfg subtype enumeration: BSSCFG_SUBTYPE_XXX */ 191 uint8 prec_count; /* count of precedences/fifos and len of following array */ 192 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 193 } bsscfg_q_summary_t; 194 195 #define BSSCFG_Q_SUMMARY_LEN (OFFSETOF(bsscfg_q_summary_t, plen)) 196 #define BSSCFG_Q_SUMMARY_FULL_LEN(num_q) (BSSCFG_Q_SUMMARY_LEN + (num_q) * sizeof(uint16)) 197 198 /** 199 * An XTLV holding a TxStats array 200 * TxStatus entries are 8 or 16 bytes, size in words (2 or 4) givent in 201 * entry_size field. 202 * Array is uint32 words 203 */ 204 typedef struct xtlv_uc_txs { 205 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_UCTXSTATUS */ 206 uint16 len; /* XTLV Len */ 207 uint8 entry_size; /* num uint32 words per entry */ 208 uint8 pad[3]; /* reserved, zero */ 209 uint32 w[1]; /* var len array of words */ 210 } xtlv_uc_txs_t; 211 212 #define XTLV_UCTXSTATUS_LEN (OFFSETOF(xtlv_uc_txs_t, w)) 213 #define XTLV_UCTXSTATUS_FULL_LEN(words) (XTLV_UCTXSTATUS_LEN + (words) * sizeof(uint32)) 214 215 #define SCAN_SUMMARY_VERSION 1 216 /* Scan flags */ 217 #define SCAN_SUM_CHAN_INFO 0x1 218 /* Scan_sum flags */ 219 #define BAND5G_SIB_ENAB 0x2 220 #define BAND2G_SIB_ENAB 0x4 221 #define PARALLEL_SCAN 0x8 222 #define SCAN_ABORT 0x10 223 #define SC_LOWSPAN_SCAN 0x20 224 #define SC_SCAN 0x40 225 226 /* scan_channel_info flags */ 227 #define ACTIVE_SCAN_SCN_SUM 0x2 228 #define SCAN_SUM_WLC_CORE0 0x4 229 #define SCAN_SUM_WLC_CORE1 0x8 230 #define HOME_CHAN 0x10 231 #define SCAN_SUM_SCAN_CORE 0x20 232 233 typedef struct wl_scan_ssid_info 234 { 235 uint8 ssid_len; /* the length of SSID */ 236 uint8 ssid[32]; /* SSID string */ 237 } wl_scan_ssid_info_t; 238 239 typedef struct wl_scan_channel_info { 240 uint16 chanspec; /* chanspec scanned */ 241 uint16 reserv; 242 uint32 start_time; /* Scan start time in 243 * milliseconds for the chanspec 244 * or home_dwell time start 245 */ 246 uint32 end_time; /* Scan end time in 247 * milliseconds for the chanspec 248 * or home_dwell time end 249 */ 250 uint16 probe_count; /* No of probes sent out. For future use 251 */ 252 uint16 scn_res_count; /* Count of scan_results found per 253 * channel. For future use 254 */ 255 } wl_scan_channel_info_t; 256 257 typedef struct wl_scan_summary_info { 258 uint32 total_chan_num; /* Total number of channels scanned */ 259 uint32 scan_start_time; /* Scan start time in milliseconds */ 260 uint32 scan_end_time; /* Scan end time in milliseconds */ 261 wl_scan_ssid_info_t ssid[1]; /* SSID being scanned in current 262 * channel. For future use 263 */ 264 } wl_scan_summary_info_t; 265 266 struct wl_scan_summary { 267 uint8 version; /* Version */ 268 uint8 reserved; 269 uint16 len; /* Length of the data buffer including SSID 270 * list. 271 */ 272 uint16 sync_id; /* Scan Sync ID */ 273 uint16 scan_flags; /* flags [0] or SCAN_SUM_CHAN_INFO = */ 274 /* channel_info, if not set */ 275 /* it is scan_summary_info */ 276 /* when channel_info is used, */ 277 /* the following flag bits are overridden: */ 278 /* flags[1] or ACTIVE_SCAN_SCN_SUM = active channel if set */ 279 /* passive if not set */ 280 /* flags[2] or WLC_CORE0 = if set, represents wlc_core0 */ 281 /* flags[3] or WLC_CORE1 = if set, represents wlc_core1 */ 282 /* flags[4] or HOME_CHAN = if set, represents home-channel */ 283 /* flags[5:15] = reserved */ 284 /* when scan_summary_info is used, */ 285 /* the following flag bits are used: */ 286 /* flags[1] or BAND5G_SIB_ENAB = */ 287 /* allowSIBParallelPassiveScan on 5G band */ 288 /* flags[2] or BAND2G_SIB_ENAB = */ 289 /* allowSIBParallelPassiveScan on 2G band */ 290 /* flags[3] or PARALLEL_SCAN = Parallel scan enabled or not */ 291 /* flags[4] or SCAN_ABORT = SCAN_ABORTED scenario */ 292 /* flags[5:15] = reserved */ 293 union { 294 wl_scan_channel_info_t scan_chan_info; /* scan related information 295 * for each channel scanned 296 */ 297 wl_scan_summary_info_t scan_sum_info; /* Cumulative scan related 298 * information. 299 */ 300 } u; 301 }; 302 303 /* Channel switch log record structure 304 * Host may map the following structure on channel switch event log record 305 * received from dongle. Note that all payload entries in event log record are 306 * uint32/int32. 307 */ 308 typedef struct wl_chansw_event_log_record { 309 uint32 time; /* Time in us */ 310 uint32 old_chanspec; /* Old channel spec */ 311 uint32 new_chanspec; /* New channel spec */ 312 uint32 chansw_reason; /* Reason for channel change */ 313 int32 dwell_time; 314 } wl_chansw_event_log_record_t; 315 316 typedef struct wl_chansw_event_log_record_v2 { 317 uint32 time; /* Time in us */ 318 uint32 old_chanspec; /* Old channel spec */ 319 uint32 new_chanspec; /* New channel spec */ 320 uint32 chansw_reason; /* Reason for channel change */ 321 int32 dwell_time; 322 uint32 core; 323 int32 phychanswtime; /* channel switch time */ 324 } wl_chansw_event_log_record_v2_t; 325 326 /* Sub-block type for EVENT_LOG_TAG_AMPDU_DUMP */ 327 typedef enum { 328 WL_AMPDU_STATS_TYPE_RXMCSx1 = 0, /* RX MCS rate (Nss = 1) */ 329 WL_AMPDU_STATS_TYPE_RXMCSx2 = 1, 330 WL_AMPDU_STATS_TYPE_RXMCSx3 = 2, 331 WL_AMPDU_STATS_TYPE_RXMCSx4 = 3, 332 WL_AMPDU_STATS_TYPE_RXVHTx1 = 4, /* RX VHT rate (Nss = 1) */ 333 WL_AMPDU_STATS_TYPE_RXVHTx2 = 5, 334 WL_AMPDU_STATS_TYPE_RXVHTx3 = 6, 335 WL_AMPDU_STATS_TYPE_RXVHTx4 = 7, 336 WL_AMPDU_STATS_TYPE_TXMCSx1 = 8, /* TX MCS rate (Nss = 1) */ 337 WL_AMPDU_STATS_TYPE_TXMCSx2 = 9, 338 WL_AMPDU_STATS_TYPE_TXMCSx3 = 10, 339 WL_AMPDU_STATS_TYPE_TXMCSx4 = 11, 340 WL_AMPDU_STATS_TYPE_TXVHTx1 = 12, /* TX VHT rate (Nss = 1) */ 341 WL_AMPDU_STATS_TYPE_TXVHTx2 = 13, 342 WL_AMPDU_STATS_TYPE_TXVHTx3 = 14, 343 WL_AMPDU_STATS_TYPE_TXVHTx4 = 15, 344 WL_AMPDU_STATS_TYPE_RXMCSSGI = 16, /* RX SGI usage (for all MCS rates) */ 345 WL_AMPDU_STATS_TYPE_TXMCSSGI = 17, /* TX SGI usage (for all MCS rates) */ 346 WL_AMPDU_STATS_TYPE_RXVHTSGI = 18, /* RX SGI usage (for all VHT rates) */ 347 WL_AMPDU_STATS_TYPE_TXVHTSGI = 19, /* TX SGI usage (for all VHT rates) */ 348 WL_AMPDU_STATS_TYPE_RXMCSPER = 20, /* RX PER (for all MCS rates) */ 349 WL_AMPDU_STATS_TYPE_TXMCSPER = 21, /* TX PER (for all MCS rates) */ 350 WL_AMPDU_STATS_TYPE_RXVHTPER = 22, /* RX PER (for all VHT rates) */ 351 WL_AMPDU_STATS_TYPE_TXVHTPER = 23, /* TX PER (for all VHT rates) */ 352 WL_AMPDU_STATS_TYPE_RXDENS = 24, /* RX AMPDU density */ 353 WL_AMPDU_STATS_TYPE_TXDENS = 25, /* TX AMPDU density */ 354 WL_AMPDU_STATS_TYPE_RXMCSOK = 26, /* RX all MCS rates */ 355 WL_AMPDU_STATS_TYPE_RXVHTOK = 27, /* RX all VHT rates */ 356 WL_AMPDU_STATS_TYPE_TXMCSALL = 28, /* TX all MCS rates */ 357 WL_AMPDU_STATS_TYPE_TXVHTALL = 29, /* TX all VHT rates */ 358 WL_AMPDU_STATS_TYPE_TXMCSOK = 30, /* TX all MCS rates */ 359 WL_AMPDU_STATS_TYPE_TXVHTOK = 31, /* TX all VHT rates */ 360 WL_AMPDU_STATS_TYPE_RX_HE_SUOK = 32, /* DL SU MPDU frame per MCS */ 361 WL_AMPDU_STATS_TYPE_RX_HE_SU_DENS = 33, /* DL SU AMPDU DENSITY */ 362 WL_AMPDU_STATS_TYPE_RX_HE_MUMIMOOK = 34, /* DL MUMIMO Frame per MCS */ 363 WL_AMPDU_STATS_TYPE_RX_HE_MUMIMO_DENS = 35, /* DL MUMIMO AMPDU Density */ 364 WL_AMPDU_STATS_TYPE_RX_HE_DLOFDMAOK = 36, /* DL OFDMA Frame per MCS */ 365 WL_AMPDU_STATS_TYPE_RX_HE_DLOFDMA_DENS = 37, /* DL OFDMA AMPDU Density */ 366 WL_AMPDU_STATS_TYPE_RX_HE_DLOFDMA_HIST = 38, /* DL OFDMA frame RU histogram */ 367 WL_AMPDU_STATS_TYPE_TX_HE_MCSALL = 39, /* TX HE (SU+MU) frames, all rates */ 368 WL_AMPDU_STATS_TYPE_TX_HE_MCSOK = 40, /* TX HE (SU+MU) frames succeeded */ 369 WL_AMPDU_STATS_TYPE_TX_HE_MUALL = 41, /* TX MU (UL OFDMA) frames all rates */ 370 WL_AMPDU_STATS_TYPE_TX_HE_MUOK = 42, /* TX MU (UL OFDMA) frames succeeded */ 371 WL_AMPDU_STATS_TYPE_TX_HE_RUBW = 43, /* TX UL RU by BW histogram */ 372 WL_AMPDU_STATS_TYPE_TX_HE_PADDING = 44, /* TX padding total (single value) */ 373 WL_AMPDU_STATS_MAX_CNTS = 64 374 } wl_ampdu_stat_enum_t; 375 typedef struct { 376 uint16 type; /* AMPDU statistics sub-type */ 377 uint16 len; /* Number of 32-bit counters */ 378 uint32 counters[WL_AMPDU_STATS_MAX_CNTS]; 379 } wl_ampdu_stats_generic_t; 380 381 typedef wl_ampdu_stats_generic_t wl_ampdu_stats_rx_t; 382 typedef wl_ampdu_stats_generic_t wl_ampdu_stats_tx_t; 383 384 typedef struct { 385 uint16 type; /* AMPDU statistics sub-type */ 386 uint16 len; /* Number of 32-bit counters + 2 */ 387 uint32 total_ampdu; 388 uint32 total_mpdu; 389 uint32 aggr_dist[WL_AMPDU_STATS_MAX_CNTS + 1]; 390 } wl_ampdu_stats_aggrsz_t; 391 392 /* Sub-block type for WL_IFSTATS_XTLV_HE_TXMU_STATS */ 393 typedef enum { 394 /* Reserve 0 to avoid potential concerns */ 395 WL_HE_TXMU_STATS_TYPE_TIME = 1, /* per-dBm, total usecs transmitted */ 396 WL_HE_TXMU_STATS_TYPE_PAD_TIME = 2, /* per-dBm, padding usecs transmitted */ 397 } wl_he_txmu_stat_enum_t; 398 #define WL_IFSTATS_HE_TXMU_MAX 32u 399 400 /* Sub-block type for EVENT_LOG_TAG_MSCHPROFILE */ 401 #define WL_MSCH_PROFILER_START 0 /* start event check */ 402 #define WL_MSCH_PROFILER_EXIT 1 /* exit event check */ 403 #define WL_MSCH_PROFILER_REQ 2 /* request event */ 404 #define WL_MSCH_PROFILER_CALLBACK 3 /* call back event */ 405 #define WL_MSCH_PROFILER_MESSAGE 4 /* message event */ 406 #define WL_MSCH_PROFILER_PROFILE_START 5 407 #define WL_MSCH_PROFILER_PROFILE_END 6 408 #define WL_MSCH_PROFILER_REQ_HANDLE 7 409 #define WL_MSCH_PROFILER_REQ_ENTITY 8 410 #define WL_MSCH_PROFILER_CHAN_CTXT 9 411 #define WL_MSCH_PROFILER_EVENT_LOG 10 412 #define WL_MSCH_PROFILER_REQ_TIMING 11 413 #define WL_MSCH_PROFILER_TYPE_MASK 0x00ff 414 #define WL_MSCH_PROFILER_WLINDEX_SHIFT 8 415 #define WL_MSCH_PROFILER_WLINDEX_MASK 0x0f00 416 #define WL_MSCH_PROFILER_VER_SHIFT 12 417 #define WL_MSCH_PROFILER_VER_MASK 0xf000 418 419 /* MSCH Event data current verion */ 420 #define WL_MSCH_PROFILER_VER 2 421 422 /* msch version history */ 423 #define WL_MSCH_PROFILER_RSDB_VER 1 424 #define WL_MSCH_PROFILER_REPORT_VER 2 425 426 /* msch collect header size */ 427 #define WL_MSCH_PROFILE_HEAD_SIZE OFFSETOF(msch_collect_tlv_t, value) 428 429 /* msch event log header size */ 430 #define WL_MSCH_EVENT_LOG_HEAD_SIZE OFFSETOF(msch_event_log_profiler_event_data_t, data) 431 432 /* MSCH data buffer size */ 433 #define WL_MSCH_PROFILER_BUFFER_SIZE 512 434 435 /* request type used in wlc_msch_req_param_t struct */ 436 #define WL_MSCH_RT_BOTH_FIXED 0 /* both start and end time is fixed */ 437 #define WL_MSCH_RT_START_FLEX 1 /* start time is flexible and duration is fixed */ 438 #define WL_MSCH_RT_DUR_FLEX 2 /* start time is fixed and end time is flexible */ 439 #define WL_MSCH_RT_BOTH_FLEX 3 /* Both start and duration is flexible */ 440 441 /* Flags used in wlc_msch_req_param_t struct */ 442 #define WL_MSCH_REQ_FLAGS_CHAN_CONTIGUOUS (1 << 0) /* Don't break up channels in chanspec_list */ 443 #define WL_MSCH_REQ_FLAGS_MERGE_CONT_SLOTS (1 << 1) /* No slot end if slots are continous */ 444 #define WL_MSCH_REQ_FLAGS_PREMTABLE (1 << 2) /* Req can be pre-empted by PREMT_CURTS req */ 445 #define WL_MSCH_REQ_FLAGS_PREMT_CURTS (1 << 3) /* Pre-empt request at the end of curts */ 446 #define WL_MSCH_REQ_FLAGS_PREMT_IMMEDIATE (1 << 4) /* Pre-empt cur_ts immediately */ 447 448 /* Requested slot Callback states 449 * req->pend_slot/cur_slot->flags 450 */ 451 #define WL_MSCH_RC_FLAGS_ONCHAN_FIRE (1 << 0) 452 #define WL_MSCH_RC_FLAGS_START_FIRE_DONE (1 << 1) 453 #define WL_MSCH_RC_FLAGS_END_FIRE_DONE (1 << 2) 454 #define WL_MSCH_RC_FLAGS_ONFIRE_DONE (1 << 3) 455 #define WL_MSCH_RC_FLAGS_SPLIT_SLOT_START (1 << 4) 456 #define WL_MSCH_RC_FLAGS_SPLIT_SLOT_END (1 << 5) 457 #define WL_MSCH_RC_FLAGS_PRE_ONFIRE_DONE (1 << 6) 458 459 /* Request entity flags */ 460 #define WL_MSCH_ENTITY_FLAG_MULTI_INSTANCE (1 << 0) 461 462 /* Request Handle flags */ 463 #define WL_MSCH_REQ_HDL_FLAGS_NEW_REQ (1 << 0) /* req_start callback */ 464 465 /* MSCH state flags (msch_info->flags) */ 466 #define WL_MSCH_STATE_IN_TIEMR_CTXT 0x1 467 #define WL_MSCH_STATE_SCHD_PENDING 0x2 468 469 /* MSCH callback type */ 470 #define WL_MSCH_CT_REQ_START 0x1 471 #define WL_MSCH_CT_ON_CHAN 0x2 472 #define WL_MSCH_CT_SLOT_START 0x4 473 #define WL_MSCH_CT_SLOT_END 0x8 474 #define WL_MSCH_CT_SLOT_SKIP 0x10 475 #define WL_MSCH_CT_OFF_CHAN 0x20 476 #define WL_MSCH_CT_OFF_CHAN_DONE 0x40 477 #define WL_MSCH_CT_REQ_END 0x80 478 #define WL_MSCH_CT_PARTIAL 0x100 479 #define WL_MSCH_CT_PRE_ONCHAN 0x200 480 #define WL_MSCH_CT_PRE_REQ_START 0x400 481 482 /* MSCH command bits */ 483 #define WL_MSCH_CMD_ENABLE_BIT 0x01 484 #define WL_MSCH_CMD_PROFILE_BIT 0x02 485 #define WL_MSCH_CMD_CALLBACK_BIT 0x04 486 #define WL_MSCH_CMD_REGISTER_BIT 0x08 487 #define WL_MSCH_CMD_ERROR_BIT 0x10 488 #define WL_MSCH_CMD_DEBUG_BIT 0x20 489 #define WL_MSCH_CMD_INFOM_BIT 0x40 490 #define WL_MSCH_CMD_TRACE_BIT 0x80 491 #define WL_MSCH_CMD_ALL_BITS 0xfe 492 #define WL_MSCH_CMD_SIZE_MASK 0x00ff0000 493 #define WL_MSCH_CMD_SIZE_SHIFT 16 494 #define WL_MSCH_CMD_VER_MASK 0xff000000 495 #define WL_MSCH_CMD_VER_SHIFT 24 496 497 /* maximum channels returned by the get valid channels iovar */ 498 #define WL_MSCH_NUMCHANNELS 64 499 500 typedef struct msch_collect_tlv { 501 uint16 type; 502 uint16 size; 503 char value[1]; 504 } msch_collect_tlv_t; 505 506 typedef struct msch_profiler_event_data { 507 uint32 time_lo; /* Request time */ 508 uint32 time_hi; 509 } msch_profiler_event_data_t; 510 511 typedef struct msch_start_profiler_event_data { 512 uint32 time_lo; /* Request time */ 513 uint32 time_hi; 514 uint32 status; 515 } msch_start_profiler_event_data_t; 516 517 typedef struct msch_message_profiler_event_data { 518 uint32 time_lo; /* Request time */ 519 uint32 time_hi; 520 char message[1]; /* message */ 521 } msch_message_profiler_event_data_t; 522 523 typedef struct msch_event_log_profiler_event_data { 524 uint32 time_lo; /* Request time */ 525 uint32 time_hi; 526 event_log_hdr_t hdr; /* event log header */ 527 uint32 data[9]; /* event data */ 528 } msch_event_log_profiler_event_data_t; 529 530 typedef struct msch_req_param_profiler_event_data { 531 uint16 flags; /* Describe various request properties */ 532 uint8 req_type; /* Describe start and end time flexiblilty */ 533 uint8 priority; /* Define the request priority */ 534 uint32 start_time_l; /* Requested start time offset in us unit */ 535 uint32 start_time_h; 536 uint32 duration; /* Requested duration in us unit */ 537 uint32 interval; /* Requested periodic interval in us unit, 538 * 0 means non-periodic 539 */ 540 union { 541 uint32 dur_flex; /* MSCH_REG_DUR_FLEX, min_dur = duration - dur_flex */ 542 struct { 543 uint32 min_dur; /* min duration for traffic, maps to home_time */ 544 uint32 max_away_dur; /* max acceptable away dur, maps to home_away_time */ 545 uint32 hi_prio_time_l; 546 uint32 hi_prio_time_h; 547 uint32 hi_prio_interval; /* repeated high priority interval */ 548 } bf; 549 } flex; 550 } msch_req_param_profiler_event_data_t; 551 552 typedef struct msch_req_timing_profiler_event_data { 553 uint32 p_req_timing; 554 uint32 p_prev; 555 uint32 p_next; 556 uint16 flags; 557 uint16 timeslot_ptr; 558 uint32 fire_time_l; 559 uint32 fire_time_h; 560 uint32 pre_start_time_l; 561 uint32 pre_start_time_h; 562 uint32 start_time_l; 563 uint32 start_time_h; 564 uint32 end_time_l; 565 uint32 end_time_h; 566 uint32 p_timeslot; 567 } msch_req_timing_profiler_event_data_t; 568 569 typedef struct msch_chan_ctxt_profiler_event_data { 570 uint32 p_chan_ctxt; 571 uint32 p_prev; 572 uint32 p_next; 573 uint16 chanspec; 574 uint16 bf_sch_pending; 575 uint32 bf_link_prev; 576 uint32 bf_link_next; 577 uint32 onchan_time_l; 578 uint32 onchan_time_h; 579 uint32 actual_onchan_dur_l; 580 uint32 actual_onchan_dur_h; 581 uint32 pend_onchan_dur_l; 582 uint32 pend_onchan_dur_h; 583 uint16 req_entity_list_cnt; 584 uint16 req_entity_list_ptr; 585 uint16 bf_entity_list_cnt; 586 uint16 bf_entity_list_ptr; 587 uint32 bf_skipped_count; 588 } msch_chan_ctxt_profiler_event_data_t; 589 590 typedef struct msch_req_entity_profiler_event_data { 591 uint32 p_req_entity; 592 uint32 req_hdl_link_prev; 593 uint32 req_hdl_link_next; 594 uint32 chan_ctxt_link_prev; 595 uint32 chan_ctxt_link_next; 596 uint32 rt_specific_link_prev; 597 uint32 rt_specific_link_next; 598 uint32 start_fixed_link_prev; 599 uint32 start_fixed_link_next; 600 uint32 both_flex_list_prev; 601 uint32 both_flex_list_next; 602 uint16 chanspec; 603 uint16 priority; 604 uint16 cur_slot_ptr; 605 uint16 pend_slot_ptr; 606 uint16 pad; 607 uint16 chan_ctxt_ptr; 608 uint32 p_chan_ctxt; 609 uint32 p_req_hdl; 610 uint32 bf_last_serv_time_l; 611 uint32 bf_last_serv_time_h; 612 uint16 onchan_chn_idx; 613 uint16 cur_chn_idx; 614 uint32 flags; 615 uint32 actual_start_time_l; 616 uint32 actual_start_time_h; 617 uint32 curts_fire_time_l; 618 uint32 curts_fire_time_h; 619 } msch_req_entity_profiler_event_data_t; 620 621 typedef struct msch_req_handle_profiler_event_data { 622 uint32 p_req_handle; 623 uint32 p_prev; 624 uint32 p_next; 625 uint32 cb_func; 626 uint32 cb_ctxt; 627 uint16 req_param_ptr; 628 uint16 req_entity_list_cnt; 629 uint16 req_entity_list_ptr; 630 uint16 chan_cnt; 631 uint32 flags; 632 uint16 chanspec_list; 633 uint16 chanspec_cnt; 634 uint16 chan_idx; 635 uint16 last_chan_idx; 636 uint32 req_time_l; 637 uint32 req_time_h; 638 } msch_req_handle_profiler_event_data_t; 639 640 typedef struct msch_profiler_profiler_event_data { 641 uint32 time_lo; /* Request time */ 642 uint32 time_hi; 643 uint32 free_req_hdl_list; 644 uint32 free_req_entity_list; 645 uint32 free_chan_ctxt_list; 646 uint32 free_chanspec_list; 647 uint16 cur_msch_timeslot_ptr; 648 uint16 next_timeslot_ptr; 649 uint32 p_cur_msch_timeslot; 650 uint32 p_next_timeslot; 651 uint32 cur_armed_timeslot; 652 uint32 flags; 653 uint32 ts_id; 654 uint32 service_interval; 655 uint32 max_lo_prio_interval; 656 uint16 flex_list_cnt; 657 uint16 msch_chanspec_alloc_cnt; 658 uint16 msch_req_entity_alloc_cnt; 659 uint16 msch_req_hdl_alloc_cnt; 660 uint16 msch_chan_ctxt_alloc_cnt; 661 uint16 msch_timeslot_alloc_cnt; 662 uint16 msch_req_hdl_list_cnt; 663 uint16 msch_req_hdl_list_ptr; 664 uint16 msch_chan_ctxt_list_cnt; 665 uint16 msch_chan_ctxt_list_ptr; 666 uint16 msch_req_timing_list_cnt; 667 uint16 msch_req_timing_list_ptr; 668 uint16 msch_start_fixed_list_cnt; 669 uint16 msch_start_fixed_list_ptr; 670 uint16 msch_both_flex_req_entity_list_cnt; 671 uint16 msch_both_flex_req_entity_list_ptr; 672 uint16 msch_start_flex_list_cnt; 673 uint16 msch_start_flex_list_ptr; 674 uint16 msch_both_flex_list_cnt; 675 uint16 msch_both_flex_list_ptr; 676 uint32 slotskip_flag; 677 } msch_profiler_profiler_event_data_t; 678 679 typedef struct msch_req_profiler_event_data { 680 uint32 time_lo; /* Request time */ 681 uint32 time_hi; 682 uint16 chanspec_cnt; 683 uint16 chanspec_ptr; 684 uint16 req_param_ptr; 685 uint16 pad; 686 } msch_req_profiler_event_data_t; 687 688 typedef struct msch_callback_profiler_event_data { 689 uint32 time_lo; /* Request time */ 690 uint32 time_hi; 691 uint16 type; /* callback type */ 692 uint16 chanspec; /* actual chanspec, may different with requested one */ 693 uint32 start_time_l; /* time slot start time low 32bit */ 694 uint32 start_time_h; /* time slot start time high 32bit */ 695 uint32 end_time_l; /* time slot end time low 32 bit */ 696 uint32 end_time_h; /* time slot end time high 32 bit */ 697 uint32 timeslot_id; /* unique time slot id */ 698 uint32 p_req_hdl; 699 uint32 onchan_idx; /* Current channel index */ 700 uint32 cur_chan_seq_start_time_l; /* start time of current sequence */ 701 uint32 cur_chan_seq_start_time_h; 702 } msch_callback_profiler_event_data_t; 703 704 typedef struct msch_timeslot_profiler_event_data { 705 uint32 p_timeslot; 706 uint32 timeslot_id; 707 uint32 pre_start_time_l; 708 uint32 pre_start_time_h; 709 uint32 end_time_l; 710 uint32 end_time_h; 711 uint32 sch_dur_l; 712 uint32 sch_dur_h; 713 uint32 p_chan_ctxt; 714 uint32 fire_time_l; 715 uint32 fire_time_h; 716 uint32 state; 717 } msch_timeslot_profiler_event_data_t; 718 719 typedef struct msch_register_params { 720 uint16 wlc_index; /* Optional wlc index */ 721 uint16 flags; /* Describe various request properties */ 722 uint32 req_type; /* Describe start and end time flexiblilty */ 723 uint16 id; /* register id */ 724 uint16 priority; /* Define the request priority */ 725 uint32 start_time; /* Requested start time offset in ms unit */ 726 uint32 duration; /* Requested duration in ms unit */ 727 uint32 interval; /* Requested periodic interval in ms unit, 728 * 0 means non-periodic 729 */ 730 uint32 dur_flex; /* MSCH_REG_DUR_FLEX, min_dur = duration - dur_flex */ 731 uint32 min_dur; /* min duration for traffic, maps to home_time */ 732 uint32 max_away_dur; /* max acceptable away dur, maps to home_away_time */ 733 uint32 hi_prio_time; 734 uint32 hi_prio_interval; /* repeated high priority interval */ 735 uint32 chanspec_cnt; 736 uint16 chanspec_list[WL_MSCH_NUMCHANNELS]; 737 } msch_register_params_t; 738 739 typedef struct { 740 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 741 * Control Management (includes retransmissions) 742 */ 743 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 744 * expecting a response 745 */ 746 uint32 rxstrt; /**< number of received frames with a good PLCP */ 747 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 748 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 749 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 750 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 751 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 752 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 753 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 754 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 755 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 756 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 757 uint32 rxtoolate; /**< receive too late */ 758 uint32 goodfcs; /**< Good fcs counters */ 759 uint32 rxf0ovfl; /** < Rx FIFO0 overflow counters information */ 760 uint32 rxf1ovfl; /** < Rx FIFO1 overflow counters information */ 761 } phy_periodic_counters_v1_t; 762 763 typedef struct phycal_log_cmn { 764 uint16 chanspec; /* Current phy chanspec */ 765 uint8 last_cal_reason; /* Last Cal Reason */ 766 uint8 pad1; /* Padding byte to align with word */ 767 uint last_cal_time; /* Last cal time in sec */ 768 } phycal_log_cmn_t; 769 770 typedef struct phycal_log_core { 771 uint16 ofdm_txa; /* OFDM Tx IQ Cal a coeff */ 772 uint16 ofdm_txb; /* OFDM Tx IQ Cal b coeff */ 773 uint16 ofdm_txd; /* contain di & dq */ 774 uint16 bphy_txa; /* BPHY Tx IQ Cal a coeff */ 775 uint16 bphy_txb; /* BPHY Tx IQ Cal b coeff */ 776 uint16 bphy_txd; /* contain di & dq */ 777 778 uint16 rxa; /* Rx IQ Cal A coeffecient */ 779 uint16 rxb; /* Rx IQ Cal B coeffecient */ 780 int32 rxs; /* FDIQ Slope coeffecient */ 781 782 uint8 baseidx; /* TPC Base index */ 783 uint8 adc_coeff_cap0_adcI; /* ADC CAP Cal Cap0 I */ 784 uint8 adc_coeff_cap1_adcI; /* ADC CAP Cal Cap1 I */ 785 uint8 adc_coeff_cap2_adcI; /* ADC CAP Cal Cap2 I */ 786 uint8 adc_coeff_cap0_adcQ; /* ADC CAP Cal Cap0 Q */ 787 uint8 adc_coeff_cap1_adcQ; /* ADC CAP Cal Cap1 Q */ 788 uint8 adc_coeff_cap2_adcQ; /* ADC CAP Cal Cap2 Q */ 789 uint8 pad; /* Padding byte to align with word */ 790 } phycal_log_core_t; 791 792 #define PHYCAL_LOG_VER1 (1u) 793 794 typedef struct phycal_log_v1 { 795 uint8 version; /* Logging structure version */ 796 uint8 numcores; /* Numbe of cores for which core specific data present */ 797 uint16 length; /* Length of the entire structure */ 798 phycal_log_cmn_t phycal_log_cmn; /* Logging common structure */ 799 /* This will be a variable length based on the numcores field defined above */ 800 phycal_log_core_t phycal_log_core[1]; 801 } phycal_log_v1_t; 802 803 typedef struct phy_periodic_log_cmn { 804 uint16 chanspec; /* Current phy chanspec */ 805 uint16 vbatmeas; /* Measured VBAT sense value */ 806 uint16 featureflag; /* Currently active feature flags */ 807 int8 chiptemp; /* Chip temparature */ 808 int8 femtemp; /* Fem temparature */ 809 810 uint32 nrate; /* Current Tx nrate */ 811 812 uint8 cal_phase_id; /* Current Multi phase cal ID */ 813 uint8 rxchain; /* Rx Chain */ 814 uint8 txchain; /* Tx Chain */ 815 uint8 ofdm_desense; /* OFDM desense */ 816 817 uint8 bphy_desense; /* BPHY desense */ 818 uint8 pll_lockstatus; /* PLL Lock status */ 819 uint8 pad1; /* Padding byte to align with word */ 820 uint8 pad2; /* Padding byte to align with word */ 821 822 uint32 duration; /**< millisecs spent sampling this channel */ 823 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 824 /**< move if cur bss moves channels) */ 825 uint32 congest_obss; /**< traffic not in our bss */ 826 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 827 828 } phy_periodic_log_cmn_t; 829 830 typedef struct phy_periodic_log_core { 831 uint8 baseindxval; /* TPC Base index */ 832 int8 tgt_pwr; /* Programmed Target power */ 833 int8 estpwradj; /* Current Est Power Adjust value */ 834 int8 crsmin_pwr; /* CRS Min/Noise power */ 835 int8 rssi_per_ant; /* RSSI Per antenna */ 836 int8 snr_per_ant; /* SNR Per antenna */ 837 int8 pad1; /* Padding byte to align with word */ 838 int8 pad2; /* Padding byte to align with word */ 839 } phy_periodic_log_core_t; 840 841 #define PHY_PERIODIC_LOG_VER1 (1u) 842 843 typedef struct phy_periodic_log_v1 { 844 uint8 version; /* Logging structure version */ 845 uint8 numcores; /* Numbe of cores for which core specific data present */ 846 uint16 length; /* Length of the entire structure */ 847 phy_periodic_log_cmn_t phy_perilog_cmn; 848 phy_periodic_counters_v1_t counters_peri_log; 849 /* This will be a variable length based on the numcores field defined above */ 850 phy_periodic_log_core_t phy_perilog_core[1]; 851 } phy_periodic_log_v1_t; 852 853 /* Note: The version 2 is reserved for 4357 only. Future chips must not use this version. */ 854 855 #define MAX_CORE_4357 (2u) 856 #define PHYCAL_LOG_VER2 (2u) 857 #define PHY_PERIODIC_LOG_VER2 (2u) 858 859 typedef struct { 860 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 861 * Control Management (includes retransmissions) 862 */ 863 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 864 * expecting a response 865 */ 866 uint32 rxstrt; /**< number of received frames with a good PLCP */ 867 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 868 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 869 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 870 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 871 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 872 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 873 uint32 rxf0ovfl; /** < Rx FIFO0 overflow counters information */ 874 uint32 rxf1ovfl; /** < Rx FIFO1 overflow counters information */ 875 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 876 uint32 rxtoolate; /**< receive too late */ 877 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 878 } phy_periodic_counters_v2_t; 879 880 /* Note: The version 2 is reserved for 4357 only. All future chips must not use this version. */ 881 882 typedef struct phycal_log_core_v2 { 883 uint16 ofdm_txa; /* OFDM Tx IQ Cal a coeff */ 884 uint16 ofdm_txb; /* OFDM Tx IQ Cal b coeff */ 885 uint16 ofdm_txd; /* contain di & dq */ 886 uint16 rxa; /* Rx IQ Cal A coeffecient */ 887 uint16 rxb; /* Rx IQ Cal B coeffecient */ 888 uint8 baseidx; /* TPC Base index */ 889 uint8 pad; 890 int32 rxs; /* FDIQ Slope coeffecient */ 891 } phycal_log_core_v2_t; 892 893 /* Note: The version 2 is reserved for 4357 only. All future chips must not use this version. */ 894 895 typedef struct phycal_log_v2 { 896 uint8 version; /* Logging structure version */ 897 uint16 length; /* Length of the entire structure */ 898 uint8 pad; 899 phycal_log_cmn_t phycal_log_cmn; /* Logging common structure */ 900 phycal_log_core_v2_t phycal_log_core[MAX_CORE_4357]; 901 } phycal_log_v2_t; 902 903 /* Note: The version 2 is reserved for 4357 only. All future chips must not use this version. */ 904 905 typedef struct phy_periodic_log_v2 { 906 uint8 version; /* Logging structure version */ 907 uint16 length; /* Length of the entire structure */ 908 uint8 pad; 909 phy_periodic_log_cmn_t phy_perilog_cmn; 910 phy_periodic_counters_v2_t counters_peri_log; 911 phy_periodic_log_core_t phy_perilog_core[MAX_CORE_4357]; 912 } phy_periodic_log_v2_t; 913 914 /* Event log payload for enhanced roam log */ 915 typedef enum { 916 ROAM_LOG_SCANSTART = 1, /* EVT log for roam scan start */ 917 ROAM_LOG_SCAN_CMPLT = 2, /* EVT log for roam scan completeted */ 918 ROAM_LOG_ROAM_CMPLT = 3, /* EVT log for roam done */ 919 ROAM_LOG_NBR_REQ = 4, /* EVT log for Neighbor REQ */ 920 ROAM_LOG_NBR_REP = 5, /* EVT log for Neighbor REP */ 921 ROAM_LOG_BCN_REQ = 6, /* EVT log for BCNRPT REQ */ 922 ROAM_LOG_BCN_REP = 7, /* EVT log for BCNRPT REP */ 923 PRSV_PERIODIC_ID_MAX 924 } prsv_periodic_id_enum_t; 925 926 typedef struct prsv_periodic_log_hdr { 927 uint8 version; 928 uint8 id; 929 uint16 length; 930 } prsv_periodic_log_hdr_t; 931 932 #define ROAM_LOG_VER_1 (1u) 933 #define ROAM_LOG_TRIG_VER (1u) 934 #define ROAM_SSID_LEN (32u) 935 typedef struct roam_log_trig_v1 { 936 prsv_periodic_log_hdr_t hdr; 937 int8 rssi; 938 uint8 current_cu; 939 uint8 pad[2]; 940 uint reason; 941 int result; 942 union { 943 struct { 944 uint rcvd_reason; 945 } prt_roam; 946 struct { 947 uint8 req_mode; 948 uint8 token; 949 uint16 nbrlist_size; 950 uint32 disassoc_dur; 951 uint32 validity_dur; 952 uint32 bss_term_dur; 953 } bss_trans; 954 }; 955 } roam_log_trig_v1_t; 956 957 #define ROAM_LOG_RPT_SCAN_LIST_SIZE 3 958 #define ROAM_LOG_INVALID_TPUT 0xFFFFFFFFu 959 typedef struct roam_scan_ap_info { 960 int8 rssi; 961 uint8 pad[3]; 962 uint32 score; 963 uint16 chanspec; 964 struct ether_addr addr; 965 uint32 estm_tput; 966 } roam_scan_ap_info_t; 967 968 typedef struct roam_log_scan_cmplt_v1 { 969 prsv_periodic_log_hdr_t hdr; 970 uint8 full_scan; 971 uint8 scan_count; 972 uint8 scan_list_size; 973 uint8 pad; 974 int32 score_delta; 975 roam_scan_ap_info_t cur_info; 976 roam_scan_ap_info_t scan_list[ROAM_LOG_RPT_SCAN_LIST_SIZE]; 977 } roam_log_scan_cmplt_v1_t; 978 979 typedef struct roam_log_cmplt_v1 { 980 prsv_periodic_log_hdr_t hdr; 981 uint status; 982 uint reason; 983 uint16 chanspec; 984 struct ether_addr addr; 985 uint8 pad[3]; 986 uint8 retry; 987 } roam_log_cmplt_v1_t; 988 989 typedef struct roam_log_nbrrep { 990 prsv_periodic_log_hdr_t hdr; 991 uint channel_num; 992 } roam_log_nbrrep_v1_t; 993 994 typedef struct roam_log_nbrreq { 995 prsv_periodic_log_hdr_t hdr; 996 uint token; 997 } roam_log_nbrreq_v1_t; 998 999 typedef struct roam_log_bcnrptreq { 1000 prsv_periodic_log_hdr_t hdr; 1001 int32 result; 1002 uint8 reg; 1003 uint8 channel; 1004 uint8 mode; 1005 uint8 bssid_wild; 1006 uint8 ssid_len; 1007 uint8 pad; 1008 uint16 duration; 1009 uint8 ssid[ROAM_SSID_LEN]; 1010 } roam_log_bcnrpt_req_v1_t; 1011 1012 typedef struct roam_log_bcnrptrep { 1013 prsv_periodic_log_hdr_t hdr; 1014 uint32 count; 1015 } roam_log_bcnrpt_rep_v1_t; 1016 1017 #endif /* _EVENT_LOG_PAYLOAD_H_ */ 1018