1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 * Description: HAL Layer Specifications. 15 */ 16 17 #ifndef HAL_COMMON_OPS_ROM_H 18 #define HAL_COMMON_OPS_ROM_H 19 20 /***************************************************************************** 21 1 头文件包含 22 *****************************************************************************/ 23 #include "oal_types_device_rom.h" 24 #include "wlan_spec_rom.h" 25 #include "wlan_types_rom.h" 26 #include "frw_ext_if_rom.h" 27 #include "wlan_msg_rom.h" 28 #include "hal_commom_ops_type_rom.h" 29 #include "hal_common_ops_device_rom.h" 30 #include "hal_ops_common_rom.h" 31 #ifdef __cplusplus 32 #if __cplusplus 33 extern "C" { 34 #endif 35 #endif 36 37 /* 支持最多32个配置点 */ 38 enum { 39 DCACHE_FLUSH_TX = 0, // 数据发送设置描述符 40 DCACHE_FLUSH_TX_ISR, // TX完成中断处理 41 DCACHE_FLUSH_TX_ISR_MSG, // TX完成中断消息处理 42 DCACHE_FLUSH_RX_ALLOC_DSCR, // RX分配描述符 43 DCACHE_FLUSH_ADD_DSCR, // 添加描述符 44 DCACHE_FLUSH_DRX_ISR, // RX数据帧中断 45 DCACHE_FLUSH_CRX_ISR, // RX管理帧中断 46 DCACHE_FLUSH_RX_ISR_MSG, // RX中断消息处理 47 DCACHE_FLUSH_BEACON, // BEACON帧发送 48 DCACHE_FLUSH_PROTECT, // 保护帧NULL data帧发送 49 DCACHE_FLUSH_COEX, // 蓝牙共存帧 50 DCACHE_FLUSH_QUEUE_CLEAR, // clear硬件队列 51 DCACHE_FLUSH_QUEUE_FLUSH, // FLUSH硬件队列 52 DCACHE_FLUSH_RECYCLE, // 流控算法回收描述符 53 DCACHE_FLUSH_BUTT 54 }; 55 56 /***************************************************************************** 57 7.2 基准接收描述符定义 58 *****************************************************************************/ 59 #pragma pack(push, 1) 60 typedef struct { 61 osal_u8 rts_count : 3; /* RTS的实际发送次数 */ 62 osal_u8 data_count : 3; /* DATA的实际发送次数 */ 63 osal_u8 resv : 2; 64 } hal_rank_alg_result_stru; 65 #pragma pack(pop) 66 67 typedef struct { 68 osal_u8 data_send_cnt; 69 osal_u8 rts_succ; 70 osal_u8 cts_failure; 71 osal_s8 last_ack_rssi; 72 osal_u8 mpdu_num; 73 osal_u8 error_mpdu_num; 74 osal_u8 last_rate_rank; 75 osal_u8 tid; 76 hal_tx_queue_type_enum_uint8 ac; 77 osal_u16 mpdu_len; 78 osal_u8 is_retried; 79 osal_u8 bandwidth; 80 osal_u8 sounding_mode; /* 表示该帧sounding类型 */ 81 osal_u8 status; /* 该帧的发送结果 */ 82 osal_u8 ampdu_enable; /* 表示该帧是否为AMPDU聚合帧 */ 83 osal_u16 origin_mpdu_lenth; /* mpdu长度 */ 84 osal_u8 last_tb_flag; /* tb发送的标记 */ 85 86 osal_u64 ampdu_result; 87 hal_channel_matrix_dsc_stru tx_dsc_chnl_matrix; /* 发送描述符中的信道矩阵信息 */ 88 hal_tx_ctrl_desc_rate_stru per_rate[HAL_TX_RATE_MAX_NUM]; 89 osal_u32 ampdu_length; 90 hal_tx_txop_tpc_stru tpc; 91 92 osal_u32 now_time_ms; 93 osal_u8 normal_pkt_num; 94 osal_u8 first_succ_cnt; /* 第一次发送速率级别成功的帧数 */ 95 osal_u8 first_fail_cnt; /* 第一次发送速率级别失败的帧数 */ 96 hal_rank_alg_result_stru rank_result[HAL_TX_RATE_MAX_NUM]; 97 } hal_tx_dscr_ctrl_one_param; 98 99 /***************************************************************************** 100 10.2 对外暴露的配置接口 101 *****************************************************************************/ 102 osal_void hal_set_sifs_resp_rate(oal_bool_enum_uint8 rate_restrict); 103 osal_void hh503_tx_init_dscr_queue(hal_to_dmac_device_stru *device); 104 osal_void hal_tx_ctrl_dscr_link(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr_prev, 105 hal_tx_dscr_stru *tx_dscr); 106 107 108 osal_void hal_get_tx_dscr_next(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr, 109 hal_tx_dscr_stru **tx_dscr_next); 110 osal_void hal_tx_ctrl_dscr_unlink(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 111 osal_u16 hal_tx_seqnum_get_dscr(hal_tx_dscr_stru *tx_dscr); 112 osal_u8 hal_tx_get_dscr_seqno_sw_generate(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 113 osal_void hal_tx_data_set_tsf(hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr, osal_u16 tsf); 114 115 osal_void hal_tx_set_dscr_seqno_sw_generate(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr, 116 osal_u8 sw_seqno_generate); 117 osal_void hal_tx_set_dscr_seq_ctl_hw_bypass(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr, 118 osal_u8 seq_ctl_hw_bypass); 119 osal_void hal_tx_set_dscr_tx_pn_hw_bypass(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr, 120 osal_u8 tx_pn_hw_bypass); 121 osal_u8 hal_tx_get_dscr_seq_ctl_hw_bypass(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 122 osal_u8 hal_tx_get_dscr_tx_pn_hw_bypass(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 123 osal_u8 hal_tx_get_dscr_mac_head_len(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 124 125 osal_void hal_tx_get_dscr_ctrl_one_param(const hal_to_dmac_device_stru *hal_device, const hal_tx_dscr_stru *tx_dscr, 126 hal_tx_dscr_ctrl_one_param *tx_dscr_one_param); 127 osal_void hal_tx_retry_clear_dscr(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 128 #ifdef _PRE_WLAN_FIT_BASED_REALTIME_CALI 129 osal_void hal_tx_set_pdet_en(const hal_to_dmac_device_stru *hal_device, 130 hal_tx_dscr_stru *tx_dscr, oal_bool_enum_uint8 pdet_en_flag); 131 osal_void hal_dyn_cali_tx_pow_ch_set(hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 132 osal_void hal_dyn_cali_tx_pa_ppa_swtich(oal_bool_enum_uint8 ppa_working); 133 osal_void hal_dyn_cali_al_tx_config_amend(hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 134 #endif 135 osal_void hal_tx_get_dscr_chiper_type(hal_tx_dscr_stru *tx_dscr, osal_u8 *chiper_type, osal_u8 *chiper_key_id); 136 137 osal_void hal_tx_put_dscr(hal_tx_queue_type_enum_uint8 tx_queue_type, hal_tx_dscr_stru *tx_dscr); 138 osal_u32 hal_get_tx_q_status(osal_u8 qnum); 139 osal_u32 hal_get_tx_q_status_empty(osal_u8 qnum); 140 osal_void hal_tx_ctrl_dscr_ampdu_info(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr, 141 hal_tx_ppdu_feature_stru *ppdu_feature); 142 osal_u32 hal_get_tx_multi_q_status(osal_void); 143 osal_void hal_rx_get_info_dscr(hal_to_dmac_device_stru *hal_device, 144 osal_u32 *rx_dscr, hal_rx_ctl_stru *rx_ctl, hal_rx_status_stru *rx_status, hal_rx_statistic_stru *rx_statistics); 145 osal_void hal_rx_record_frame_status_info(hal_to_dmac_device_stru *hal_device, 146 osal_u32 *rx_dscr, hal_rx_dscr_queue_id_enum_uint8 queue_id); 147 148 #ifdef _PRE_WLAN_RF_AUTOCALI 149 osal_void hh503_rf_cali_auto_switch(osal_u32 switch_mask); 150 osal_void hh503_rf_cali_auto_mea_done(osal_u8 freq, osal_u8 chn_idx, osal_u8 cali_type, osal_u8 cali_state); 151 #endif 152 153 osal_void hh503_set_sr_vfs_clear(osal_void); 154 osal_void hh503_set_psr_statistics_clear(osal_void); 155 osal_void hh503_set_sr_statistics_clear(osal_void); 156 osal_void hh503_set_psr_ctrl(oal_bool_enum_uint8 flag); 157 osal_void hh503_set_psrt_htc(osal_void); 158 osal_void hh503_set_psr_offset(osal_s32 offset); 159 osal_void hh503_set_bss_color_enable(oal_bool_enum_uint8 flag); 160 osal_void hh503_set_srg_pd_etc(osal_u32 pd, osal_u32 pw); 161 osal_void hh503_set_non_pd(osal_u32 pd, osal_u32 pw); 162 osal_void hh503_set_srg_ctrl(osal_void); 163 osal_void hh503_set_srg_partial_bssid_bitmap(osal_u32 bitmap_low, osal_u32 bitmap_high); 164 osal_void hh503_set_srg_bss_color_bitmap(osal_u32 bitmap_low, osal_u32 bitmap_high); 165 osal_void hh503_set_srg_ele_off(osal_void); 166 osal_void hh503_set_sr_ctrl(oal_bool_enum_uint8 flag); 167 osal_void hh503_color_rpt_clr(osal_void); 168 osal_void hh503_color_rpt_en(oal_bool_enum_uint8 flag); 169 osal_void hh503_color_area_get(mac_color_area_stru *color_area); 170 171 osal_void hh503_set_dev_support_11ax(hal_to_dmac_device_stru *hal_device, osal_u8 reg_value); 172 osal_void hh503_set_mac_backoff_delay(osal_u32 back_off_time); 173 osal_void hh503_set_mu_edca_lifetime(osal_u8 bk, osal_u8 be, osal_u8 vi, osal_u8 vo); 174 osal_void hh503_set_mu_edca_aifsn(osal_u8 bk, osal_u8 be, osal_u8 vi, osal_u8 vo); 175 osal_void hh503_set_mu_edca_func_en(osal_u8 bk, osal_u8 be, osal_u8 vi, osal_u8 vo); 176 osal_void hh503_close_mu_edca_func(osal_void); 177 osal_void hh503_set_affected_acs(osal_u8 affected_acs); 178 osal_void hh503_set_mu_edca_cw(osal_u8 ac_type, osal_u8 cwmax, osal_u8 cwmin); 179 osal_void hh503_set_bss_color(const hal_to_dmac_vap_stru *hal_vap, osal_u8 bss_color); 180 osal_void hh503_set_partial_bss_color(const hal_to_dmac_vap_stru *hal_vap, osal_u8 partial_bss_color); 181 osal_void hh503_set_phy_aid(osal_u16 aid); 182 osal_void hh503_set_queue_size_in_ac(osal_u32 queue_size, osal_u8 vap_id, osal_u16 ac_order); 183 osal_void hh503_set_ndp_status(osal_u8 status); 184 185 osal_void hh503_vap_set_twt(const hal_to_dmac_vap_stru *hal_vap, const twt_reg_param_stru *twt_param, 186 osal_u8 count, osal_u8 trigger); 187 osal_void hh503_cali_twt(const hal_to_dmac_vap_stru *hal_vap); 188 osal_void hal_vap_set_multi_bssid(osal_u8 *trans_bssid, osal_u8 maxbssid_indicator); 189 osal_void hh503_set_he_rom_en(oal_bool_enum_uint8 rx_om); 190 191 osal_void hh503_set_machw_rx_buff_addr(osal_u32 rx_dscr, hal_rx_dscr_queue_id_enum_uint8 queue_num); 192 osal_u8 hal_set_machw_rx_buff_addr_sync(hal_to_dmac_device_stru *hal_device, 193 osal_u32 *rx_dscr, hal_rx_dscr_queue_id_enum_uint8 queue_num); 194 osal_void hal_rx_add_dscr(hal_to_dmac_device_stru *hal_device, hal_rx_dscr_queue_id_enum_uint8 queue_num); 195 osal_void hal_rx_pre_add_dscr(hal_to_dmac_device_stru *hal_device, hal_rx_dscr_queue_id_enum_uint8 queue_num, 196 osal_u16 add_num); 197 osal_void hh503_rx_update_dscr(hal_to_dmac_device_stru *hal_device, hal_rx_dscr_queue_id_enum_uint8 queue_num); 198 osal_void hal_rx_recycling_dscr(hal_to_dmac_device_stru *hal_device, hal_rx_dscr_queue_id_enum_uint8 queue_num, 199 osal_u16 dscr_thr); 200 oal_bool_enum_uint8 hal_is_machw_enabled(osal_void); 201 osal_void hh503_set_machw_tx_suspend(osal_void); 202 osal_void hal_set_machw_tx_resume(osal_void); 203 osal_void hh503_reset_phy_machw(hal_reset_hw_type_enum_uint8 type, osal_u8 sub_mod, osal_u8 reset_phy_reg, 204 osal_u8 reset_mac_reg); 205 osal_void hal_initialize_machw(osal_void); 206 osal_u8 hal_set_machw_phy_adc_freq(hal_to_dmac_device_stru *hal_device, 207 wlan_channel_bandwidth_enum_uint8 bandwidth); 208 osal_void hal_set_rx_multi_ant(const hal_to_dmac_device_stru *hal_device, osal_u8 phy_chain); 209 210 osal_void hh503_set_tx_sequence_num(machw_tx_sequence_stru tx_seq, osal_u32 val_write, osal_u8 vap_index); 211 osal_void hh503_get_tx_seq_num(osal_u8 lut_index, osal_u8 tid, osal_u8 qos_flag, osal_u8 vap_index, osal_u16 *val_read); 212 #ifdef _PRE_WLAN_FEATURE_AMPDU_TX_HW 213 osal_void hh503_save_tx_ba_para(hal_ba_para_stru *ba_para); 214 osal_void hh503_get_tx_ba_para(hal_ba_para_stru *ba_para); 215 #endif 216 217 osal_void hh503_disable_machw_ack_trans(osal_void); 218 osal_void hh503_enable_machw_ack_trans(osal_void); 219 osal_void hal_disable_machw_cts_trans(osal_void); 220 osal_void hal_enable_machw_cts_trans(osal_void); 221 osal_void hal_initialize_phy(osal_void); 222 osal_void hh503_initialize_rf_sys(hal_to_dmac_device_stru *hal_device); 223 osal_void hh503_fpga_rf_config(osal_void); 224 osal_void hh503_initialize_rf_sys_fpga(hal_to_dmac_device_stru *hal_device); 225 osal_void hal_pow_sw_initialize_tx_power(hal_to_dmac_device_stru *hal_device); 226 osal_void hh503_pow_initialize_tx_power(hal_to_dmac_device_stru *hal_device); 227 osal_void hh503_pow_set_rf_regctl_enable(hal_to_dmac_device_stru *hal_device, oal_bool_enum_uint8 rf_linectl); 228 osal_void hal_pow_set_resp_frame_tx_power(hal_to_dmac_device_stru *hal_device, 229 wlan_channel_band_enum_uint8 band, osal_u8 chan_idx); 230 osal_void hh503_tb_mcs_tx_power(wlan_channel_band_enum_uint8 band); 231 osal_void hh503_tb_tx_power_init(wlan_channel_band_enum_uint8 band); 232 233 osal_void hh503_cali_send_func(hal_to_dmac_device_stru *hal_device, 234 osal_u8 *cali_data, osal_u16 frame_len, osal_u16 remain); 235 osal_u32 hh503_get_mac_int_status(osal_void); 236 osal_void hh503_clear_mac_int_status(osal_u32 status); 237 osal_void hh503_get_mac_error_int_status(hal_error_state_stru *state); 238 osal_void hh503_unmask_mac_init_status(osal_u32 status); 239 osal_void hh503_show_irq_info(hal_to_dmac_device_stru *hal_device, osal_u8 param); 240 osal_void hh503_clear_irq_stat(hal_to_dmac_device_stru *hal_device_base); 241 242 osal_void hh503_config_eifs_time(wlan_protocol_enum_uint8 protocol); 243 osal_void hal_unregister_alg_isr_hook(hal_to_dmac_device_stru *hal_device, hal_isr_type_enum_uint8 isr_type, 244 hal_alg_noify_enum_uint8 alg_notify); 245 osal_void hh503_one_packet_get_status(hal_one_packet_status_stru *status); 246 osal_void hh503_reg_info(hal_to_dmac_device_stru *hal_device, osal_u32 addr, osal_u32 *val); 247 osal_void hh503_reg_info16(hal_to_dmac_device_stru *hal_device, osal_u32 addr, osal_u16 *val); 248 249 #ifdef _PRE_WLAN_ONLINE_DPD 250 osal_void hal_dpd_cfr_set_tpc(hal_to_dmac_device_stru *hal_device, osal_u8 tpc); 251 osal_void hal_dpd_cfr_set_bw(hal_to_dmac_device_stru *hal_device, osal_u8 bw); 252 osal_void hh503_dpd_cfr_set_mcs(hal_to_dmac_device_stru *hal_device, osal_u8 mcs); 253 osal_void hal_dpd_cfr_set_freq(hal_to_dmac_device_stru *hal_device, osal_u8 freq); 254 #endif 255 osal_u32 hal_get_all_tx_q_status(osal_void); 256 osal_void hal_dmac_ce_del_key(const hal_security_key_stru *security_key); 257 osal_void hh503_ce_del_peer_macaddr(osal_u8 lut_idx); 258 osal_void hal_get_ch_measurement_result_ram(hal_ch_statics_irq_event_stru *ch_statics); 259 osal_void hal_get_ch_measurement_result(hal_ch_statics_irq_event_stru *ch_statics); 260 osal_void hh503_get_spec_frm_rate(hal_to_dmac_device_stru *hal_device); 261 osal_void hh503_set_spec_frm_phy_tx_mode(const hal_to_dmac_device_stru *hal_device, 262 osal_u8 band, osal_u8 subband_idx); 263 osal_void hal_set_resp_pow_level(osal_s8 near_distance_rssi, osal_s8 far_distance_rssi); 264 osal_void hh503_rf_regctl_enable_set_regs(hal_to_dmac_device_stru *hal_device, 265 wlan_channel_band_enum_uint8 freq_band, osal_u8 cur_ch_num, wlan_channel_bandwidth_enum_uint8 bandwidth); 266 267 #ifdef _PRE_WLAN_FEATURE_TXBF 268 osal_void hal_set_sta_membership_status_63_32(osal_u32 value); 269 osal_void hal_set_sta_membership_status_31_0(osal_u32 value); 270 osal_void hal_set_sta_user_p_63_48(osal_u32 value); 271 osal_void hal_set_sta_user_p_47_32(osal_u32 value); 272 osal_void hal_set_sta_user_p_31_16(osal_u32 value); 273 osal_void hal_set_sta_user_p_15_0(osal_u32 value); 274 #endif 275 /* phy debug信息中trailer信息上报设置寄存器 */ 276 osal_void hh503_rf_tone_transmit_entrance(const hal_to_dmac_device_stru *hal_device, osal_u16 data_len, 277 osal_u8 chain_idx); 278 osal_void hh503_rf_tone_transmit_exit(const hal_to_dmac_device_stru *hal_device); 279 280 osal_void hh503_set_extlna_chg_cfg(hal_to_dmac_device_stru *hal_device, oal_bool_enum_uint8 extlna_chg_bypass); 281 #ifdef _PRE_WLAN_FEATURE_INTF_DET 282 osal_void hh503_get_txrx_frame_time(hal_ch_mac_statics_stru *ch_statics); 283 #endif 284 osal_void hh503_set_80m_resp_mode(hal_to_dmac_device_stru *hal_device, osal_u8 debug_en); 285 osal_void hh503_get_mac_statistics_data(hal_mac_key_statis_info_stru *mac_key_statis); 286 osal_void hh503_get_phy_statistics_data(hal_mac_key_statis_info_stru *mac_key_statis); 287 osal_void hh503_get_mac_rx_statistics_data(hal_mac_rx_mpdu_statis_info_stru *mac_rx_statis); 288 osal_void hh503_get_mac_tx_statistics_data(hal_mac_tx_mpdu_statis_info_stru *mac_tx_statis); 289 osal_void hh503_hw_stat_clear(osal_void); 290 osal_void hh503_set_ddc_en(osal_u32 reg_value); 291 oal_bool_enum_uint8 hh503_get_dyn_bypass_extlna_pm_flag(const hal_to_dmac_device_stru *hal_device); 292 #ifdef _PRE_WLAN_FEATURE_CCA_OPT 293 osal_void hh503_set_ed_high_th(osal_s8 ed_high_20_reg_val, osal_s8 ed_high_40_reg_val, 294 oal_bool_enum_uint8 is_default_th); 295 #endif 296 osal_void hh503_set_psm_listen_interval(const hal_to_dmac_vap_stru *hal_vap, osal_u16 interval); 297 osal_void hh503_set_psm_listen_interval_count(hal_to_dmac_vap_stru *hal_vap, osal_u16 interval_count); 298 osal_void hh503_set_tbtt_offset(const hal_to_dmac_vap_stru *hal_vap, osal_u16 offset); 299 #ifdef _PRE_WLAN_FEATURE_POWERSAVE 300 osal_void hh503_set_psm_ext_tbtt_offset(const hal_to_dmac_vap_stru *hal_vap, osal_u16 offset); 301 #endif 302 osal_void hh503_set_psm_beacon_period(const hal_to_dmac_vap_stru *hal_vap, osal_u32 beacon_period); 303 osal_void hh503_set_beacon_timeout(osal_u16 value); 304 osal_void hh503_set_sta_dtim_period(const hal_to_dmac_vap_stru *hal_vap, osal_u32 dtim_period); 305 osal_u8 hh503_get_psm_dtim_count(const hal_to_dmac_vap_stru *hal_vap); 306 osal_void hh503_set_psm_dtim_count(hal_to_dmac_vap_stru *hal_vap, osal_u8 dtim_count); 307 #ifdef _PRE_WLAN_FEATURE_MAC_PARSE_TIM 308 osal_void hh503_mac_set_bcn_tim_pos(const hal_to_dmac_vap_stru *hal_vap, osal_u16 pos); 309 osal_void hh503_pm_set_mac_parse_tim(osal_u8 flag); 310 #endif 311 osal_void hh503_enable_machw_edca(osal_void); 312 osal_void hal_get_tx_dscr_field(const hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 313 osal_void hh503_set_phy_max_bw_field(hal_to_dmac_device_stru *hal_device, osal_u32 data, 314 hal_phy_max_bw_sect_enmu_uint8 sect); 315 osal_void hh503_rf_test_disable_al_tx(hal_to_dmac_device_stru *hal_device); 316 osal_void hh503_rf_test_enable_al_tx(hal_to_dmac_device_stru *hal_device, hal_tx_dscr_stru *tx_dscr); 317 osal_void hal_set_rx_filter_reg(osal_u32 rx_filter_command); 318 osal_void hh503_clear_mac_error_int_status(const hal_error_state_stru *status); 319 #define HAL_VAP_LEVEL_FUNC_EXTERN 320 osal_void hh503_vap_set_machw_prot_params(hal_to_dmac_vap_stru *hal_vap, 321 hal_tx_phy_mode_one_stru *phy_tx_mode, hal_tx_ctrl_desc_rate_stru *data_rate); 322 323 osal_void hh503_vap_set_macaddr(const hal_to_dmac_vap_stru *hal_vap, const osal_u8 *mac_addr, osal_u16 mac_addr_len); 324 osal_void hal_sync_update_tsf(osal_u8 vap_id, osal_bool enable); 325 osal_void hh503_tx_enable_peer_sta_ps_ctrl(const osal_u8 lut_index); 326 osal_void hh503_tx_disable_peer_sta_ps_ctrl(const osal_u8 lut_index); 327 osal_void hh503_tx_enable_resp_ps_bit_ctrl(osal_u8 lut_index); 328 osal_void hh503_tx_disable_resp_ps_bit_ctrl(osal_u8 lut_index); 329 osal_void hh503_tx_enable_resp_ps_bit_ctrl_all(osal_void); 330 osal_void hh503_tx_disable_resp_ps_bit_ctrl_all(osal_void); 331 osal_void hh503_pm_wlan_get_service_id(hal_to_dmac_vap_stru *hal_vap, osal_u8 *service_id); 332 333 osal_u32 hh503_rf_get_pll_div_idx(wlan_channel_band_enum_uint8 band, osal_u8 channel_idx, 334 wlan_channel_bandwidth_enum_uint8 bandwidth, osal_u8 *pll_div_idx); 335 osal_void hh503_get_cali_info(hal_to_dmac_device_stru *hal_device, osal_u8 *param); 336 337 #ifdef _PRE_WLAN_FEATURE_FTM 338 osal_u64 hh503_get_ftm_tod(osal_void); 339 osal_u64 hh503_get_ftm_toa(osal_void); 340 osal_u64 hh503_get_ftm_t2(osal_void); 341 osal_u64 hh503_get_ftm_t3(osal_void); 342 osal_void hh503_get_ftm_ctrl_status(osal_u32 *ftm_status); 343 osal_void hh503_get_ftm_config_status(osal_u32 *ftm_status); 344 osal_void hh503_set_ftm_config_status(osal_u32 ftm_status); 345 osal_u8 hh503_get_ftm_dialog(osal_void); 346 osal_void hh503_set_ftm_pulse_enable_status(osal_u32 ftm_status); 347 #endif 348 349 #ifdef _PRE_WLAN_FIT_BASED_REALTIME_CALI 350 osal_void hal_rf_init_dyn_cali_reg_conf(hal_to_dmac_device_stru *hal_device); 351 osal_u32 hh503_get_tx_pdet_by_pow(hal_to_dmac_device_stru * const hal_device, 352 hal_pdet_info_stru * const pdet_info, hal_dyn_cali_usr_record_stru * const user_pow, osal_s16 *exp_pdet); 353 osal_void hh503_rf_dyn_cali_enable(hal_to_dmac_device_stru *device); 354 osal_void hh503_rf_dyn_cali_disable(hal_to_dmac_device_stru *device); 355 osal_void hh503_config_set_dyn_cali_dscr_interval(hal_to_dmac_device_stru *hal_device, 356 wlan_channel_band_enum_uint8 band, osal_u16 param_val); 357 osal_void hh503_rf_cali_realtime_entrance(hal_to_dmac_device_stru * const hal_device, 358 hal_pdet_info_stru * const pdet_info, 359 hal_dyn_cali_usr_record_stru * const user_pow, hal_tx_dscr_stru * const base_dscr); 360 osal_void hh503_init_dyn_cali_tx_pow(hal_to_dmac_device_stru *hal_device); 361 #endif 362 363 osal_void hal_flush_rx_complete_irq(hal_to_dmac_device_stru *hal_dev); 364 oal_bool_enum_uint8 hh503_check_mac_int_status(osal_void); 365 osal_void hal_device_init_vap_pow_code(hal_to_dmac_device_stru *hal_device, hal_vap_pow_info_stru *vap_pow_info, 366 hal_pow_set_type_enum_uint8 type, const mac_channel_stru *channel); 367 osal_void hal_set_hw_en_reg_cfg(osal_u8 hw_en); 368 369 osal_void hh503_adjust_tx_power(osal_u8 ch, osal_s8 power); 370 osal_void hh503_restore_tx_power(osal_u8 ch); 371 372 osal_void hh503_cfg_txop_cycle(osal_u16 txop_limit); 373 osal_void hh503_cfg_lifetime(osal_u8 ac, osal_u16 lifetime); 374 osal_void hh503_bl_sifs_en(osal_u8 sifs_en); 375 osal_void hh503_rts_info(osal_u32 rate, osal_u32 phy_mode, osal_u8* addr1); 376 osal_void hh503_bl_cfg_txop_en(osal_u8 txop_en); 377 378 osal_void hh503_cfg_tx_rts_mac_cnt(osal_u8 max_cnt); 379 osal_void hal_rf_set_trx_type(hal_rf_trx_type_enum trx_type); 380 381 osal_void hh503_set_rx_framefilter(osal_bool enable); 382 383 osal_void hh503_gp_set_mpdu_count(osal_u32 val); 384 385 osal_void hh503_set_sec_bandwidth_offset(osal_u8 bandwidth); 386 osal_void hh503_psm_clear_mac_rx_isr(osal_void); 387 osal_void hh503_set_mac_aid(const hal_to_dmac_vap_stru *hal_vap, osal_u16 aid); 388 osal_void hh503_vap_get_machw_txop_limit_ac(wlan_wme_ac_type_enum_uint8 ac, osal_u16 *txop); 389 osal_void hh503_set_tx_queue_suspend_mode(osal_u8 mask, osal_u8 mode); 390 osal_void hal_flush_dcache(osal_u8 flush_pos); 391 #ifdef __cplusplus 392 #if __cplusplus 393 } 394 #endif 395 #endif 396 397 #endif 398