1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 * Description: WS63 Application Core Platform Definitions of romable 15 * 16 * Create: 2023-04-03 17 */ 18 #ifndef PLATFORM_CORE_ROM_H 19 #define PLATFORM_CORE_ROM_H 20 21 /** 22 * @ingroup DRIVER_PLATFORM_CORE 23 * @{ 24 */ 25 26 // Timer reg base addr. 27 #define TIMER_BASE_ADDR 0x44002000 28 #define TIMER_0_BASE_ADDR (TIMER_BASE_ADDR + 0x100) 29 #define TIMER_1_BASE_ADDR (TIMER_BASE_ADDR + 0x200) 30 #define TIMER_2_BASE_ADDR (TIMER_BASE_ADDR + 0x300) 31 #define TIMER_SYSCTL_BASE_ADDR (TIMER_BASE_ADDR + 0xA0) 32 33 #define TICK_TIMER_BASE_ADDR TIMER_0_BASE_ADDR 34 35 // Tcxo reg base addr 36 #define TCXO_COUNT_BASE_ADDR 0x440004C0 37 38 /** 39 * @brief Definition of pin. 40 */ 41 typedef enum { 42 GPIO_00 = 0, 43 GPIO_01 = 1, 44 GPIO_02 = 2, 45 GPIO_03 = 3, 46 GPIO_04 = 4, 47 GPIO_05 = 5, 48 GPIO_06 = 6, 49 GPIO_07 = 7, 50 GPIO_08 = 8, 51 GPIO_09 = 9, 52 GPIO_10 = 10, 53 GPIO_11 = 11, 54 GPIO_12 = 12, 55 GPIO_13 = 13, 56 GPIO_14 = 14, 57 GPIO_15 = 15, 58 GPIO_16 = 16, 59 GPIO_17 = 17, 60 GPIO_18 = 18, 61 SFC_CLK = 19, 62 SFC_CSN = 20, 63 SFC_IO0 = 21, 64 SFC_IO1 = 22, 65 SFC_IO2 = 23, 66 SFC_IO3 = 24, 67 PIN_NONE = 25, // used as invalid/unused PIN number 68 } pin_t; 69 70 #define PIN_MAX_NUMBER PIN_NONE 71 72 // Watchdog reg base addr 73 #define CHIP_WDT_BASE_ADDRESS 0x40006000 74 75 /** 76 * @} 77 */ 78 79 #endif