1 /*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 * conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
13 * provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "perf_pmu_pri.h"
33 #include "los_hook.h"
34
35 STATIC SwPmu g_perfSw;
36 STATIC CHAR *g_eventName[PERF_COUNT_SW_MAX] = {
37 [PERF_COUNT_SW_TASK_SWITCH] = "task switch",
38 [PERF_COUNT_SW_IRQ_RESPONSE] = "irq response",
39 [PERF_COUNT_SW_MEM_ALLOC] = "mem alloc",
40 [PERF_COUNT_SW_MUX_PEND] = "mux pend",
41 };
42
43 STATIC UINT32 g_traceEventMap[PERF_COUNT_SW_MAX] = {
44 [PERF_COUNT_SW_TASK_SWITCH] = LOS_HOOK_TYPE_TASK_SWITCHEDIN,
45 [PERF_COUNT_SW_IRQ_RESPONSE] = LOS_HOOK_TYPE_ISR_ENTER,
46 [PERF_COUNT_SW_MEM_ALLOC] = LOS_HOOK_TYPE_MEM_ALLOC,
47 [PERF_COUNT_SW_MUX_PEND] = LOS_HOOK_TYPE_MUX_PEND,
48 };
49
OsPerfHook(UINT32 eventType)50 VOID OsPerfHook(UINT32 eventType)
51 {
52 if (!g_perfSw.enable) {
53 return;
54 }
55
56 PerfEvent *events = &g_perfSw.pmu.events;
57 UINT32 eventNum = events->nr;
58
59 UINT32 i;
60 PerfRegs regs;
61
62 (VOID)memset_s(®s, sizeof(PerfRegs), 0, sizeof(PerfRegs));
63
64 for (i = 0; i < eventNum; i++) {
65 Event *event = &(events->per[i]);
66 if (event->counter == eventType) {
67 OsPerfUpdateEventCount(event, 1);
68 if (event->count[ArchCurrCpuid()] % event->period == 0) {
69 OsPerfFetchCallerRegs(®s);
70 OsPerfHandleOverFlow(event, ®s);
71 }
72 return;
73 }
74 }
75 }
76
LOS_PerfMemAlloc(VOID * pool,VOID * ptr,UINT32 size)77 STATIC VOID LOS_PerfMemAlloc(VOID *pool, VOID *ptr, UINT32 size)
78 {
79 OsPerfHook(LOS_HOOK_TYPE_MEM_ALLOC);
80 }
81
LOS_PerfMuxPend(const LosMux * muxCB,UINT32 timeout)82 STATIC VOID LOS_PerfMuxPend(const LosMux *muxCB, UINT32 timeout)
83 {
84 OsPerfHook(LOS_HOOK_TYPE_MUX_PEND);
85 }
86
LOS_PerfIsrEnter(UINT32 hwiNum)87 STATIC VOID LOS_PerfIsrEnter(UINT32 hwiNum)
88 {
89 OsPerfHook(LOS_HOOK_TYPE_ISR_ENTER);
90 }
91
LOS_PerfTaskSwitchedIn(const LosTaskCB * newTask,const LosTaskCB * runTask)92 STATIC VOID LOS_PerfTaskSwitchedIn(const LosTaskCB *newTask, const LosTaskCB *runTask)
93 {
94 OsPerfHook(LOS_HOOK_TYPE_TASK_SWITCHEDIN);
95 }
96
OsPerfCnvInit(VOID)97 STATIC VOID OsPerfCnvInit(VOID)
98 {
99 LOS_HookReg(LOS_HOOK_TYPE_MEM_ALLOC, LOS_PerfMemAlloc);
100 LOS_HookReg(LOS_HOOK_TYPE_MUX_PEND, LOS_PerfMuxPend);
101 LOS_HookReg(LOS_HOOK_TYPE_ISR_ENTER, LOS_PerfIsrEnter);
102 LOS_HookReg(LOS_HOOK_TYPE_TASK_SWITCHEDIN, LOS_PerfTaskSwitchedIn);
103 }
104
OsPerfSwConfig(VOID)105 STATIC UINT32 OsPerfSwConfig(VOID)
106 {
107 UINT32 i;
108 PerfEvent *events = &g_perfSw.pmu.events;
109 UINT32 eventNum = events->nr;
110
111 for (i = 0; i < eventNum; i++) {
112 Event *event = &(events->per[i]);
113 if ((event->eventId < PERF_COUNT_SW_TASK_SWITCH) || (event->eventId >= PERF_COUNT_SW_MAX) ||
114 (event->period == 0)) {
115 return LOS_NOK;
116 }
117 event->counter = g_traceEventMap[event->eventId];
118 }
119 return LOS_OK;
120 }
121
OsPerfSwStart(VOID)122 STATIC UINT32 OsPerfSwStart(VOID)
123 {
124 UINT32 i;
125 UINT32 cpuid = ArchCurrCpuid();
126 PerfEvent *events = &g_perfSw.pmu.events;
127 UINT32 eventNum = events->nr;
128
129 for (i = 0; i < eventNum; i++) {
130 Event *event = &(events->per[i]);
131 event->count[cpuid] = 0;
132 }
133
134 g_perfSw.enable = TRUE;
135 return LOS_OK;
136 }
137
OsPerfSwStop(VOID)138 STATIC UINT32 OsPerfSwStop(VOID)
139 {
140 g_perfSw.enable = FALSE;
141 return LOS_OK;
142 }
143
OsPerfGetEventName(Event * event)144 STATIC CHAR *OsPerfGetEventName(Event *event)
145 {
146 UINT32 eventId = event->eventId;
147 if (eventId < PERF_COUNT_SW_MAX) {
148 return g_eventName[eventId];
149 }
150 return "unknown";
151 }
152
OsSwPmuInit(VOID)153 UINT32 OsSwPmuInit(VOID)
154 {
155 g_perfSw.pmu = (Pmu) {
156 .type = PERF_EVENT_TYPE_SW,
157 .config = OsPerfSwConfig,
158 .start = OsPerfSwStart,
159 .stop = OsPerfSwStop,
160 .getName = OsPerfGetEventName,
161 };
162
163 g_perfSw.enable = FALSE;
164
165 OsPerfCnvInit();
166
167 (VOID)memset_s(&g_perfSw.pmu.events, sizeof(PerfEvent), 0, sizeof(PerfEvent));
168 return OsPerfPmuRegister(&g_perfSw.pmu);
169 }
170