1 /** 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 * 15 * Description: Provides spi porting template \n 16 * 17 * History: \n 18 * 2022-08-18， Create file. \n 19 */ 20 #ifndef SPI_PORTING_H 21 #define SPI_PORTING_H 22 23 #include <stdint.h> 24 #include "platform_core.h" 25 #include "hal_spi_v151_regs_def.h" 26 #include "dma_porting.h" 27 28 #ifdef __cplusplus 29 #if __cplusplus 30 extern "C" { 31 #endif /* __cplusplus */ 32 #endif /* __cplusplus */ 33 34 /** 35 * @defgroup drivers_port_spi SPI 36 * @ingroup drivers_port 37 * @{ 38 */ 39 40 #define SPI_BUS_MAX_NUM SPI_BUS_MAX_NUMBER 41 #define CONFIG_SPI_MAX_TIMEOUT 0xFFFFFFFF 42 43 #define CONFIG_SPI_SUPPORT_MASTER 1 44 #define CONFIG_SPI_SUPPORT_SLAVE 1 45 #define CONFIG_SPI_SUPPORT_INTERRUPT 1 46 #define CONFIG_SPI_SUPPORT_LOOPBACK 1 47 #define CONFIG_SPI_SUPPORT_CRC 1 48 49 #define DMA_HANDSHAKE_SPI_BUS_0_TX HAL_DMA_HANDSHAKING_SPI_MS0_TX 50 #define DMA_HANDSHAKE_SPI_BUS_0_RX HAL_DMA_HANDSHAKING_SPI_MS0_RX 51 #define DMA_HANDSHAKE_SPI_BUS_1_TX HAL_DMA_HANDSHAKING_QSPI0_2CS_TX 52 #define DMA_HANDSHAKE_SPI_BUS_1_RX HAL_DMA_HANDSHAKING_QSPI0_2CS_RX 53 54 /** 55 * @brief Spi dma control register. 56 */ 57 typedef enum { 58 HAL_SPI_DMA_CONTROL_DISABLE = 0, //!< Disables the transmit fifo and the receive fifo dma channel. 59 HAL_SPI_DMA_CONTROL_RX_ENABLE = 1, //!< Enables the receive fifo dma channel. 60 HAL_SPI_DMA_CONTROL_TX_ENABLE = 2, //!< Enables the transmit fifo dma channel. 61 HAL_SPI_DMA_CONTROL_TXRX_ENABLE = 3, //!< Enables the transmit fifo and the receive fifo dma channel. 62 HAL_SPI_DMA_CONTROL_MAX_NUM, 63 HAL_SPI_DMA_CONTROL_NONE = HAL_SPI_DMA_CONTROL_MAX_NUM, 64 } hal_spi_dma_control_t; 65 66 /** 67 * @brief SPI mode. 68 */ 69 typedef enum spi_mode { 70 SPI_MODE_SLAVE, /*!< SPI Slave mode. */ 71 SPI_MODE_MASTER, /*!< SPI Master mode. */ 72 SPI_MODE_MAX_NUM, 73 SPI_MODE_NONE = SPI_MODE_MAX_NUM 74 } spi_mode_t; 75 76 /** 77 * @brief SPI slave select. 78 */ 79 typedef enum spi_slave { 80 SPI_SLAVE0 = 0, /*!< SPI Slave index 0. */ 81 SPI_SLAVE1, /*!< SPI Slave index 1. */ 82 SPI_SLAVE_MAX_NUM, 83 SPI_SLAVE_NONE = SPI_SLAVE_MAX_NUM 84 } spi_slave_t; 85 86 /** 87 * @brief Base address list for all of the IPs. 88 */ 89 extern spi_v151_regs_t * g_spi_base_addrs[SPI_BUS_MAX_NUM]; 90 91 /** 92 * @brief unRegister the interrupt of spis. 93 * @param [in] bus The bus index of SPI. 94 */ 95 void spi_port_unregister_irq(spi_bus_t bus); 96 97 /** 98 * @brief Register the interrupt of spis. 99 * @param [in] bus The bus index of SPI. 100 */ 101 void spi_port_register_irq(spi_bus_t bus); 102 103 /** 104 * @brief Get the base address of specified spi. 105 * @param [in] bus The bus index of SPI. 106 * @return The base address of specified spi. 107 */ 108 uintptr_t spi_porting_base_addr_get(spi_bus_t bus); 109 110 /** 111 * @brief Get the max slave number can be selected. 112 * @param [in] bus The bus index of SPI. 113 * @return The max slave number can be selected. 114 */ 115 uint32_t spi_porting_max_slave_select_get(spi_bus_t bus); 116 117 /** 118 * @brief Set the spi work mode. 119 * @param [in] bus The bus index of SPI. 120 * @param [in] mode The mode of SPI. 121 */ 122 void spi_porting_set_device_mode(spi_bus_t bus, spi_mode_t mode); 123 124 /** 125 * @brief Get the spi work mode. 126 * @param [in] bus The bus index of SPI. 127 * @return The mode of SPI. 128 */ 129 spi_mode_t spi_porting_get_device_mode(spi_bus_t bus); 130 131 /** 132 * @brief SPI lock. 133 * @param [in] bus The bus index of SPI. 134 * @return The irq lock number of SPI. 135 */ 136 uint32_t spi_porting_lock(spi_bus_t bus); 137 138 /** 139 * @brief SPI unlock. 140 * @param [in] bus The bus index of SPI. 141 * @param [in] irq_sts The irq lock number of SPI. 142 */ 143 void spi_porting_unlock(spi_bus_t bus, uint32_t irq_sts); 144 145 #ifdef TEST_SUITE 146 /** 147 * @brief Init spi pin for test. 148 */ 149 void spi_porting_test_spi_init_pin(void); 150 #endif 151 152 /** 153 * @brief Get the DMA destination handshaking select of SPI transfer. 154 * @param [in] bus The SPI bus. see @ref spi_bus_t 155 * @return The DMA destination handshaking select of spi transfer. 156 */ 157 uint8_t spi_port_get_dma_trans_dest_handshaking(spi_bus_t bus); 158 159 /** 160 * @brief Get the DMA source handshaking select of SPI transfer. 161 * @param [in] bus The SPI bus. see @ref spi_bus_t 162 * @return The DMA source handshaking select of SPI transfer. 163 */ 164 uint8_t spi_port_get_dma_trans_src_handshaking(spi_bus_t bus); 165 166 /** 167 * @brief Get the SPI DMA TX level. 168 * @param [in] bus The SPI bus. see @ref spi_bus_t 169 * @return The SPI DMA TX level. 170 */ 171 uint8_t spi_port_tx_data_level_get(spi_bus_t bus); 172 173 /** 174 * @brief Get the SPI DMA RX level of SPI transfer. 175 * @param [in] bus The SPI bus. see @ref spi_bus_t 176 * @return The SPI DMA RX level. 177 */ 178 uint8_t spi_port_rx_data_level_get(spi_bus_t bus); 179 180 /** 181 * @brief SPI clock int. 182 * @param [in] bus_clk The SPI bus clock. 183 */ 184 void spi_porting_clock_init(uint32_t bus_clk); 185 186 /** 187 * @} 188 */ 189 190 #ifdef __cplusplus 191 #if __cplusplus 192 } 193 #endif /* __cplusplus */ 194 #endif /* __cplusplus */ 195 196 #endif