1 /*
2 * Copyright (c) 2023 Huawei Device Co., Ltd.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "x64_isa.h"
17
18 namespace maplebe {
19 using namespace maple;
20 namespace x64 {
IsAvailableReg(X64reg reg)21 bool IsAvailableReg(X64reg reg)
22 {
23 switch (reg) {
24 /* integer registers */
25 #define INT_REG(ID, PREF8, PREF8_16, PREF16, PREF32, PREF64, canBeAssigned, isCalleeSave, isParam, isSpill, \
26 isExtraSpill) \
27 case R##ID: \
28 return canBeAssigned;
29 #define INT_REG_ALIAS(ALIAS, ID)
30 #include "x64_int_regs.def"
31 #undef INT_REG
32 #undef INT_REG_ALIAS
33 /* fp-simd registers */
34 #define FP_SIMD_REG(ID, P8, P16, P32, P64, P128, canBeAssigned, isCalleeSave, isParam, isSpill, isExtraSpill) \
35 case V##ID: \
36 return canBeAssigned;
37 #include "x64_fp_simd_regs.def"
38 #undef FP_SIMD_REG
39 default:
40 return false;
41 }
42 }
43
IsCalleeSavedReg(X64reg reg)44 bool IsCalleeSavedReg(X64reg reg)
45 {
46 switch (reg) {
47 /* integer registers */
48 #define INT_REG(ID, PREF8, PREF8_16, PREF16, PREF32, PREF64, canBeAssigned, isCalleeSave, isParam, isSpill, \
49 isExtraSpill) \
50 case R##ID: \
51 return isCalleeSave;
52 #define INT_REG_ALIAS(ALIAS, ID)
53 #include "x64_int_regs.def"
54 #undef INT_REG
55 #undef INT_REG_ALIAS
56 /* fp-simd registers */
57 #define FP_SIMD_REG(ID, P8, P16, P32, P64, P128, canBeAssigned, isCalleeSave, isParam, isSpill, isExtraSpill) \
58 case V##ID: \
59 return isCalleeSave;
60 #include "x64_fp_simd_regs.def"
61 #undef FP_SIMD_REG
62 default:
63 return false;
64 }
65 }
66
IsSpillReg(X64reg reg)67 bool IsSpillReg(X64reg reg)
68 {
69 switch (reg) {
70 /* integer registers */
71 #define INT_REG(ID, PREF8, PREF8_16, PREF16, PREF32, PREF64, canBeAssigned, isCalleeSave, isParam, isSpill, \
72 isExtraSpill) \
73 case R##ID: \
74 return isSpill;
75 #define INT_REG_ALIAS(ALIAS, ID)
76 #include "x64_int_regs.def"
77 #undef INT_REG
78 #undef INT_REG_ALIAS
79 /* fp-simd registers */
80 #define FP_SIMD_REG(ID, P8, P16, P32, P64, P128, canBeAssigned, isCalleeSave, isParam, isSpill, isExtraSpill) \
81 case V##ID: \
82 return isSpill;
83 #include "x64_fp_simd_regs.def"
84 #undef FP_SIMD_REG
85 default:
86 return false;
87 }
88 }
89
IsExtraSpillReg(X64reg reg)90 bool IsExtraSpillReg(X64reg reg)
91 {
92 switch (reg) {
93 /* integer registers */
94 #define INT_REG(ID, PREF8, PREF8_16, PREF16, PREF32, PREF64, canBeAssigned, isCalleeSave, isParam, isSpill, \
95 isExtraSpill) \
96 case R##ID: \
97 return isExtraSpill;
98 #define INT_REG_ALIAS(ALIAS, ID)
99 #include "x64_int_regs.def"
100 #undef INT_REG
101 #undef INT_REG_ALIAS
102 /* fp-simd registers */
103 #define FP_SIMD_REG(ID, P8, P16, P32, P64, P128, canBeAssigned, isCalleeSave, isParam, isSpill, isExtraSpill) \
104 case V##ID: \
105 return isExtraSpill;
106 #include "x64_fp_simd_regs.def"
107 #undef FP_SIMD_REG
108 default:
109 return false;
110 }
111 }
112
IsSpillRegInRA(X64reg regNO,bool has3RegOpnd)113 bool IsSpillRegInRA(X64reg regNO, bool has3RegOpnd)
114 {
115 /* if has 3 RegOpnd, previous reg used to spill. */
116 if (has3RegOpnd) {
117 return IsSpillReg(regNO) || IsExtraSpillReg(regNO);
118 }
119 return IsSpillReg(regNO);
120 }
121 } /* namespace x64 */
122 } /* namespace maplebe */
123