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1 /*
2  * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
17  */
18 
19 #ifndef __TDE_BUFFER_H__
20 #define __TDE_BUFFER_H__
21 
22 #include "tde_define.h"
23 #include "hi_osal.h"
24 
25 #ifdef __cplusplus
26 #if __cplusplus
27 extern "C" {
28 #endif
29 #endif /* End of #ifdef __cplusplus */
30 
31 static hi_u32 g_tde_phy_buff = 0;
32 static hi_u32 g_tde_buff_ref = 0;
33 static hi_u32 g_tde_tmp_buf = 0;
34 
tde_set_tde_tmp_buffer(hi_u32 tde_tmp_buf)35 hi_void tde_set_tde_tmp_buffer(hi_u32 tde_tmp_buf)
36 {
37     g_tde_tmp_buf = tde_tmp_buf;
38 }
39 
40 #ifndef HI_BUILD_IN_BOOT
41 static osal_spinlock_t g_tde_buff_lock;
42 static unsigned long g_tde_buff_lock_flags;
43 #endif
tde_alloc_physic_buff(hi_u32 cb_cr_offset)44 static hi_u32 tde_alloc_physic_buff(hi_u32 cb_cr_offset)
45 {
46     hi_u32 phy_addr;
47     hi_u32 csc_buffer_size;
48 
49 #ifdef CFG_HI_TDE_CSCTMPBUFFER_SIZE
50     csc_buffer_size = CFG_HI_TDE_CSCTMPBUFFER_SIZE;
51 #elif defined(HI_BUILD_IN_BOOT)
52     csc_buffer_size = 0;
53 #else
54     csc_buffer_size = g_tde_tmp_buf;
55 #endif
56     tde_spin_lock(&g_tde_buff_lock, g_tde_buff_lock_flags);
57     if (g_tde_phy_buff == 0) {
58         if ((cb_cr_offset * 3) > csc_buffer_size) { /* 3 * size */
59             tde_spin_unlock(&g_tde_buff_lock, g_tde_buff_lock_flags);
60             return 0;
61         }
62 
63         tde_spin_unlock(&g_tde_buff_lock, g_tde_buff_lock_flags);
64 
65         tde_get_phyaddr_mmb("TDE_TEMP_BUFFER", csc_buffer_size, phy_addr);
66         osal_printk("\n u32CscBufferSize is %x 0x%x\n", csc_buffer_size, phy_addr);
67 
68         if (phy_addr == 0) {
69             return 0;
70         }
71 
72         tde_spin_lock(&g_tde_buff_lock, g_tde_buff_lock_flags);
73         if (g_tde_phy_buff == 0) {
74             g_tde_phy_buff = phy_addr;
75             g_tde_buff_ref = 0;
76         } else {
77             g_tde_buff_ref++;
78             tde_spin_unlock(&g_tde_buff_lock, g_tde_buff_lock_flags);
79 #ifndef HI_BUILD_IN_BOOT
80             tde_free_mmb(phy_addr);
81 #endif
82             return g_tde_phy_buff + cb_cr_offset;
83         }
84     }
85 
86     g_tde_buff_ref++;
87     tde_spin_unlock(&g_tde_buff_lock, g_tde_buff_lock_flags);
88 
89     return g_tde_phy_buff + cb_cr_offset;
90 }
91 
tde_free_physic_buff(hi_void)92 static hi_void tde_free_physic_buff(hi_void)
93 {
94     tde_spin_lock(&g_tde_buff_lock, g_tde_buff_lock_flags);
95     if (g_tde_buff_ref == 0) {
96         tde_spin_unlock(&g_tde_buff_lock, g_tde_buff_lock_flags);
97         return;
98     }
99 
100     g_tde_buff_ref--;
101     if (g_tde_buff_ref == 0) {
102 #ifndef HI_BUILD_IN_BOOT
103         hi_u32 phy_buff = g_tde_phy_buff;
104 #endif
105         g_tde_phy_buff = 0;
106         tde_spin_unlock(&g_tde_buff_lock, g_tde_buff_lock_flags);
107 #ifndef HI_BUILD_IN_BOOT
108         osal_printk("FREE MMB 0x%x\n", phy_buff);
109         tde_free_mmb(phy_buff);
110 #endif
111         return;
112     }
113     tde_spin_unlock(&g_tde_buff_lock, g_tde_buff_lock_flags);
114 }
115 
116 #ifdef __cplusplus
117 #if __cplusplus
118 }
119 #endif
120 #endif /* End of #ifdef __cplusplus */
121 
122 #endif /* __HI_HANDLE_MGR_H__ */
123