Searched +full:nand +full:- +full:ecc +full:- +full:step +full:- +full:size (Results 1 – 25 of 234) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | hisi504-nand.txt | 1 Hisilicon Hip04 Soc NAND controller DT binding 5 - compatible: Should be "hisilicon,504-nfc". 6 - reg: The first contains base physical address and size of 7 NAND controller's registers. The second contains base 8 physical address and size of NAND controller's buffer. 9 - interrupts: Interrupt number for nfc. 10 - nand-bus-width: See nand-controller.yaml. 11 - nand-ecc-mode: Support none and hw ecc mode. 12 - #address-cells: Partition address, should be set 1. 13 - #size-cells: Partition size, should be set 1. [all …]
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| D | mediatek,mtk-nfc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek(MTK) SoCs raw NAND FLASH controller (NFC) 10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com> 15 - mediatek,mt2701-nfc 16 - mediatek,mt2712-nfc 17 - mediatek,mt7622-nfc 21 - description: Base physical address and size of NFI. [all …]
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| D | vf610-nfc.txt | 1 Freescale's NAND flash controller (NFC) 3 This variant of the Freescale NAND flash controller (NFC) can be found on 7 - compatible: Should be set to "fsl,vf610-nfc". 8 - reg: address range of the NFC. 9 - interrupts: interrupt of the NFC. 10 - #address-cells: shall be set to 1. Encode the nand CS. 11 - #size-cells : shall be set to 0. 12 - assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>; 13 - assigned-clock-rates: The NAND bus timing is derived from this clock 14 rate and should not exceed maximum timing for any NAND memory chip [all …]
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| D | denali,nand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mtd/denali,nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Denali NAND controller 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - altr,socfpga-denali-nand 16 - socionext,uniphier-denali-nand-v5a 17 - socionext,uniphier-denali-nand-v5b 19 reg-names: [all …]
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| D | nand-chip.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/nand-chip.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NAND Chip Common Properties 10 - Miquel Raynal <miquel.raynal@bootlin.com> 13 - $ref: mtd.yaml# 16 This file covers the generic description of a NAND chip. It implies that the 17 bus interface should not be taken into account: both raw NAND devices and 18 SPI-NAND devices are concerned by this description. [all …]
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| D | amlogic,meson-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs 10 - $ref: nand-controller.yaml 13 - liang.yang@amlogic.com 18 - amlogic,meson-gxl-nfc 19 - amlogic,meson-axg-nfc 24 reg-names: [all …]
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| D | marvell,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell NAND Flash Controller (NFC) 10 - Miquel Raynal <miquel.raynal@bootlin.com> 15 - items: 16 - const: marvell,armada-8k-nand-controller 17 - const: marvell,armada370-nand-controller 18 - enum: [all …]
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| D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom STB NAND Controller 10 - Brian Norris <computersforpeace@gmail.com> 11 - Kamal Dasu <kdasu.kdev@gmail.com> 14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 15 flash chips. It has a memory-mapped register interface for both control 25 -- Additional SoC-specific NAND controller properties -- 27 The NAND controller is integrated differently on the variety of SoCs on which [all …]
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| D | rockchip,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SoCs NAND FLASH Controller (NFC) 10 - $ref: nand-controller.yaml# 13 - Heiko Stuebner <heiko@sntech.de> 18 - const: rockchip,px30-nfc 19 - const: rockchip,rk2928-nfc 20 - const: rockchip,rv1108-nfc [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | hisi504-nand.txt | 1 Hisilicon Hip04 Soc NAND controller DT binding 5 - compatible: Should be "hisilicon,504-nfc". 6 - reg: The first contains base physical address and size of 7 NAND controller's registers. The second contains base 8 physical address and size of NAND controller's buffer. 9 - interrupts: Interrupt number for nfc. 10 - nand-bus-width: See nand-controller.yaml. 11 - nand-ecc-mode: Support none and hw ecc mode. 12 - #address-cells: Partition address, should be set 1. 13 - #size-cells: Partition size, should be set 1. [all …]
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| D | mtk-nand.txt | 1 MTK SoCs NAND FLASH controller (NFC) DT binding 3 This file documents the device tree bindings for MTK SoCs NAND controllers. 5 the nand controller interface driver and the ECC engine driver. 10 1) NFC NAND Controller Interface (NFI): 13 The first part of NFC is NAND Controller Interface (NFI) HW. 15 - compatible: Should be one of 16 "mediatek,mt2701-nfc", 17 "mediatek,mt2712-nfc", 18 "mediatek,mt7622-nfc". 19 - reg: Base physical address and size of NFI. [all …]
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| D | nand-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NAND Chip and NAND Controller Generic Binding 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - Richard Weinberger <richard@nod.at> 14 The NAND controller should be represented with its own DT node, and 15 all NAND chips attached to this controller should be defined as 16 children nodes of the NAND controller. This representation should be [all …]
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| D | vf610-nfc.txt | 1 Freescale's NAND flash controller (NFC) 3 This variant of the Freescale NAND flash controller (NFC) can be found on 7 - compatible: Should be set to "fsl,vf610-nfc". 8 - reg: address range of the NFC. 9 - interrupts: interrupt of the NFC. 10 - #address-cells: shall be set to 1. Encode the nand CS. 11 - #size-cells : shall be set to 0. 12 - assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>; 13 - assigned-clock-rates: The NAND bus timing is derived from this clock 14 rate and should not exceed maximum timing for any NAND memory chip [all …]
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| D | marvell-nand.txt | 1 Marvell NAND Flash Controller (NFC) 4 - compatible: can be one of the following: 5 * "marvell,armada-8k-nand-controller" 6 * "marvell,armada370-nand-controller" 7 * "marvell,pxa3xx-nand-controller" 8 * "marvell,armada-8k-nand" (deprecated) 9 * "marvell,armada370-nand" (deprecated) 10 * "marvell,pxa3xx-nand" (deprecated) 13 - reg: NAND flash controller memory area. 14 - #address-cells: shall be set to 1. Encode the NAND CS. [all …]
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| D | denali,nand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mtd/denali,nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Denali NAND controller 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - altr,socfpga-denali-nand 16 - socionext,uniphier-denali-nand-v5a 17 - socionext,uniphier-denali-nand-v5b 19 reg-names: [all …]
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| D | brcm,brcmnand.txt | 1 * Broadcom STB NAND Controller 3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 4 flash chips. It has a memory-mapped register interface for both control 15 - compatible : May contain an SoC-specific compatibility string (see below) 16 to account for any SoC-specific hardware bits that may be 19 the core NAND controller, of the following form: 21 string, like "brcm,brcmnand-v7.0" 23 brcm,brcmnand-v2.1 24 brcm,brcmnand-v2.2 25 brcm,brcmnand-v4.0 [all …]
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| D | tango-nand.txt | 1 Sigma Designs Tango4 NAND Flash Controller (NFC) 5 - compatible: "sigma,smp8758-nand" 6 - reg: address/size of nfc_reg, nfc_mem, and pbus_reg 7 - dmas: reference to the DMA channel used by the controller 8 - dma-names: "rxtx" 9 - clocks: reference to the system clock 10 - #address-cells: <1> 11 - #size-cells: <0> 13 Children nodes represent the available NAND chips. 14 See Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings. [all …]
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| D | nvidia-tegra20-nand.txt | 1 NVIDIA Tegra NAND Flash controller 4 - compatible: Must be one of: 5 - "nvidia,tegra20-nand" 6 - reg: MMIO address range 7 - interrupts: interrupt output of the NFC controller 8 - clocks: Must contain an entry for each entry in clock-names. 9 See ../clocks/clock-bindings.txt for details. 10 - clock-names: Must include the following entries: 11 - nand 12 - resets: Must contain an entry for each entry in reset-names. [all …]
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| /kernel/linux/linux-6.6/drivers/mtd/nand/ |
| D | ecc-mxic.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Support for Macronix external hardware ECC engine for NAND devices, also 10 #include <linux/dma-mapping.h> 18 #include <linux/mtd/nand.h> 19 #include <linux/mtd/nand-ecc-mxic.h> 53 /* ECC Chunk Size */ 55 /* Main Data Size */ 57 /* Spare Data Size */ 63 /* ECC Chunk Count */ 98 /* ECC machinery */ [all …]
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| /kernel/linux/linux-6.6/include/linux/mtd/ |
| D | rawnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> 8 * Contains standard defines and IDs for NAND flash devices 17 #include <linux/mtd/nand.h> 29 /* The maximum number of NAND chips in an array */ 50 * Standard NAND flash commands 75 #define NAND_CMD_NONE -1 84 #define NAND_DATA_IFACE_CHECK_ONLY -1 87 * Constants for Hardware ECC 89 /* Reset Hardware ECC for read */ [all …]
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| /kernel/linux/linux-5.10/include/linux/mtd/ |
| D | rawnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> 8 * Contains standard defines and IDs for NAND flash devices 17 #include <linux/mtd/nand.h> 21 #include <linux/mtd/nand.h> 29 /* The maximum number of NAND chips in an array */ 50 * Standard NAND flash commands 73 #define NAND_CMD_NONE -1 82 #define NAND_DATA_IFACE_CHECK_ONLY -1 85 * Constants for Hardware ECC [all …]
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | sunxi_nand.c | 1 // SPDX-License-Identifier: GPL-2.0+ 6 * https://github.com/yuq/sunxi-nfc-mtd 9 * https://github.com/hno/Allwinner-Info 16 #include <linux/dma-mapping.h> 70 #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8) 107 #define NFC_ADR_NUM(x) (((x) - 1) << 16) 161 * struct sunxi_nand_chip_sel - stores information related to NAND Chip Select 163 * @cs: the NAND CS id used to communicate with a NAND Chip 164 * @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the NFC 172 * struct sunxi_nand_hw_ecc - stores information related to HW ECC support [all …]
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | sunxi_nand.c | 1 // SPDX-License-Identifier: GPL-2.0+ 6 * https://github.com/yuq/sunxi-nfc-mtd 9 * https://github.com/hno/Allwinner-Info 16 #include <linux/dma-mapping.h> 70 #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8) 107 #define NFC_ADR_NUM(x) (((x) - 1) << 16) 161 * struct sunxi_nand_chip_sel - stores information related to NAND Chip Select 163 * @cs: the NAND CS id used to communicate with a NAND Chip 164 * @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the NFC 172 * struct sunxi_nand_hw_ecc - stores information related to HW ECC support [all …]
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-class-mtd | 4 Contact: linux-mtd@lists.infradead.org 12 Contact: linux-mtd@lists.infradead.org 22 Contact: linux-mtd@lists.infradead.org 24 These directories provide the corresponding read-only device 30 Contact: linux-mtd@lists.infradead.org 34 read-write device so <minor> will be even. 39 Contact: linux-mtd@lists.infradead.org 42 to the read-only variant of thie MTD device (in 48 Contact: linux-mtd@lists.infradead.org 50 "Major" erase size for the device. If numeraseregions is [all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-class-mtd | 4 Contact: linux-mtd@lists.infradead.org 12 Contact: linux-mtd@lists.infradead.org 22 Contact: linux-mtd@lists.infradead.org 24 These directories provide the corresponding read-only device 30 Contact: linux-mtd@lists.infradead.org 34 read-write device so <minor> will be even. 39 Contact: linux-mtd@lists.infradead.org 42 to the read-only variant of the MTD device (in 48 Contact: linux-mtd@lists.infradead.org 50 "Major" erase size for the device. If numeraseregions is [all …]
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