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Lines Matching refs:RA

376 #define RA(r) ((r)<<16)  macro
387 #define TAB(t,a,b) (RT(t) | RA(a) | RB(b))
388 #define SAB(s,a,b) (RS(s) | RA(a) | RB(b))
429 tcg_out32 (s, op | RA (ra) | RS (rs) | sh | mb); in tcg_out_rld()
435 tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff)); in tcg_out_movi32()
437 tcg_out32 (s, ADDIS | RT (ret) | RA (0) | ((arg >> 16) & 0xffff)); in tcg_out_movi32()
439 tcg_out32 (s, ORI | RS (ret) | RA (ret) | (arg & 0xffff)); in tcg_out_movi32()
458 if (h16) tcg_out32 (s, ORIS | RS (ret) | RA (ret) | h16); in tcg_out_movi()
459 if (l16) tcg_out32 (s, ORI | RS (ret) | RA (ret) | l16); in tcg_out_movi()
479 tcg_out32 (s, LD | RT (0) | RA (reg)); in tcg_out_call()
480 tcg_out32 (s, MTSPR | RA (0) | CTR); in tcg_out_call()
481 tcg_out32 (s, LD | RT (11) | RA (reg) | 16); in tcg_out_call()
482 tcg_out32 (s, LD | RT (2) | RA (reg) | 8); in tcg_out_call()
490 tcg_out32 (s, op1 | RT (ret) | RA (addr) | (offset & 0xffff)); in tcg_out_ldst()
493 tcg_out32 (s, op2 | RT (ret) | RA (addr) | RB (0)); in tcg_out_ldst()
536 | RA (r0) in tcg_out_tlb_read()
543 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (TCG_AREG0)); in tcg_out_tlb_read()
544 tcg_out32 (s, (LWZU | RT (r1) | RA (r0) | offset)); in tcg_out_tlb_read()
546 | RA (r2) in tcg_out_tlb_read()
562 tcg_out32 (s, LD_ADDR | RT (r1) | RA (r0) | offset); in tcg_out_tlb_read()
598 tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1) | CMP_L); in tcg_out_qemu_ld()
613 tcg_out32 (s, EXTSB | RA (data_reg) | RS (3)); in tcg_out_qemu_ld()
616 tcg_out32 (s, EXTSH | RA (data_reg) | RS (3)); in tcg_out_qemu_ld()
619 tcg_out32 (s, EXTSW | RA (data_reg) | RS (3)); in tcg_out_qemu_ld()
640 | RA (r0) in tcg_out_qemu_ld()
645 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg)); in tcg_out_qemu_ld()
664 tcg_out32 (s, LBZ | RT (data_reg) | RA (r0)); in tcg_out_qemu_ld()
667 tcg_out32 (s, LBZ | RT (data_reg) | RA (r0)); in tcg_out_qemu_ld()
668 tcg_out32 (s, EXTSB | RA (data_reg) | RS (data_reg)); in tcg_out_qemu_ld()
672 else tcg_out32 (s, LHZ | RT (data_reg) | RA (r0)); in tcg_out_qemu_ld()
677 tcg_out32 (s, EXTSH | RA (data_reg) | RS (data_reg)); in tcg_out_qemu_ld()
679 else tcg_out32 (s, LHA | RT (data_reg) | RA (r0)); in tcg_out_qemu_ld()
683 else tcg_out32 (s, LWZ | RT (data_reg)| RA (r0)); in tcg_out_qemu_ld()
688 tcg_out32 (s, EXTSW | RA (data_reg) | RS (data_reg)); in tcg_out_qemu_ld()
690 else tcg_out32 (s, LWA | RT (data_reg)| RA (r0)); in tcg_out_qemu_ld()
695 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_ld()
700 else tcg_out32 (s, LD | RT (data_reg) | RA (r0)); in tcg_out_qemu_ld()
729 tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1) | CMP_L); in tcg_out_qemu_st()
753 | RA (r0) in tcg_out_qemu_st()
758 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg)); in tcg_out_qemu_st()
776 tcg_out32 (s, STB | RS (data_reg) | RA (r0)); in tcg_out_qemu_st()
779 if (bswap) tcg_out32 (s, STHBRX | RS (data_reg) | RA (0) | RB (r0)); in tcg_out_qemu_st()
780 else tcg_out32 (s, STH | RS (data_reg) | RA (r0)); in tcg_out_qemu_st()
783 if (bswap) tcg_out32 (s, STWBRX | RS (data_reg) | RA (0) | RB (r0)); in tcg_out_qemu_st()
784 else tcg_out32 (s, STW | RS (data_reg) | RA (r0)); in tcg_out_qemu_st()
788 tcg_out32 (s, STWBRX | RS (data_reg) | RA (0) | RB (r0)); in tcg_out_qemu_st()
789 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_st()
791 tcg_out32 (s, STWBRX | RS (0) | RA (0) | RB (r1)); in tcg_out_qemu_st()
793 else tcg_out32 (s, STD | RS (data_reg) | RA (r0)); in tcg_out_qemu_st()
826 tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff)); in tcg_target_qemu_prologue()
830 | RA (1) in tcg_target_qemu_prologue()
834 tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 16)); in tcg_target_qemu_prologue()
845 | RA (1) in tcg_target_qemu_prologue()
849 tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 16)); in tcg_target_qemu_prologue()
851 tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); in tcg_target_qemu_prologue()
879 tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff)); in ppc_addi32()
882 tcg_out32 (s, ADDIS | RT (rt) | RA (ra) | h); in ppc_addi32()
883 tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff)); in ppc_addi32()
895 tcg_out32 (s, ADD | RT (rt) | RA (ra)); in ppc_addi64()
965 tcg_out32 (s, op | RA (arg1) | (arg2 & 0xffff)); in tcg_out_cmp()
969 tcg_out32 (s, op | RA (arg1) | RB (0)); in tcg_out_cmp()
972 tcg_out32 (s, op | RA (arg1) | RB (arg2)); in tcg_out_cmp()
1074 tcg_out32 (s, EXTSB | RS (args[0]) | RA (args[0])); in tcg_out_op()
1127 tcg_out32 (s, ANDI | RS (args[1]) | RA (args[0]) | args[2]); in tcg_out_op()
1129 tcg_out32 (s, ANDIS | RS (args[1]) | RA (args[0]) in tcg_out_op()
1146 tcg_out32 (s, ORI | RS (args[1]) | RA (args[0]) in tcg_out_op()
1149 tcg_out32 (s, ORIS | RS (args[0]) | RA (args[0]) in tcg_out_op()
1153 tcg_out32 (s, ORIS | RS (args[1]) | RA (args[0]) in tcg_out_op()
1164 tcg_out32 (s, XORI | RS (args[1]) | RA (args[0]) in tcg_out_op()
1167 tcg_out32 (s, XORIS | RS (args[1]) | RA (args[0]) in tcg_out_op()
1184 tcg_out32 (s, MULLI | RT (args[0]) | RA (args[1]) in tcg_out_op()
1218 | RA (args[0]) in tcg_out_op()
1232 | RA (args[0]) in tcg_out_op()
1245 tcg_out32 (s, SRAWI | RS (args[1]) | RA (args[0]) | SH (args[2])); in tcg_out_op()
1260 tcg_out32 (s, NEG | RT (args[0]) | RA (args[1])); in tcg_out_op()
1291 tcg_out32 (s, SRADI | RA (args[0]) | RS (args[1]) | sh); in tcg_out_op()
1363 tcg_out32 (s, c | RS (args[1]) | RA (args[0])); in tcg_out_op()