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1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ****************************************************************************
11  ****************************************************************************/
12 #ifndef __ARCH_DESC_H
13 #define __ARCH_DESC_H
14 
15 #include <asm/ldt.h>
16 #include <asm/segment.h>
17 
18 #ifndef __ASSEMBLY__
19 
20 #include <linux/preempt.h>
21 #include <linux/smp.h>
22 #include <linux/percpu.h>
23 
24 #include <asm/mmu.h>
25 
26 struct Xgt_desc_struct {
27  unsigned short size;
28  unsigned long address __attribute__((packed));
29  unsigned short pad;
30 } __attribute__ ((packed));
31 
32 struct gdt_page
33 {
34  struct desc_struct gdt[GDT_ENTRIES];
35 } __attribute__((aligned(PAGE_SIZE)));
36 
37 #define DESCTYPE_LDT 0x82
38 #define DESCTYPE_TSS 0x89
39 #define DESCTYPE_TASK 0x85
40 #define DESCTYPE_INT 0x8e
41 #define DESCTYPE_TRAP 0x8f
42 #define DESCTYPE_DPL3 0x60
43 #define DESCTYPE_S 0x10
44 #define load_TR_desc() native_load_tr_desc()
45 #define load_gdt(dtr) native_load_gdt(dtr)
46 #define load_idt(dtr) native_load_idt(dtr)
47 #define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
48 #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
49 #define store_gdt(dtr) native_store_gdt(dtr)
50 #define store_idt(dtr) native_store_idt(dtr)
51 #define store_tr(tr) (tr = native_store_tr())
52 #define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
53 #define load_TLS(t, cpu) native_load_tls(t, cpu)
54 #define set_ldt native_set_ldt
55 #define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
56 #define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
57 #define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
58 #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
59 #define LDT_entry_a(info)   ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
60 #define LDT_entry_b(info)   (((info)->base_addr & 0xff000000) |   (((info)->base_addr & 0x00ff0000) >> 16) |   ((info)->limit & 0xf0000) |   (((info)->read_exec_only ^ 1) << 9) |   ((info)->contents << 10) |   (((info)->seg_not_present ^ 1) << 15) |   ((info)->seg_32bit << 22) |   ((info)->limit_in_pages << 23) |   ((info)->useable << 20) |   0x7000)
61 #define LDT_empty(info) (  (info)->base_addr == 0 &&   (info)->limit == 0 &&   (info)->contents == 0 &&   (info)->read_exec_only == 1 &&   (info)->seg_32bit == 0 &&   (info)->limit_in_pages == 0 &&   (info)->seg_not_present == 1 &&   (info)->useable == 0 )
62 #else
63 #define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b)   movb idx*8+4(gdt), lo_b;   movb idx*8+7(gdt), hi_b;   shll $16, base;   movw idx*8+2(gdt), lo_w;
64 #endif
65 #endif
66