Searched refs:FETCH (Results 1 – 25 of 102) sorted by relevance
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| /dalvik/vm/mterp/c/ |
| D | OP_CONST_WIDE.c | 6 tmp = FETCH(1); in HANDLE_OPCODE()
7 tmp |= (u8)FETCH(2) << 16; in HANDLE_OPCODE()
8 tmp |= (u8)FETCH(3) << 32; in HANDLE_OPCODE()
9 tmp |= (u8)FETCH(4) << 48; in HANDLE_OPCODE()
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| D | OP_MOVE_WIDE_16.c | 2 vdst = FETCH(1);
3 vsrc1 = FETCH(2);
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| D | OP_CONST.c | 6 tmp = FETCH(1); in HANDLE_OPCODE()
7 tmp |= (u4)FETCH(2) << 16; in HANDLE_OPCODE()
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| D | OP_CONST_WIDE_32.c | 6 tmp = FETCH(1); in HANDLE_OPCODE()
7 tmp |= (u4)FETCH(2) << 16; in HANDLE_OPCODE()
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| D | OP_GOTO_32.c | 3 s4 offset = FETCH(1); /* low-order 16 bits */ in HANDLE_OPCODE()
4 offset |= ((s4) FETCH(2)) << 16; /* high-order 16 bits */ in HANDLE_OPCODE()
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| D | OP_MOVE_16.c | 2 vdst = FETCH(1);
3 vsrc1 = FETCH(2);
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| D | OP_CONST_STRING_JUMBO.c | 7 tmp = FETCH(1); in HANDLE_OPCODE()
8 tmp |= (u4)FETCH(2) << 16; in HANDLE_OPCODE()
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| D | OP_FILL_ARRAY_DATA.c | 9 offset = FETCH(1) | (((s4) FETCH(2)) << 16); in HANDLE_OPCODE()
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| D | OP_SPARSE_SWITCH.c | 8 offset = FETCH(1) | (((s4) FETCH(2)) << 16); in HANDLE_OPCODE()
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| D | OP_PACKED_SWITCH.c | 8 offset = FETCH(1) | (((s4) FETCH(2)) << 16); in HANDLE_OPCODE()
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| D | gotoTargets.c | 22 ref = FETCH(1); /* class ref */ in GOTO_TARGET()
23 vdst = FETCH(2); /* first 4 regs -or- range base */ in GOTO_TARGET()
112 ref = FETCH(1); /* method ref */ in GOTO_TARGET()
113 vdst = FETCH(2); /* 4 regs -or- first reg */ in GOTO_TARGET()
204 ref = FETCH(1); /* method ref */ in GOTO_TARGET()
205 vdst = FETCH(2); /* 4 regs -or- first reg */ in GOTO_TARGET()
282 ref = FETCH(1); /* method ref */ in GOTO_TARGET()
283 vdst = FETCH(2); /* 4 regs -or- first reg */ in GOTO_TARGET()
325 ref = FETCH(1); /* method ref */ in GOTO_TARGET()
326 vdst = FETCH(2); /* 4 regs -or- first reg */ in GOTO_TARGET()
[all …]
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| D | OP_EXECUTE_INLINE.c | 24 ref = FETCH(1); /* inline call "ref" */ in HANDLE_OPCODE()
25 vdst = FETCH(2); /* 0-4 register indices */ in HANDLE_OPCODE()
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| D | opcommon.c | 78 regs = FETCH(1); \
102 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
118 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
142 srcRegs = FETCH(1); \
178 srcRegs = FETCH(1); \
191 vsrc2 = FETCH(1); \
224 litInfo = FETCH(1); \
259 litInfo = FETCH(1); \
313 srcRegs = FETCH(1); \
350 srcRegs = FETCH(1); \
[all …]
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| /dalvik/vm/mterp/armv5te/ |
| D | OP_CONST_WIDE.S | 3 FETCH(r0, 1) @ r0<- bbbb (low)
4 FETCH(r1, 2) @ r1<- BBBB (low middle)
5 FETCH(r2, 3) @ r2<- hhhh (high middle)
7 FETCH(r3, 4) @ r3<- HHHH (high)
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| D | OP_MOVE_16.S | 4 FETCH(r1, 2) @ r1<- BBBB
5 FETCH(r0, 1) @ r0<- AAAA
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| D | OP_CONST.S | 4 FETCH(r0, 1) @ r0<- bbbb (low)
5 FETCH(r1, 2) @ r1<- BBBB (high)
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| D | OP_MOVE_WIDE_16.S | 4 FETCH(r3, 2) @ r3<- BBBB
5 FETCH(r2, 1) @ r2<- AAAA
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| D | OP_GOTO_32.S | 15 FETCH(r0, 1) @ r0<- aaaa (lo)
16 FETCH(r1, 2) @ r1<- AAAA (hi)
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| D | OP_INVOKE_VIRTUAL_QUICK.S | 11 FETCH(r3, 2) @ r3<- FEDC or CCCC
12 FETCH(r1, 1) @ r1<- BBBB
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| D | OP_FILL_ARRAY_DATA.S | 3 FETCH(r0, 1) @ r0<- bbbb (lo)
4 FETCH(r1, 2) @ r1<- BBBB (hi)
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| /dalvik/libdex/ |
| D | InstrUtils.c | 1021 #define FETCH(_offset) (insns[(_offset)]) macro
1060 pDec->vA = (s2) FETCH(1); // sign-extend 16-bit value in dexDecodeInstruction()
1065 pDec->vB = FETCH(1); in dexDecodeInstruction()
1070 pDec->vB = (s2) FETCH(1); // sign-extend 16-bit value in dexDecodeInstruction()
1079 pDec->vB = FETCH(1); in dexDecodeInstruction()
1083 pDec->vB = FETCH(1) & 0xff; in dexDecodeInstruction()
1084 pDec->vC = FETCH(1) >> 8; in dexDecodeInstruction()
1088 pDec->vB = FETCH(1) & 0xff; in dexDecodeInstruction()
1089 pDec->vC = (s1) (FETCH(1) >> 8); // sign-extend 8-bit value in dexDecodeInstruction()
1095 pDec->vC = (s2) FETCH(1); // sign-extend 16-bit value in dexDecodeInstruction()
[all …]
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| /dalvik/vm/mterp/out/ |
| D | InterpC-allstubs.c | 280 #define FETCH(_offset) (pc[(_offset)]) macro
423 u2 inst = FETCH(0); \
453 u2 inst = FETCH(0);
605 regs = FETCH(1); \
629 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
645 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
669 srcRegs = FETCH(1); \
705 srcRegs = FETCH(1); \
718 vsrc2 = FETCH(1); \
751 litInfo = FETCH(1); \
[all …]
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| D | InterpC-portstd.c | 280 #define FETCH(_offset) (pc[(_offset)]) macro
440 inst = FETCH(0); \
579 regs = FETCH(1); \
603 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
619 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
643 srcRegs = FETCH(1); \
679 srcRegs = FETCH(1); \
692 vsrc2 = FETCH(1); \
725 litInfo = FETCH(1); \
760 litInfo = FETCH(1); \
[all …]
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| D | InterpC-portdbg.c | 280 #define FETCH(_offset) (pc[(_offset)]) macro
441 inst = FETCH(0); \
580 regs = FETCH(1); \
604 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
620 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
644 srcRegs = FETCH(1); \
680 srcRegs = FETCH(1); \
693 vsrc2 = FETCH(1); \
726 litInfo = FETCH(1); \
761 litInfo = FETCH(1); \
[all …]
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| D | InterpC-x86.c | 280 #define FETCH(_offset) (pc[(_offset)]) macro
423 u2 inst = FETCH(0); \
453 u2 inst = FETCH(0);
605 regs = FETCH(1); \
629 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
645 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
669 srcRegs = FETCH(1); \
705 srcRegs = FETCH(1); \
718 vsrc2 = FETCH(1); \
751 litInfo = FETCH(1); \
[all …]
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