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Searched refs:cregs (Results 1 – 5 of 5) sorted by relevance

/external/qemu/target-arm/
Diwmmxt_helper.c174 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
189 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
200 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
212 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
223 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
231 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
242 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
253 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
261 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
276 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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Dmachine.c107 qemu_put_be32(f, env->iwmmxt.cregs[i]); in cpu_save()
202 env->iwmmxt.cregs[i] = qemu_get_be32(f); in cpu_load()
Dcpu.h184 uint32_t cregs[16]; member
Dtranslate.c1277 tcg_gen_st_i32(cpu_T[0], cpu_env, offsetof(CPUState, iwmmxt.cregs[reg])); in gen_op_iwmmxt_movl_wCx_T0()
1282 tcg_gen_ld_i32(cpu_T[0], cpu_env, offsetof(CPUState, iwmmxt.cregs[reg])); in gen_op_iwmmxt_movl_T0_wCx()
1287 tcg_gen_ld_i32(cpu_T[1], cpu_env, offsetof(CPUState, iwmmxt.cregs[reg])); in gen_op_iwmmxt_movl_T1_wCx()
1452 tmp = load_cpu_field(iwmmxt.cregs[ARM_IWMMXT_wCon]); in gen_op_iwmmxt_set_mup()
1454 store_cpu_field(tmp, iwmmxt.cregs[ARM_IWMMXT_wCon]); in gen_op_iwmmxt_set_mup()
1460 tmp = load_cpu_field(iwmmxt.cregs[ARM_IWMMXT_wCon]); in gen_op_iwmmxt_set_cup()
1462 store_cpu_field(tmp, iwmmxt.cregs[ARM_IWMMXT_wCon]); in gen_op_iwmmxt_set_cup()
1469 store_cpu_field(tmp, iwmmxt.cregs[ARM_IWMMXT_wCASF]); in gen_op_iwmmxt_setpsr_nz()
Dhelper.c146 env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; in cpu_reset_model_id()