# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=regbankselect %s -verify-machineinstrs -o - | FileCheck %s # REQUIRES: global-isel --- | define amdgpu_kernel void @load_constant(i32 addrspace(4)* %ptr0) { ret void } define amdgpu_kernel void @load_global_uniform(i32 addrspace(1)* %ptr1) { %tmp0 = load i32, i32 addrspace(1)* %ptr1 ret void } define amdgpu_kernel void @load_global_non_uniform(i32 addrspace(1)* %ptr2) { %tmp0 = call i32 @llvm.amdgcn.workitem.id.x() #0 %tmp1 = getelementptr i32, i32 addrspace(1)* %ptr2, i32 %tmp0 %tmp2 = load i32, i32 addrspace(1)* %tmp1 ret void } define void @non_power_of_2() { ret void } declare i32 @llvm.amdgcn.workitem.id.x() #0 attributes #0 = { nounwind readnone } ... --- name : load_constant legalized: true # CHECK-LABEL: name: load_constant # CHECK: registers: # CHECK: - { id: 0, class: sgpr, preferred-register: '' } # CHECK: - { id: 1, class: sgpr, preferred-register: '' } body: | bb.0: liveins: $sgpr0_sgpr1 %0:_(p4) = COPY $sgpr0_sgpr1 %1:_(s32) = G_LOAD %0 :: (load 4 from %ir.ptr0) ... --- name: load_global_uniform legalized: true # CHECK-LABEL: name: load_global_uniform # CHECK: registers: # CHECK: - { id: 0, class: sgpr, preferred-register: '' } # CHECK: - { id: 1, class: sgpr, preferred-register: '' } body: | bb.0: liveins: $sgpr0_sgpr1 %0:_(p1) = COPY $sgpr0_sgpr1 %1:_(s32) = G_LOAD %0 :: (load 4 from %ir.ptr1) ... --- name: load_global_non_uniform legalized: true # CHECK-LABEL: name: load_global_non_uniform # CHECK: registers: # CHECK: - { id: 0, class: sgpr, preferred-register: '' } # CHECK: - { id: 1, class: vgpr, preferred-register: '' } # CHECK: - { id: 2, class: vgpr, preferred-register: '' } body: | bb.0: liveins: $sgpr0_sgpr1 %0:_(p1) = COPY $sgpr0_sgpr1 %1:_(s32) = G_LOAD %0 :: (load 4 from %ir.tmp1) ... --- name: non_power_of_2 legalized: true # CHECK-LABEL: name: non_power_of_2 # CHECK: [[S448:%[0-9]+]]:sgpr(s448) = G_IMPLICIT_DEF # CHECK: sgpr(s32) = G_EXTRACT [[S448]](s448), 0 body: | bb.0: %0:_(s448) = G_IMPLICIT_DEF %1:_(s32) = G_EXTRACT %0:_(s448), 0 $sgpr0 = COPY %1:_(s32) SI_RETURN_TO_EPILOG $sgpr0 ...