40   const Reg reg(6);  in TEST_F()
75   opcodes.Offset(Reg(0x3F), -offset);  in TEST_F()
77   opcodes.Offset(Reg(0x40), -offset);  in TEST_F()
79   opcodes.Offset(Reg(0x40), offset);  in TEST_F()
85   opcodes.Register(reg, Reg(1));  in TEST_F()
91   opcodes.Restore(Reg(0x3F));  in TEST_F()
93   opcodes.Restore(Reg(0x40));  in TEST_F()
105   opcodes.DefCFA(Reg(4), 100);  // ESP  in TEST_F()
109   opcodes.RelOffset(Reg(0), 0);  // push R0  in TEST_F()
111   opcodes.RelOffset(Reg(1), 4);  // push R1  in TEST_F()
113   opcodes.RelOffsetForMany(Reg(2), 8, 1 | (1 << 3), 4);  // push R2 and R5  in TEST_F()
116   opcodes.RestoreMany(Reg(2), 1 | (1 << 3));  // pop R2 and R5  in TEST_F()
121   WriteCIE(is64bit, Reg(is64bit ? 16 : 8), initial_opcodes, &debug_frame_data_);  in TEST_F()
135   WriteCIE(is64bit, Reg(16), initial_opcodes, &debug_frame_data_);  in TEST_F()
154     opcodes.RelOffset(Reg::X86_64Core(i), 0);  in TEST_F()
174   WriteCIE(is64bit, Reg(16), initial_opcodes, &debug_frame_data_);  in TEST_F()