34 static Reg GetDwarfCoreReg(InstructionSet isa, int machine_reg) {  in GetDwarfCoreReg()  argument
35   switch (isa) {  in GetDwarfCoreReg()
55 static Reg GetDwarfFpReg(InstructionSet isa, int machine_reg) {  in GetDwarfFpReg()  argument
56   switch (isa) {  in GetDwarfFpReg()
96     InstructionSet isa) {  in GetVariableLocations()  argument
114     const uint32_t pc_offset = stack_map.GetNativePcOffset(isa);  in GetVariableLocations()
182                                InstructionSet isa,  in WriteDebugLocEntry()  argument
199       isa);  in WriteDebugLocEntry()
204   const bool is64bit = Is64BitInstructionSet(isa);  in WriteDebugLocEntry()
225         expr.WriteOpReg(GetDwarfCoreReg(isa, value).num());  in WriteDebugLocEntry()
231         if ((isa == InstructionSet::kArm || isa == InstructionSet::kThumb2) &&  in WriteDebugLocEntry()
238         expr.WriteOpReg(GetDwarfFpReg(isa, value).num());  in WriteDebugLocEntry()