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9 This document lists the optional platform interrupt controller API that
10 abstracts the runtime configuration and control of interrupt controller from the
11 generic code. The mandatory APIs are described in the `porting guide`__.
23 This API should return the priority of the interrupt the PE is currently
27 In the case of ARM standard platforms using GIC, the *Running Priority Register*
28 is read to determine the priority of the interrupt.
38 The API should return whether the interrupt ID (first parameter) is categorized
41 the system.
51 The API should return whether the interrupt ID (first parameter) is categorized
64 The API should return whether the interrupt ID (first parameter) is categorized
77 This API should return the *active* status of the interrupt ID specified by the
80 In case of ARM standard platforms using GIC, the implementation of the API reads
81 the GIC *Set Active Register* to read and return the active status of the
92 This API should enable the interrupt ID specified by the first parameter,
93 ``id``. PEs in the system are expected to receive only enabled interrupts.
95 In case of ARM standard platforms using GIC, the implementation of the API
97 then writes to GIC *Set Enable Register* to enable the interrupt.
107 This API should disable the interrupt ID specified by the first parameter,
108 ``id``. PEs in the system are not expected to receive disabled interrupts.
110 In case of ARM standard platforms using GIC, the implementation of the API
111 writes to GIC *Clear Enable Register* to disable the interrupt, and inserts
123 This API should set the priority of the interrupt specified by first parameter
124 ``id`` to the value set by the second parameter ``priority``.
126 In case of ARM standard platforms using GIC, the implementation of the API
137 This API should return whether the platform supports a given interrupt type. The
141 In case of ARM standard platforms using GICv3, the implementation of the API
144 In case of ARM standard platforms using GICv2, the API always return ``1`` for
145 ``INTR_TYPE_NS``. Return value for other types depends on the value of build
173 This API should set the interrupt specified by first parameter ``id`` to the
177 - ``INTR_TYPE_NS``: interrupt is meant to be consumed by the Non-secure world.
183 In case of ARM standard platforms using GIC, the implementation of the API
184 writes to the GIC *Group Register* and *Group Modifier Register* (only GICv3) to
185 assign the interrupt to the right group.
199 - When the build option ``GICV2_G0_FOR_EL3`` is set to ``0`` (the default),
213 the ID of the SGI. The second parameter, ``target``, must be the MPIDR of the
216 In case of ARM standard platforms using GIC, the implementation of the API
218 to appropriate *SGI Register* in order to raise the EL3 SGI.
230 This API should set the routing mode of Share Peripheral Interrupt (SPI)
231 specified by first parameter ``id`` to that specified by the second parameter
236 - ``INTR_ROUTING_MODE_ANY`` means the interrupt can be routed to any PE in the
239 - ``INTR_ROUTING_MODE_PE`` means the interrupt is routed to the PE whose MPIDR
240   value is specified by the parameter ``mpidr``.
242 In case of ARM standard platforms using GIC, the implementation of the API
243 writes to the GIC *Target Register* (GICv2) or *Route Register* (GICv3) to set
244 the routing.
254 This API should set the interrupt specified by first parameter ``id`` to
257 In case of ARM standard platforms using GIC, the implementation of the API
259 and writes to the GIC *Set Pending Register* to set the interrupt pending
270 This API should clear the *Pending* status of the interrupt specified by first
273 In case of ARM standard platforms using GIC, the implementation of the API
274 writes to the GIC *Clear Pending Register* to clear the interrupt pending
285 This API should set the priority mask (first parameter) in the interrupt
286 controller such that only interrupts of higher priority than the supplied one
287 may be signalled to the PE. The API should return the current priority value
290 In case of ARM standard platforms using GIC, the implementation of the API
291 inserts to order memory updates before updating mask, then writes to the GIC