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Lines Matching refs:mRootBridge

272 STATIC PCI_ROOT_BRIDGE mRootBridge;  variable
313 mRootBridge.Segment = 0; in PciHostBridgeGetRootBridges()
314 mRootBridge.Supports = EFI_PCI_ATTRIBUTE_ISA_IO_16 | in PciHostBridgeGetRootBridges()
318 mRootBridge.Attributes = mRootBridge.Supports; in PciHostBridgeGetRootBridges()
320 mRootBridge.DmaAbove4G = TRUE; in PciHostBridgeGetRootBridges()
321 mRootBridge.NoExtendedConfigSpace = FALSE; in PciHostBridgeGetRootBridges()
322 mRootBridge.ResourceAssigned = FALSE; in PciHostBridgeGetRootBridges()
324 mRootBridge.AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM; in PciHostBridgeGetRootBridges()
326 mRootBridge.Bus.Base = BusMin; in PciHostBridgeGetRootBridges()
327 mRootBridge.Bus.Limit = BusMax; in PciHostBridgeGetRootBridges()
328 mRootBridge.Io.Base = IoBase; in PciHostBridgeGetRootBridges()
329 mRootBridge.Io.Limit = IoBase + IoSize - 1; in PciHostBridgeGetRootBridges()
330 mRootBridge.Mem.Base = Mmio32Base; in PciHostBridgeGetRootBridges()
331 mRootBridge.Mem.Limit = Mmio32Base + Mmio32Size - 1; in PciHostBridgeGetRootBridges()
334 mRootBridge.MemAbove4G.Base = Mmio64Base; in PciHostBridgeGetRootBridges()
335 mRootBridge.MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1; in PciHostBridgeGetRootBridges()
337 mRootBridge.AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE; in PciHostBridgeGetRootBridges()
346 mRootBridge.MemAbove4G.Base = MAX_UINT64; in PciHostBridgeGetRootBridges()
347 mRootBridge.MemAbove4G.Limit = 0; in PciHostBridgeGetRootBridges()
353 mRootBridge.PMem.Base = MAX_UINT64; in PciHostBridgeGetRootBridges()
354 mRootBridge.PMem.Limit = 0; in PciHostBridgeGetRootBridges()
355 mRootBridge.PMemAbove4G.Base = MAX_UINT64; in PciHostBridgeGetRootBridges()
356 mRootBridge.PMemAbove4G.Limit = 0; in PciHostBridgeGetRootBridges()
358 mRootBridge.DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath; in PciHostBridgeGetRootBridges()
360 return &mRootBridge; in PciHostBridgeGetRootBridges()