94   PCI_CONFIG_ACCESS_CF8             Pci;  in PcatRootBridgeIoPciRW()  local
141       Pci.Bits.Reg = PciAddress.ExtendedRegister & 0xFF;  in PcatRootBridgeIoPciRW()
143       Pci.Bits.Reg = PciAddress.Register;  in PcatRootBridgeIoPciRW()
151     Pci.Bits.Func     = PciAddress.Function;  in PcatRootBridgeIoPciRW()
152     Pci.Bits.Dev      = PciAddress.Device;  in PcatRootBridgeIoPciRW()
153     Pci.Bits.Bus      = PciAddress.Bus;  in PcatRootBridgeIoPciRW()
154     Pci.Bits.Reserved = 0;  in PcatRootBridgeIoPciRW()
155     Pci.Bits.Enable   = 1;  in PcatRootBridgeIoPciRW()
165     PciDataStride = Pci.Bits.Reg & 0x03;  in PcatRootBridgeIoPciRW()
168       PciAligned = Pci;  in PcatRootBridgeIoPciRW()
181       Pci.Bits.Reg += InStride;  in PcatRootBridgeIoPciRW()
254         IoDev->Pci.Read (IoDev, EfiPciWidthUint16, Address, 1, &PciHeader.Hdr.VendorId);  in ScanPciBus()
272           IoDev->Pci.Read (IoDev, EfiPciWidthUint8, Address + 0x0e, 1, &PciHeader.Hdr.HeaderType);  in ScanPciBus()
338   IoDev->Pci.Read (IoDev, EfiPciWidthUint32, Address, sizeof(PciHeader)/sizeof(UINT32), &PciHeader);  in CheckForRom()
353       IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x26, 1, &Register);  in CheckForRom()
354       IoDev->Pci.Write (IoDev, EfiPciWidthUint32, Address + 0x2c, 1, &Register);  in CheckForRom()
356       IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x24, 1, &Register);  in CheckForRom()
357       IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x28, 1, &Register);  in CheckForRom()
362       IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x20, 4, &Context->PpbMemoryWindow);  in CheckForRom()
367       IoDev->Pci.Read (IoDev, EfiPciWidthUint16, Address + 4, 1, &Register);  in CheckForRom()
369       IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 4, 1, &Register);  in CheckForRom()
388     IoDev->Pci.Write (IoDev, EfiPciWidthUint32, Address + 0x30, 1, &RomBar);  in CheckForRom()
389     IoDev->Pci.Read (IoDev, EfiPciWidthUint32, Address + 0x30, 1, &RomBar);  in CheckForRom()
406         IoDev->Pci.Write (IoDev, EfiPciWidthUint32, Address + 0x30, 1, &RomBar);  in CheckForRom()
407         IoDev->Pci.Read  (IoDev, EfiPciWidthUint32, Address + 0x30, 1, &RomBar);  in CheckForRom()
413         IoDev->Pci.Read (IoDev, EfiPciWidthUint16, Address + 4, 1, &Register);  in CheckForRom()
415         IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 4, 1, &Register);  in CheckForRom()
521         IoDev->Pci.Read (IoDev, EfiPciWidthUint16, Address + 4, 1, &Register);  in CheckForRom()
523         IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 4, 1, &Register);  in CheckForRom()
531 …IoDev->Pci.Write (IoDev, EfiPciWidthUint32, Address, sizeof(PciHeader)/sizeof(UINT32), &PciHeader);  in CheckForRom()
561   IoDev->Pci.Read (IoDev, EfiPciWidthUint16, Address, 1, &Context->CommandRegisterBuffer[Index]);  in SaveCommandRegister()
568   IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address, 1, &Command);  in SaveCommandRegister()
597   IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address, 1, &Context->CommandRegisterBuffer[Index]);  in RestoreCommandRegister()