Lines Matching refs:Disable
56 OperationRegion(PMCR, SystemMemory, \PFDR, 0x04)// PMC Function Disable Register
59 Offset(0x00), // Function Disable Register
60 L10D, 1, // (0) LPIO1 DMA Disable
61 L11D, 1, // (1) LPIO1 PWM #1 Disable
62 L12D, 1, // (2) LPIO1 PWM #2 Disable
63 L13D, 1, // (3) LPIO1 HS-UART #1 Disable
64 L14D, 1, // (4) LPIO1 HS-UART #2 Disable
65 L15D, 1, // (5) LPIO1 SPI Disable
67 SD1D, 1, // (8) SCC SDIO #1 Disable
68 SD2D, 1, // (9) SCC SDIO #2 Disable
69 SD3D, 1, // (10) SCC SDIO #3 Disable
71 HDAD, 1, // (12) Azalia Disable
72 LPED, 1, // (13) LPE Disable
73 OTGD, 1, // (14) USB OTG Disable
74 , 1, // (15) USH Disable
77 , 1, // (18) USB Disable
78 , 1, // (19) SEC Disable
79 RP1D, 1, // (20) Root Port 0 Disable
80 RP2D, 1, // (21) Root Port 1 Disable
81 RP3D, 1, // (22) Root Port 2 Disable
82 RP4D, 1, // (23) Root Port 3 Disable
83 L20D, 1, // (24) LPIO2 DMA Disable
84 L21D, 1, // (25) LPIO2 I2C #1 Disable
85 L22D, 1, // (26) LPIO2 I2C #2 Disable
86 L23D, 1, // (27) LPIO2 I2C #3 Disable
87 L24D, 1, // (28) LPIO2 I2C #4 Disable
88 L25D, 1, // (29) LPIO2 I2C #5 Disable
89 L26D, 1, // (30) LPIO2 I2C #6 Disable
90 L27D, 1 // (31) LPIO2 I2C #7 Disable