Lines Matching refs:VBSL

1569 VBSL/VBSLQ output:
1570 VBSL/VBSLQ:0:result_int8x8 [] = { fffffff2, fffffff2, fffffff2, fffffff2, fffffff6, fffffff6, fffff…
1571 VBSL/VBSLQ:1:result_int16x4 [] = { fffffff0, fffffff0, fffffff2, fffffff2,  }
1572 VBSL/VBSLQ:2:result_int32x2 [] = { fffffff0, fffffff0,  }
1573 VBSL/VBSLQ:3:result_int64x1 [] = { fffffffffffffffd,  }
1574 VBSL/VBSLQ:4:result_uint8x8 [] = { f3, f3, f3, f3, f7, f7, f7, f7,  }
1575 VBSL/VBSLQ:5:result_uint16x4 [] = { fff0, fff0, fff2, fff2,  }
1576 VBSL/VBSLQ:6:result_uint32x2 [] = { fffffff0, fffffff0,  }
1577 VBSL/VBSLQ:7:result_uint64x1 [] = { fffffff1,  }
1578 VBSL/VBSLQ:8:result_poly8x8 [] = { f3, f3, f3, f3, f7, f7, f7, f7,  }
1579 VBSL/VBSLQ:9:result_poly16x4 [] = { fff0, fff0, fff2, fff2,  }
1580 VBSL/VBSLQ:10:result_float32x2 [] = { c1800004, c1700004,  }
1581 VBSL/VBSLQ:11:result_float16x4 [] = { 0, 0, 0, 0,  }
1582 VBSL/VBSLQ:12:result_int8x16 [] = { fffffff2, fffffff2, fffffff2, fffffff2, fffffff6, fffffff6, fff…
1583 VBSL/VBSLQ:13:result_int16x8 [] = { fffffff0, fffffff0, fffffff2, fffffff2, fffffff4, fffffff4, fff…
1584 VBSL/VBSLQ:14:result_int32x4 [] = { fffffff0, fffffff0, fffffff2, fffffff2,  }
1585 VBSL/VBSLQ:15:result_int64x2 [] = { fffffffffffffffd, fffffffffffffffd,  }
1586 VBSL/VBSLQ:16:result_uint8x16 [] = { f3, f3, f3, f3, f7, f7, f7, f7, f3, f3, f3, f3, f7, f7, f7, f7…
1587 VBSL/VBSLQ:17:result_uint16x8 [] = { fff0, fff0, fff2, fff2, fff4, fff4, fff6, fff6,  }
1588 VBSL/VBSLQ:18:result_uint32x4 [] = { fffffff0, fffffff0, fffffff2, fffffff2,  }
1589 VBSL/VBSLQ:19:result_uint64x2 [] = { fffffff1, fffffff1,  }
1590 VBSL/VBSLQ:20:result_poly8x16 [] = { f3, f3, f3, f3, f7, f7, f7, f7, f3, f3, f3, f3, f7, f7, f7, f7…
1591 VBSL/VBSLQ:21:result_poly16x8 [] = { fff0, fff0, fff2, fff2, fff4, fff4, fff6, fff6,  }
1592 VBSL/VBSLQ:22:result_float32x4 [] = { c1800001, c1700001, c1600001, c1500001,  }
1593 VBSL/VBSLQ:23:result_float16x8 [] = { 0, 0, 0, 0, 0, 0, 0, 0,  }