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Lines Matching refs:MCOperand_getReg

115 						getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName),  in AArch64_printInst()
116 getRegisterName(getWRegFromXReg(MCOperand_getReg(Op1)), AArch64_NoRegAltName)); in AArch64_printInst()
120 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); in AArch64_printInst()
123 …arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg(MCOperand_getReg(Op1)); in AArch64_printInst()
165 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst()
166 getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); in AArch64_printInst()
174 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); in AArch64_printInst()
177 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1); in AArch64_printInst()
191 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst()
192 getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); in AArch64_printInst()
201 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); in AArch64_printInst()
204 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1); in AArch64_printInst()
219 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst()
220 getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); in AArch64_printInst()
229 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); in AArch64_printInst()
232 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1); in AArch64_printInst()
258 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst()
259 getRegisterName(MCOperand_getReg(Op2), AArch64_NoRegAltName)); in AArch64_printInst()
267 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); in AArch64_printInst()
270 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2); in AArch64_printInst()
287 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst()
288 getRegisterName(MCOperand_getReg(Op2), AArch64_NoRegAltName)); in AArch64_printInst()
296 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0); in AArch64_printInst()
299 …at_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2); in AArch64_printInst()
574 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, 4)); in printSysAlias()
592 unsigned Reg = MCOperand_getReg(Op); in printOperand()
645 unsigned Reg = MCOperand_getReg(Op); in printPostIncOperand()
674 unsigned Reg = MCOperand_getReg(Op); in printVRegOperand()
797 …SStream_concat0(O, getRegisterName(MCOperand_getReg(MCInst_getOperand(MI, OpNum)), AArch64_NoRegAl… in printShiftedRegister()
800 …detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(MCInst_getOpe… in printShiftedRegister()
816 unsigned Dest = MCOperand_getReg(MCInst_getOperand(MI, 0)); in printArithExtend()
817 unsigned Src1 = MCOperand_getReg(MCInst_getOperand(MI, 1)); in printArithExtend()
881 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); in printExtendedRegister()
1103 unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); in printVectorList()