Lines Matching refs:arm64
56 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM; in set_mem_access()
57 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_… in set_mem_access()
58 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG… in set_mem_access()
59 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0; in set_mem_access()
62 MI->flat_insn->detail->arm64.op_count++; in set_mem_access()
119 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
120 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
121 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
122 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
123 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg… in AArch64_printInst()
124 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
173 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
174 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
175 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
176 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
177 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
178 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
179 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
180 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = shift; in AArch64_printInst()
181 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
200 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
201 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
202 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
203 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
204 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
205 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
206 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
207 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (Is64Bit ? 64 :… in AArch64_printInst()
208 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
209 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
210 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getIm… in AArch64_printInst()
211 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
228 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
229 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
230 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
231 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
232 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
233 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
234 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
235 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getIm… in AArch64_printInst()
236 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
237 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
238 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getIm… in AArch64_printInst()
239 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
266 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
267 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
268 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
269 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
270 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
271 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
272 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
273 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB; in AArch64_printInst()
274 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
275 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
276 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width; in AArch64_printInst()
277 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
295 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
296 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
297 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
298 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
299 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
300 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
301 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
302 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB; in AArch64_printInst()
303 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
304 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in AArch64_printInst()
305 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width; in AArch64_printInst()
306 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
568 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_SYS; in printSysAlias()
569 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].sys = op_ic + op_dc +… in printSysAlias()
570 MI->flat_insn->detail->arm64.op_count++; in printSysAlias()
577 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in printSysAlias()
578 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; in printSysAlias()
579 MI->flat_insn->detail->arm64.op_count++; in printSysAlias()
596 …if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base == ARM64… in printOperand()
597 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = Reg; in printOperand()
599 …else if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index ==… in printOperand()
600 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = Reg; in printOperand()
603 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in printOperand()
604 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; in printOperand()
605 MI->flat_insn->detail->arm64.op_count++; in printOperand()
618 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)i… in printOperand()
620 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printOperand()
621 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm; in printOperand()
622 MI->flat_insn->detail->arm64.op_count++; in printOperand()
633 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printHexImm()
634 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getIm… in printHexImm()
635 MI->flat_insn->detail->arm64.op_count++; in printHexImm()
649 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printPostIncOperand()
650 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm; in printPostIncOperand()
651 MI->flat_insn->detail->arm64.op_count++; in printPostIncOperand()
656 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in printPostIncOperand()
657 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; in printPostIncOperand()
658 MI->flat_insn->detail->arm64.op_count++; in printPostIncOperand()
677 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in printVRegOperand()
678 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vre… in printVRegOperand()
679 MI->flat_insn->detail->arm64.op_count++; in printVRegOperand()
689 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_CIMM; in printSysCROperand()
690 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getIm… in printSysCROperand()
691 MI->flat_insn->detail->arm64.op_count++; in printSysCROperand()
706 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printAddSubImm()
707 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; in printAddSubImm()
708 MI->flat_insn->detail->arm64.op_count++; in printAddSubImm()
724 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printLogicalImm32()
725 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; in printLogicalImm32()
726 MI->flat_insn->detail->arm64.op_count++; in printLogicalImm32()
752 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printLogicalImm64()
753 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; in printLogicalImm64()
754 MI->flat_insn->detail->arm64.op_count++; in printLogicalImm64()
790 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = shif… in printShifter()
791 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = AAr… in printShifter()
799 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in printShiftedRegister()
800 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in printShiftedRegister()
801 MI->flat_insn->detail->arm64.op_count++; in printShiftedRegister()
826 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM6… in printArithExtend()
827 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = Shi… in printArithExtend()
866 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = ext; in printArithExtend()
873 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM6… in printArithExtend()
874 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = Shi… in printArithExtend()
885 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in printExtendedRegister()
886 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg; in printExtendedRegister()
887 MI->flat_insn->detail->arm64.op_count++; in printExtendedRegister()
903 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.type = ARM64_SF… in printMemExtend()
912 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTB; in printMemExtend()
915 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTH; in printMemExtend()
918 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTW; in printMemExtend()
925 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTB; in printMemExtend()
928 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTH; in printMemExtend()
931 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTW; in printMemExtend()
934 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTX; in printMemExtend()
944 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.type = ARM64_SF… in printMemExtend()
945 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.value = Log2_32… in printMemExtend()
956 MI->flat_insn->detail->arm64.cc = (arm64_cc)(CC + 1); in printCondCode()
965 MI->flat_insn->detail->arm64.cc = (arm64_cc)(getInvertedCondCode(CC) + 1); in printInverseCondCode()
977 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = val; in printImmScale()
979 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printImmScale()
980 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = val; in printImmScale()
981 MI->flat_insn->detail->arm64.op_count++; in printImmScale()
995 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = val; in printUImm12Offset()
997 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printUImm12Offset()
998 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = val; in printUImm12Offset()
999 MI->flat_insn->detail->arm64.op_count++; in printUImm12Offset()
1019 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PREFE… in printPrefetchOp()
1021 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].prefetch = prfop + 1; in printPrefetchOp()
1022 MI->flat_insn->detail->arm64.op_count++; in printPrefetchOp()
1027 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printPrefetchOp()
1028 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = prfop; in printPrefetchOp()
1029 MI->flat_insn->detail->arm64.op_count++; in printPrefetchOp()
1047 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP; in printFPImmOperand()
1048 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = FPImm; in printFPImmOperand()
1049 MI->flat_insn->detail->arm64.op_count++; in printFPImmOperand()
1138 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in printVectorList()
1139 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vre… in printVectorList()
1140 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vas = vas; in printVectorList()
1141 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vess = vess; in printVectorList()
1142 MI->flat_insn->detail->arm64.op_count++; in printVectorList()
1240 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vector_index = (i… in printVectorIndex()
1254 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printAlignedLabel()
1255 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm; in printAlignedLabel()
1256 MI->flat_insn->detail->arm64.op_count++; in printAlignedLabel()
1276 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printAdrpLabel()
1277 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm; in printAdrpLabel()
1278 MI->flat_insn->detail->arm64.op_count++; in printAdrpLabel()
1299 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_BARRI… in printBarrierOption()
1300 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].barrier = Val; in printBarrierOption()
1301 MI->flat_insn->detail->arm64.op_count++; in printBarrierOption()
1306 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printBarrierOption()
1307 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; in printBarrierOption()
1308 MI->flat_insn->detail->arm64.op_count++; in printBarrierOption()
1324 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_M… in printMRSSystemRegister()
1325 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val; in printMRSSystemRegister()
1326 MI->flat_insn->detail->arm64.op_count++; in printMRSSystemRegister()
1342 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_M… in printMSRSystemRegister()
1343 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val; in printMSRSystemRegister()
1344 MI->flat_insn->detail->arm64.op_count++; in printMSRSystemRegister()
1359 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PSTAT… in printSystemPStateField()
1360 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].pstate = Val; in printSystemPStateField()
1361 MI->flat_insn->detail->arm64.op_count++; in printSystemPStateField()
1365 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printSystemPStateField()
1366 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; in printSystemPStateField()
1367 MI->flat_insn->detail->arm64.op_count++; in printSystemPStateField()
1377 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM; in printSIMDType10Operand()
1378 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val; in printSIMDType10Operand()
1379 MI->flat_insn->detail->arm64.op_count++; in printSIMDType10Operand()
1394 flat_insn->detail->arm64.writeback = true; in AArch64_post_printer()