Lines Matching refs:static
492 static MCPhysReg ARMRegDiffLists[] = {
850 static uint16_t ARMSubRegIdxLists[] = {
886 static MCRegisterDesc ARMRegDesc[] = { // Descriptors
1179 static uint16_t SPR[] = {
1184 static uint8_t SPRBits[] = {
1189 static uint16_t GPR[] = {
1194 static uint8_t GPRBits[] = {
1199 static uint16_t GPRwithAPSR[] = {
1204 static uint8_t GPRwithAPSRBits[] = {
1209 static uint16_t SPR_8[] = {
1214 static uint8_t SPR_8Bits[] = {
1219 static uint16_t GPRnopc[] = {
1224 static uint8_t GPRnopcBits[] = {
1229 static uint16_t rGPR[] = {
1234 static uint8_t rGPRBits[] = {
1239 static uint16_t hGPR[] = {
1244 static uint8_t hGPRBits[] = {
1249 static uint16_t tGPR[] = {
1254 static uint8_t tGPRBits[] = {
1259 static uint16_t GPRnopc_and_hGPR[] = {
1264 static uint8_t GPRnopc_and_hGPRBits[] = {
1269 static uint16_t hGPR_and_rGPR[] = {
1274 static uint8_t hGPR_and_rGPRBits[] = {
1279 static uint16_t tcGPR[] = {
1284 static uint8_t tcGPRBits[] = {
1289 static uint16_t tGPR_and_tcGPR[] = {
1294 static uint8_t tGPR_and_tcGPRBits[] = {
1299 static uint16_t CCR[] = {
1304 static uint8_t CCRBits[] = {
1309 static uint16_t GPRsp[] = {
1314 static uint8_t GPRspBits[] = {
1319 static uint16_t hGPR_and_tcGPR[] = {
1324 static uint8_t hGPR_and_tcGPRBits[] = {
1329 static uint16_t DPR[] = {
1334 static uint8_t DPRBits[] = {
1339 static uint16_t DPR_VFP2[] = {
1344 static uint8_t DPR_VFP2Bits[] = {
1349 static uint16_t DPR_8[] = {
1354 static uint8_t DPR_8Bits[] = {
1359 static uint16_t GPRPair[] = {
1364 static uint8_t GPRPairBits[] = {
1369 static uint16_t GPRPair_with_gsub_1_in_rGPR[] = {
1374 static uint8_t GPRPair_with_gsub_1_in_rGPRBits[] = {
1379 static uint16_t GPRPair_with_gsub_0_in_tGPR[] = {
1384 static uint8_t GPRPair_with_gsub_0_in_tGPRBits[] = {
1389 static uint16_t GPRPair_with_gsub_0_in_hGPR[] = {
1394 static uint8_t GPRPair_with_gsub_0_in_hGPRBits[] = {
1399 static uint16_t GPRPair_with_gsub_0_in_tcGPR[] = {
1404 static uint8_t GPRPair_with_gsub_0_in_tcGPRBits[] = {
1409 static uint16_t GPRPair_with_gsub_1_in_hGPR_and_rGPR[] = {
1414 static uint8_t GPRPair_with_gsub_1_in_hGPR_and_rGPRBits[] = {
1419 static uint16_t GPRPair_with_gsub_1_in_tcGPR[] = {
1424 static uint8_t GPRPair_with_gsub_1_in_tcGPRBits[] = {
1429 static uint16_t GPRPair_with_gsub_1_in_GPRsp[] = {
1434 static uint8_t GPRPair_with_gsub_1_in_GPRspBits[] = {
1439 static uint16_t DPairSpc[] = {
1444 static uint8_t DPairSpcBits[] = {
1449 static uint16_t DPairSpc_with_ssub_0[] = {
1454 static uint8_t DPairSpc_with_ssub_0Bits[] = {
1459 static uint16_t DPairSpc_with_dsub_2_then_ssub_0[] = {
1464 static uint8_t DPairSpc_with_dsub_2_then_ssub_0Bits[] = {
1469 static uint16_t DPairSpc_with_dsub_0_in_DPR_8[] = {
1474 static uint8_t DPairSpc_with_dsub_0_in_DPR_8Bits[] = {
1479 static uint16_t DPairSpc_with_dsub_2_in_DPR_8[] = {
1484 static uint8_t DPairSpc_with_dsub_2_in_DPR_8Bits[] = {
1489 static uint16_t DPair[] = {
1494 static uint8_t DPairBits[] = {
1499 static uint16_t DPair_with_ssub_0[] = {
1504 static uint8_t DPair_with_ssub_0Bits[] = {
1509 static uint16_t QPR[] = {
1514 static uint8_t QPRBits[] = {
1519 static uint16_t DPair_with_ssub_2[] = {
1524 static uint8_t DPair_with_ssub_2Bits[] = {
1529 static uint16_t DPair_with_dsub_0_in_DPR_8[] = {
1534 static uint8_t DPair_with_dsub_0_in_DPR_8Bits[] = {
1539 static uint16_t QPR_VFP2[] = {
1544 static uint8_t QPR_VFP2Bits[] = {
1549 static uint16_t DPair_with_dsub_1_in_DPR_8[] = {
1554 static uint8_t DPair_with_dsub_1_in_DPR_8Bits[] = {
1559 static uint16_t QPR_8[] = {
1564 static uint8_t QPR_8Bits[] = {
1569 static uint16_t DTriple[] = {
1574 static uint8_t DTripleBits[] = {
1579 static uint16_t DTripleSpc[] = {
1584 static uint8_t DTripleSpcBits[] = {
1589 static uint16_t DTripleSpc_with_ssub_0[] = {
1594 static uint8_t DTripleSpc_with_ssub_0Bits[] = {
1599 static uint16_t DTriple_with_ssub_0[] = {
1604 static uint8_t DTriple_with_ssub_0Bits[] = {
1609 static uint16_t DTriple_with_dsub_1_dsub_2_in_QPR[] = {
1614 static uint8_t DTriple_with_dsub_1_dsub_2_in_QPRBits[] = {
1619 static uint16_t DTriple_with_qsub_0_in_QPR[] = {
1624 static uint8_t DTriple_with_qsub_0_in_QPRBits[] = {
1629 static uint16_t DTriple_with_ssub_2[] = {
1634 static uint8_t DTriple_with_ssub_2Bits[] = {
1639 static uint16_t DTripleSpc_with_dsub_2_then_ssub_0[] = {
1644 static uint8_t DTripleSpc_with_dsub_2_then_ssub_0Bits[] = {
1649 static uint16_t DTriple_with_dsub_2_then_ssub_0[] = {
1654 static uint8_t DTriple_with_dsub_2_then_ssub_0Bits[] = {
1659 static uint16_t DTripleSpc_with_dsub_4_then_ssub_0[] = {
1664 static uint8_t DTripleSpc_with_dsub_4_then_ssub_0Bits[] = {
1669 static uint16_t DTripleSpc_with_dsub_0_in_DPR_8[] = {
1674 static uint8_t DTripleSpc_with_dsub_0_in_DPR_8Bits[] = {
1679 static uint16_t DTriple_with_dsub_0_in_DPR_8[] = {
1684 static uint8_t DTriple_with_dsub_0_in_DPR_8Bits[] = {
1689 static uint16_t DTriple_with_qsub_0_in_QPR_VFP2[] = {
1694 static uint8_t DTriple_with_qsub_0_in_QPR_VFP2Bits[] = {
1699 static uint16_t DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR[] = {
1704 static uint8_t DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRBits[] = {
1709 static uint16_t DTriple_with_dsub_1_dsub_2_in_QPR_VFP2[] = {
1714 static uint8_t DTriple_with_dsub_1_dsub_2_in_QPR_VFP2Bits[] = {
1719 static uint16_t DTriple_with_dsub_1_in_DPR_8[] = {
1724 static uint8_t DTriple_with_dsub_1_in_DPR_8Bits[] = {
1729 static uint16_t DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR[] = {
1734 static uint8_t DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRBits[] = {
1739 static uint16_t DTripleSpc_with_dsub_2_in_DPR_8[] = {
1744 static uint8_t DTripleSpc_with_dsub_2_in_DPR_8Bits[] = {
1749 static uint16_t DTriple_with_dsub_2_in_DPR_8[] = {
1754 static uint8_t DTriple_with_dsub_2_in_DPR_8Bits[] = {
1759 static uint16_t DTripleSpc_with_dsub_4_in_DPR_8[] = {
1764 static uint8_t DTripleSpc_with_dsub_4_in_DPR_8Bits[] = {
1769 static uint16_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR[] = {
1774 static uint8_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRBits[] = {
1779 static uint16_t DTriple_with_qsub_0_in_QPR_8[] = {
1784 static uint8_t DTriple_with_qsub_0_in_QPR_8Bits[] = {
1789 static uint16_t DTriple_with_dsub_1_dsub_2_in_QPR_8[] = {
1794 static uint8_t DTriple_with_dsub_1_dsub_2_in_QPR_8Bits[] = {
1799 static uint16_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR[] = {
1804 static uint8_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRBits[] = {
1809 static uint16_t DQuadSpc[] = {
1814 static uint8_t DQuadSpcBits[] = {
1819 static uint16_t DQuadSpc_with_ssub_0[] = {
1824 static uint8_t DQuadSpc_with_ssub_0Bits[] = {
1829 static uint16_t DQuadSpc_with_dsub_2_then_ssub_0[] = {
1834 static uint8_t DQuadSpc_with_dsub_2_then_ssub_0Bits[] = {
1839 static uint16_t DQuadSpc_with_dsub_4_then_ssub_0[] = {
1844 static uint8_t DQuadSpc_with_dsub_4_then_ssub_0Bits[] = {
1849 static uint16_t DQuadSpc_with_dsub_0_in_DPR_8[] = {
1854 static uint8_t DQuadSpc_with_dsub_0_in_DPR_8Bits[] = {
1859 static uint16_t DQuadSpc_with_dsub_2_in_DPR_8[] = {
1864 static uint8_t DQuadSpc_with_dsub_2_in_DPR_8Bits[] = {
1869 static uint16_t DQuadSpc_with_dsub_4_in_DPR_8[] = {
1874 static uint8_t DQuadSpc_with_dsub_4_in_DPR_8Bits[] = {
1879 static uint16_t DQuad[] = {
1884 static uint8_t DQuadBits[] = {
1889 static uint16_t DQuad_with_ssub_0[] = {
1894 static uint8_t DQuad_with_ssub_0Bits[] = {
1899 static uint16_t DQuad_with_ssub_2[] = {
1904 static uint8_t DQuad_with_ssub_2Bits[] = {
1909 static uint16_t QQPR[] = {
1914 static uint8_t QQPRBits[] = {
1919 static uint16_t DQuad_with_dsub_1_dsub_2_in_QPR[] = {
1924 static uint8_t DQuad_with_dsub_1_dsub_2_in_QPRBits[] = {
1929 static uint16_t DQuad_with_dsub_2_then_ssub_0[] = {
1934 static uint8_t DQuad_with_dsub_2_then_ssub_0Bits[] = {
1939 static uint16_t DQuad_with_dsub_3_then_ssub_0[] = {
1944 static uint8_t DQuad_with_dsub_3_then_ssub_0Bits[] = {
1949 static uint16_t DQuad_with_dsub_0_in_DPR_8[] = {
1954 static uint8_t DQuad_with_dsub_0_in_DPR_8Bits[] = {
1959 static uint16_t DQuad_with_qsub_0_in_QPR_VFP2[] = {
1964 static uint8_t DQuad_with_qsub_0_in_QPR_VFP2Bits[] = {
1969 static uint16_t DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = {
1974 static uint8_t DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = {
1979 static uint16_t DQuad_with_dsub_1_dsub_2_in_QPR_VFP2[] = {
1984 static uint8_t DQuad_with_dsub_1_dsub_2_in_QPR_VFP2Bits[] = {
1989 static uint16_t DQuad_with_dsub_1_in_DPR_8[] = {
1994 static uint8_t DQuad_with_dsub_1_in_DPR_8Bits[] = {
1999 static uint16_t DQuad_with_qsub_1_in_QPR_VFP2[] = {
2004 static uint8_t DQuad_with_qsub_1_in_QPR_VFP2Bits[] = {
2009 static uint16_t DQuad_with_dsub_2_in_DPR_8[] = {
2014 static uint8_t DQuad_with_dsub_2_in_DPR_8Bits[] = {
2019 static uint16_t DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = {
2024 static uint8_t DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = {
2029 static uint16_t DQuad_with_dsub_3_in_DPR_8[] = {
2034 static uint8_t DQuad_with_dsub_3_in_DPR_8Bits[] = {
2039 static uint16_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = {
2044 static uint8_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = {
2049 static uint16_t DQuad_with_qsub_0_in_QPR_8[] = {
2054 static uint8_t DQuad_with_qsub_0_in_QPR_8Bits[] = {
2059 static uint16_t DQuad_with_dsub_1_dsub_2_in_QPR_8[] = {
2064 static uint8_t DQuad_with_dsub_1_dsub_2_in_QPR_8Bits[] = {
2069 static uint16_t DQuad_with_qsub_1_in_QPR_8[] = {
2074 static uint8_t DQuad_with_qsub_1_in_QPR_8Bits[] = {
2079 static uint16_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = {
2084 static uint8_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = {
2089 static uint16_t QQQQPR[] = {
2094 static uint8_t QQQQPRBits[] = {
2099 static uint16_t QQQQPR_with_ssub_0[] = {
2104 static uint8_t QQQQPR_with_ssub_0Bits[] = {
2109 static uint16_t QQQQPR_with_dsub_2_then_ssub_0[] = {
2114 static uint8_t QQQQPR_with_dsub_2_then_ssub_0Bits[] = {
2119 static uint16_t QQQQPR_with_dsub_5_then_ssub_0[] = {
2124 static uint8_t QQQQPR_with_dsub_5_then_ssub_0Bits[] = {
2129 static uint16_t QQQQPR_with_dsub_7_then_ssub_0[] = {
2134 static uint8_t QQQQPR_with_dsub_7_then_ssub_0Bits[] = {
2139 static uint16_t QQQQPR_with_dsub_0_in_DPR_8[] = {
2144 static uint8_t QQQQPR_with_dsub_0_in_DPR_8Bits[] = {
2149 static uint16_t QQQQPR_with_dsub_2_in_DPR_8[] = {
2154 static uint8_t QQQQPR_with_dsub_2_in_DPR_8Bits[] = {
2159 static uint16_t QQQQPR_with_dsub_4_in_DPR_8[] = {
2164 static uint8_t QQQQPR_with_dsub_4_in_DPR_8Bits[] = {
2169 static uint16_t QQQQPR_with_dsub_6_in_DPR_8[] = {
2174 static uint8_t QQQQPR_with_dsub_6_in_DPR_8Bits[] = {
2178 static MCRegisterClass ARMMCRegisterClasses[] = {